- A series from Alexander Stein to fix some i.MX6UL dt_binding_check
warnings.
- Replace deprecated 'enable-sdio-wakeup' property with 'wakeup-source'
for a couple of boards.
- A set of imx7-colibri device tree updates from Marcel Ziswiler to
improve devices Display, Touch, Ethernet and SD/MMC, and also adds
Toradex Iris carrier board.
- A few improvements on imx6qdl-colibri board, correct SGTL5000 MCLK
handling, simplify handling of inverted PWM backlight.
- A series from Max Krummenacher (and Oleksandr Suvorov) to improve the
existing i.MX6 Apalis carrier board device trees and adds a new device
tree for the Ixora V1.2 carrier board.
- Add USB dual-role switching using extcon for imx7-colibri board.
- Add SFP node for TA 2.1 devices for LayerScape SoCs.
- Other small and random updates on various boards.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmLJMugUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM6HTwf9EpFmI65t6eC8llTDK94Xx4dvwESq
TTx04A7XL36DgYAkGpL1l5KpcLGQGAo6Gfn1Nb6SxHfOL3Tqa3F/0FilR0h4sdGy
E6+OVzRJyoYTsL1l+tzcoLBAHMj/ai5gmTuTaQVypEz0Ai3JQnjR+p/v8xmAaPTE
crQy/ashAbOpBW09ZOw3T1osb9XqGDVCKHi6FxQS0vFNOC87olVGnOJedfaBwjpz
eMdXDWF8vbQ1mxIXzBBpSVU3htTVP6mZs4W4h0lQ22pHr6KuRRNPgjpB5s5m/Jjw
DTVTclhQBJGuY9FsrBRJKvTjlmQ513Wz57l0n11XZ0akSTT0TS9m3NuEdA==
=FZws
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMRTsACgkQmmx57+YA
GNkDjg/+MEaAoe64LHBe1wDlq9jJJan8LegEJ5CA72hs6St3QT8PHh0vYpwx5AIX
xfDiSGugDQJpXgTj2qO0lLgaFJk8fH79UtCiLxInhqh5k3xrvO9ocYAcy8h37OCK
L3RNPZnNQBwSdqaqnmF60CQ+5/GgnI9A5F5sywxYXfDOayJsuqWHoMTGirWn3N7u
o8JURpXx1gOAZmnspyMku17ZodJNO96YB7Z3gihNV95trhddraRkT8v4hW2c3kA1
LjvxbDmfjh7E0DFm9okaPzwrsRtWavOLGI/gAsXD3q8iwd3GBS1/1HXghavDVFpF
wAgxk1d5FcGqr/AlJwuHc6yJ5YWfMJs/dnkvvbSNNQugmEDm6fsd56JyV0LnGXxu
ztcimNhAdZcUeidgQ/zMeBeKZ8ItXgvGTKyg6VwxxVveiFHoXYy53/mILGZFTyjB
1Wp+Hhv3/mxWt/IH+vx+Y5Dm83T9BEiQvWnT+s2OyqEzJK9O39bv5x8xhahBbkvQ
7CohB9CEzPSWKDf96grdUGEVwdQW/NXlAIVPts79HhvM0TmHKtdTJq4cqrqq+Vrl
WhRm+hsWgHI4tHTUCkcjDk0pm3i7VSMkQexJofgGW7HO14xlOx5YyhXmHhlcp0sQ
GFsJ9sp+E4yg5mvGw+Mot1D2kF4ZXzsDjzMqqZceeENMtDe+X2k=
=9m0W
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 5.20:
- A series from Alexander Stein to fix some i.MX6UL dt_binding_check
warnings.
- Replace deprecated 'enable-sdio-wakeup' property with 'wakeup-source'
for a couple of boards.
- A set of imx7-colibri device tree updates from Marcel Ziswiler to
improve devices Display, Touch, Ethernet and SD/MMC, and also adds
Toradex Iris carrier board.
- A few improvements on imx6qdl-colibri board, correct SGTL5000 MCLK
handling, simplify handling of inverted PWM backlight.
- A series from Max Krummenacher (and Oleksandr Suvorov) to improve the
existing i.MX6 Apalis carrier board device trees and adds a new device
tree for the Ixora V1.2 carrier board.
- Add USB dual-role switching using extcon for imx7-colibri board.
- Add SFP node for TA 2.1 devices for LayerScape SoCs.
- Other small and random updates on various boards.
* tag 'imx-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (61 commits)
ARM: dts: layerscape: Add SFP node for TA 2.1 devices
ARM: dts: imx6qdl-prti6q.dtsi: Add applicable properties to usdhc3
ARM: dts: imx6q-bosch-acc: Replace 'enable-sdio-wakeup'
ARM: dts: imx7d-smegw01: Replace 'enable-sdio-wakeup'
ARM: dts: imx6q-apalis: Cleanup
ARM: dts: imx6q-apalis: backlight pwm: Adapt brightness steps
ARM: dts: imx6q-apalis: backlight pwm: Simplify inverted backlight
ARM: dts: imx6q-apalis: Add support for Toradex Ixora V1.2 carrier boards
ARM: dts: imx6q-apalis: Clean-up sd card support
ARM: dts: imx6q-apalis: Add adv7280 video input
ARM: dts: imx6q-apalis: Add ov5640 mipi csi camera
ARM: dts: imx6q-apalis: Disable stmpe touchscreen
ARM: dts: imx6q-apalis: Disable HDMI
ARM: dts: imx6q-apalis: Add LVDS panel support
ARM: dts: imx6q-apalis: move gpio-keys to SoM dtsi
ARM: dts: imx6q-apalis: Move Atmel MXT touch ctrl to SoM dtsi
ARM: dts: imx6q-apalis: Move pinmux groups to SoM dtsi
ARM: dts: imx6q-apalis: Move parallel rgb interface to SoM dtsi
ARM: dts: imx6q-apalis: Command pmic to standby for poweroff
ARM: dts: imx6q-apalis: Add gpio-line-names
...
Link: https://lore.kernel.org/r/20220709082951.15123-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds and enables various hardware on Tegra234 (host1x, VIC, GPCDMA)
as well as the Control BackBone related device tree nodes on Tegra194
and Tegra234.
Native timers are enabled on Tegra186, Tegra194 and Tegra234, which
allow keeping track of SoC-wide timestamps as well as hardware watchdog
functionality.
The audio subsystem is enhanced with the Output Processing Engine (OPE)
on Tegra210 and later.
Finally there are a handful of minor cleanups and fixes.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIemkTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zocb7EACxWEuPWxorxTlmGa4aHQano8W/D0Yn
ouaJJ+itWqe0AGJ1nmsdv4oBD93pYsIIk+eGAQPQPP1IzrK0Py4TmLuNecI/r8P7
LBNCpkZkKtmRVkWC5ujZli1eLBqZUIqfCqdvlXikHA/Vb6oLiCyOHq4/nyfNUiAP
S4geszaKBju4L/NbpQvXyGHsqlw34D1pTRGc0xmUuiqGlSKsExaQDag7OhPbtYv3
b0PfQidG4CmshwThxXiRbz3Fvy+wLjnIjBAiABDq6hEaBY8kN4Ogn4C4pr3xtqd1
ocy4/TLe0rRTIMnRCjfMkQgOuYsmApB/YOshnZR3sVBa9Ufe0L+0EKjp0IK7qDyQ
5OnI4CecmmWojng389vM8lCm9qiIOb+wPZo3VN3E1rkEfadyA+2GswQJt/DIKhtG
YYSnPe2ftAwxfW9CFzSQbrBQFS/oBG7Kf2wXb1nV09aU8woMqWYq6vA1FFQiNm0X
O+ZQYy70iy1Q2HrYDlZLgoTAlRSKiWWGZsDz9zkFUGNMt0QAT6gOsrO1BzJ535Qv
EJioAYuBSSo1fULg7NMp2d+cTHRKgOua6BQfVDm92dmNUVlVzHkd73CnxNV/6Jni
JpW3rsBLCfoery2dE+B52MqYor5MEFynjU4ulv1FdPU2L/t05dHHZeRJWDWgrEOE
xmej7X0Ex4+LlA==
=7G79
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMRAAACgkQmmx57+YA
GNmRPxAAgoQryNpvwl3+rFoghpbUrxn/ld9+ODvy8+/zMs8SJg5znA4BK+o3vmGx
+A9nFXDe4+SnzPbggy7af2nN+iGfIXVwLP6F9kXPRhjgvM/PFOAtyvXSt5ZL2vWY
wxL5gT3NaoZSxMPdjyB5A/Dgj/uUZ5QodcUnYZsHa/fN4e9sFaohv7kFsda5HUre
ypU1owYRIOZMgpdYJe69v9iZyQMo+AV3ZyjSzvJ0gnDSh/DaeLWbwp0zf1cFj2Fe
O9lVD65CyU0mVpVWvjou+poZyZ7yYq4XgSoISSZNXPy/DZVNFJXJjjklxjD2IT3R
3F+emmiFFpOzytOQHwOjku8t1uaJKpuiTgLRG5isKO5gyMfOhN2CPEWf7Zg+DSZ7
7EV9OFsX4h+wpDPfcj/ENtH9+Acm7SUsryhK1BFGrqoJCbBf2M+T2+uot5GsPb1e
ERbXi/msdZR8cfnu5+z/+ZRcENrHWdIM0MZ15qKjVkGADxv4WORPp4VAk6VQN7bb
V1ssKOwimDEAMRaFADyZnQ8rY+s+hPO0NWWsLIjhD3PPyjYyvl1AZDJo8h4OlUNR
1BMe0AO1rm4xBoQXpyQQlf96Aand5wV0UThE323I0DoxB08SpjH4FKbDmnQUpMAz
YGIEpEftU2qMLgBdyIwLz/b0oTaIPeDLgEu24TVg6WoI2bXF93M=
=fixm
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.20-rc1
This adds and enables various hardware on Tegra234 (host1x, VIC, GPCDMA)
as well as the Control BackBone related device tree nodes on Tegra194
and Tegra234.
Native timers are enabled on Tegra186, Tegra194 and Tegra234, which
allow keeping track of SoC-wide timestamps as well as hardware watchdog
functionality.
The audio subsystem is enhanced with the Output Processing Engine (OPE)
on Tegra210 and later.
Finally there are a handful of minor cleanups and fixes.
* tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Fix SDMMC1 CD on P2888
arm64: tegra: Update compatible for Tegra234 GPCDMA
arm64: tegra: Add Host1x and VIC on Tegra234
arm64: tegra: Add Host1x context stream IDs on Tegra186+
arm64: tegra: Enable native timers on Tegra234
arm64: tegra: Enable native timers on Tegra194
arm64: tegra: Enable native timers on Tegra186
arm64: tegra: Add node for CBB 2.0 on Tegra234
arm64: tegra: Add node for CBB 1.0 on Tegra194
arm64: tegra: Align gpio-keys node names with dtschema
arm64: tegra: Mark BPMP channels as no-memory-wc
arm64: tegra: Add Tegra234 GPCDMA device tree node
arm64: tegra: Adjust whitespace around '='
arm64: tegra: Enable OPE on various platforms
arm64: tegra: Add OPE device on Tegra210 and later
Link: https://lore.kernel.org/r/20220708185608.676474-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Two minor fixes to help reduce the noise from the DT validation tooling.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIeZUTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zod5fEACvewPLXw2IuelJkmOLsLCs+6bP4JaD
TXLThFgOHvk46ZhcJfLNZJ/73xC6ZULjRUo7Kj7dPeD6Bptj4xQMEwDhw+FIijQd
VCV1eZZSbOuE4HAiiWzOzWspFe6OafecM3G8TNZt2LuRQUGrF619hD+w3bX3jm59
G7iPSmzlpZEb42XudF6YUPMCz/HB1J0L3yIpNkaPnpFBzn0kLVgXXTCebk/9r5JE
UyorpGaHwVsUqKQirjdx66pvItxp79860r8SLX5bltTclgDX5Ir3yurgoWtMR6hT
p90g9hNsxo4g8nw9e+POi4jgQudCXTThbBwbuJs9CjWZ/+iB0r10KiCOEggVlcqC
v60uZxaNvr1xPdHYzNdRzoeTgLxJEvgv1T0kKNs7xzbqLHywIkdimkUtwWq9ZbeH
nWztZ1FW7IXCwWxFiihZBzktA33i5grtCc9xVAHdPVQnInfgUUjhZfqaonFy6qQV
ezo4Pt1Vp03yc9Vy2wKUznk1iD0PcU/QEf8bwBO2gMlgBUCr1DEtk4kP4HQY7gG2
dr7dTjYptY/30Asef0fc8g93loqL0CCnWmcirp8yrN3NaObEB597bYkidYGygSNz
JwaCw6bdsYxcqh2mKAaVczY0CYVKn0PZhvEHNA4Vhnt3YRLprFKCb9enRmV3wvV2
uOSpdL4UT+wVAQ==
=dXxp
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMQ8oACgkQmmx57+YA
GNlqVxAAv2s1Jf+51aPEZJvBl1O+BDebaQBBiceanED5pU3RS6bdfQA8Sk+PBs+/
T1q2bQCyLU/aDR4VUfbJr0uK3EqvIwnhGRAisXSGSergA+tO6VPQ/83iCLYFmaSZ
AsT0bN09SfiEoGamC+GGieRVNOenzOzay1oMozxCKliS2ADkHfFuwXgLdIA0CWJC
repCHf/9IJN7RDiSlY/r+SJxCKN2EJbc8fNc5wO+K/QP02yGPi3ddwBFFkfikTGp
SYsRJJ7v+UAmZ8pjNKtHwMV3woK1rGTcUxWYvHo+wQ2gJShCUSVuqNwhXRqKB7zT
h8Uj7ZjaG8Zq7ZuHwQmFgubNBQmwDOVdShVJhLA+AMbcE9OOjqqBFtyaIBtNZlml
TjvOiuPUkcPuTOaC0HPQifus8MGnXAUh1qWXANb0MwI0WHLu6d0+TUTMyt/oZzgD
EPu/fN4GoVI0Dj/88ZP8Zu1J8eNu7ULToC/p9pUdMT0XHLDWXG2IkkgyASj7YZpu
sZML7cA3MJA4APTaJIa2b30Vv+Cl8gfOfv+csdi9t+AjRMo+/gGfoG5i7tFbfHQq
4FZzV2cgIp4Zh5Icl9iRmUHj13B2MaBzaKAuiWqQHO4RsevpxlrNQvrbOilyQQJF
yqK+r14gwdLOx4zkaP0emsCe39RXLEvFD5Ob3SPQ0A8jEQ1fB0w=
=Lh+F
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.20-rc1
Two minor fixes to help reduce the noise from the DT validation tooling.
* tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Align gpio-keys node names with dtschema
ARM: tegra: Adjust whitespace around '='
Link: https://lore.kernel.org/r/20220708185608.676474-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These changes add clock, reset, memory client and power domain
definitions for various devices found on Tegra234 along with a few
device tree bindings for new hardware.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIeLYTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zodtBEACW4bu7bO2/aAQNOX4R0qUOM64nj9cE
sqxo1A7JxxGQWBsjiVCD62nCnRP1ehqF2anVEdCJvh2eXlWHdhTgs/lV2HK712Ny
otkgok/1pVKfvwTuziyqyOHyKD0j2ZoDJlRgYDTF+WUrVrXXnQyc32lt+zmibtH1
w3TIx6vx4FUnYJELNQPeqbbBP450eIGJ8fZBhIM68kqF/4HKVb4e2jofV3Gd1SBx
wSBDW63nvqmvErmHfS9LVEX5GcRm0m4RvHWCMK61yc92BwlRKOlweTYczfZmw3oB
feVtW59+yHYUWa9Dx7PATz7ns+YgpVI9ZU35NKT31/B0gLWh52kZuXFwA9g+02fE
vq7qV3FhFZtyMBp8CaYopp1INCxU0xXTxvIRw+R00Y5Fab6XUGz+qKTDyHVfhkcD
LtSHyWQ5h/PAUrcBaAALuvkU8ZCYvdOfTQMQBm5sUoTBMFQ7GsuvOmGy48HbWxLV
n1SRZNNoXAKWK20Ko+ydLe5rAWpAKOb5onufPhm0JiGziVto/Q/qz9tsh+5lE0Gw
v9W9poXoLlfwpAdLteAchKCgCGIuWims0XwRxVz8lvudEb6OUyMlr2eUNNYFMGsd
SnPwHUO67fm6/hxA5NoHDuy0mdynJEcDXaJ+OORfezT/JILgIughAp51+/Whk88p
ByXU/MOC+61yoA==
=3/dX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMQ3IACgkQmmx57+YA
GNldFQ//SrIZR5mCeRnLSZEdw5xah7TXwvIOvDw+4JQ3Fbrzq63L/ggm307q6WcC
4ymOP0ImzAxbHp7Vc5qb6wELSSIiGBy/4y3g/rVinK1ZFRqHiiOkVwHABQp5GMhM
h/Xm3QVym9UDA4a0hy6EUREb5QHo0l/yYgsXoRJLfh1HuARswevAu2GK+Q4rEH1b
8aG8xm7fbhafhAJzzJkufOH6WHyhelP0zCVs9Ipa0oOcz1t0/cqYhLDQH/43r76z
oN+NbEOuCxEShTAhEZ2K5F6lXtR1CB20BE4y5lfMebevSRIXjfN2XfQnJfcAcCY/
CfT0RCi0w4uz5ZgnkWhI+SbXNT7oHSDvdEogOI1yKm1tm0F8PqUKsPv3tL/P7H0D
BcOmPslYP10iRuwXDZzbE5FgCZwjIacwJF24BLqI8nEr1U6aC13rwlnsB7mWk1E5
OXuo/1T0X8R34OrZQzkNpV2WAhT/jNMC5Pj01h0A2XAX0UGB2vP+P5wWurumMkwn
V8VX82qN0FN6LOOnm+YgreLHv8uR6V95EzIDnvND3dyz0qvsajlIo1Q+PACsVUOA
fBuxDd2/ABAMglqNNTZTg75PIosrbRqtaaZDq2ehlyWUjn4BGWaEv4W0zZBpyrZB
CMUQ7ZBhJapvXoRxjOkkPU7WmfYo/CQtjxRkkBS03O+xNIZJxRo=
=iDCl
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.20-rc1
These changes add clock, reset, memory client and power domain
definitions for various devices found on Tegra234 along with a few
device tree bindings for new hardware.
* tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra-ccplex-cluster: Remove status from required properties
dt-bindings: Add headers for Host1x and VIC on Tegra234
dt-bindings: timer: Add Tegra186 & Tegra234 Timer
dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
dt-bindings: memory: Add Tegra234 MGBE memory clients
dt-bindings: Add Tegra234 MGBE clocks and resets
dt-bindings: power: Add Tegra234 MGBE power domains
dt-bindings: Add headers for Tegra234 GPCDMA
Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
TQMa8MPxL is a SOM family using NXP i.MX8MP CPU family
MBa8MPxL is an evaluation mainbord for this SOM
The SOM needs a mainboard, therefore we provide two compatibles here:
"tq,imx8mp-<SOM>" for the module and
"tq,imx8mp-<SOM>-<SBC>"
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Revisions 1.0 and 1.1 of the PinePhone mainboard do not have an external
resistor connecting HBIAS to MIC2P. Enable the internal resistor to
provide the necessary headeset microphone bias.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220621035452.60272-4-samuel@sholland.org
All of the sunxi SoCs since at least the A33 have a similar structure
for the MBUS and DRAM controller, but they all have minor differences in
MBUS port assignments and DRAM controller behavior. Give each SoC its
own compatible.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220702042447.26734-2-samuel@sholland.org
Some older SoCs use a deprecated MBUS binding with some clocks missing.
Currently, new SoCs must opt in to the complete binding. This should be
the default, so new SoCs do not accidentally use the deprecated version.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220702042447.26734-1-samuel@sholland.org
Hook SDMMC1 CD up with CVM GPIO02 (SOC_GPIO11) used for card detection on J4
(uSD socket) on the carrier.
Fixes: ef633bfc21 ("arm64: tegra: Enable card detect for SD card on P2888")
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use the compatible specific to Tegra234 for GPCDMA to support
additional features.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree nodes for Host1x and VIC on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add Host1x context stream IDs on systems that support Host1x context
isolation. Host1x and attached engines can use these stream IDs to
allow isolation between memory used by different processes.
The specified stream IDs must match those configured by the hypervisor,
if one is present.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The native timers IP block found on NVIDIA Tegra SoCs implements a
watchdog timer that can be used to recover from system hangs. Add and
enable the device tree node on Tegra234.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The native timers IP block found on NVIDIA Tegra SoCs implements a
watchdog timer that can be used to recover from system hangs. Add and
enable the device tree node on Tegra194.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable the native timers on Tegra186 chips to allow using the watchdog
functionality to recover from system hangs.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra234 uses the Control Backbone (CBB) version 2.0. Add the nodes
that enable error handling from the various CBB 2.0 fabrics found on
Tegra234.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree nodes to enable error handling on the Control Backbone
(CBB). Tegra194 uses CBB version 1.0.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra SYSRAM contains regions access to which is restricted to
certain hardware blocks on the system, and speculative accesses to
those will cause issues.
Patch 'misc: sram: Only map reserved areas in Tegra SYSRAM' attempted
to resolve this by only mapping the regions specified in the device
tree on the assumption that there are no such restricted areas within
the 64K-aligned area of memory that contains the memory we wish to map.
Turns out this assumption is wrong, as there are such areas above the
4K pages described in the device trees. As such, we need to use the
bigger hammer that is no-memory-wc, which causes the memory to be
mapped as Device memory to which speculative accesses are disallowed.
As such, the previous patch in the series,
'firmware: tegra: bpmp: do only aligned access to IPC memory area',
is required with this patch to make the BPMP driver only issue aligned
memory accesses as those are also required with Device memory.
Fixes: fec29bf049 ("misc: sram: Only map reserved areas in Tegra SYSRAM")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree nodes for Tegra234 GPCDMA
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable OPE module usage on various Jetson platforms. This can be plugged
into an audio path using ALSA mixer controls. Add audio-graph-port binding
to use OPE device with generic audio-graph based sound card.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Output Processing Engine (OPE) is a client of AHUB and is present on
Tegra210 and later generations of Tegra SoC. Add this device on the
relevant SoC DTSI files.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The "status" property is implied to be "okay" if it isn't present, so do
not mark it as required.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add clock, memory controller, powergate and reset dt-binding headers
for Host1x and VIC on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra186 timer provides ten 29-bit timer counters and one 32-bit
timestamp counter. The Tegra234 timer provides sixteen 29-bit timer
counters and one 32-bit timestamp counter. Each NV timer selects its
timing reference signal from the 1 MHz reference generated by USEC,
TSC or either clk_m or OSC. Each TMR can be programmed to generate
one-shot, periodic, or watchdog interrupts.
Signed-off-by: Kartik <kkartik@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
development board,
- AA1024XD12 panel overlay support for the Draak, Ebisu, and
Salvator-X(S) development boards,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYsfxkAAKCRCKwlD9ZEnx
cGKNAQC5Wl91yn3heD50V0vXjs6CqNm/bdrWOEmnwwlcnyClqQEAnQjTHs4iriar
110WP2JSNUoZwawygZFq0jHBgMVFOQA=
=LnAY
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLIF6MACgkQmmx57+YA
GNkxQw//ZHD0LKpT4v1C1o1y4MNuVujljbC/uS9Wk+vhYuWebo0OKAu8CEyAwoVO
SsnYuNpzjLiMlbDc+Id+9C9IbF2k97hUJWDJWMOLF2wtESRtAwkoYHiJToMH9216
zUxrFpah4LAMKDwPxOqLvBl9/5Hzy4L7tfslmQijiupfGGF6gWiWrA+kgBXpX9+L
Y1H9PdTd+XLuqmXXa3o+RA0n8d6ZlYxYAJ73OC6nXhr/fd2dpmS/nYtchM3AeLVp
QAJSf9NnJQPm17G+6TvBHOIOBjyCSsLWemNEbXPkyW3X/H/LCz1RyEeU0fy0B4eu
wzEwLd/YveEh8WX/l+r8g6gF8OjzzXoQvFIAe4lfXvkUhwFohiCQuBXI34TBzCzb
fGUKJohs6GSrjKRskIJzaojuaHuKMIlX3+Ynx8XoJqczbWZpqdMs+xTFBnNk8HGH
lYLsX+rlphZhPeTPQNT2Q7eEnH3skTzBG2Hmhy/2kpZMxtV/epdMt/+BRSRsa/Rp
LKAL+npYkF9m8Xn0HyWCh2gEpWTHnBOGG/8O7XaPQpJxEfKgCncBjRWGlJlze4Gh
zRJmfE4OyqhHnXmbpgRNglZjNtiq+z3L7vKLwFYYpvL3lcZtzr75vGpBCt+wyQMf
b2ZXUPVG0h7bIOuf6RvYYKkNgEePuLyXlAWuhaTdskoDUrQy2EA=
=wgc5
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.20 (take two)
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
development board,
- AA1024XD12 panel overlay support for the Draak, Ebisu, and
Salvator-X(S) development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
ARM: dts: r9a06g032-rzn1d400-db: Add switch description
dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
ARM: dts: r9a06g032: Describe switch
ARM: dts: r9a06g032: Describe GMAC2
ARM: dts: r9a06g032: Describe MII converter
arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
ARM: dts: renesas: Fix DA9063 watchdog subnode names
arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz
Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch adds the
fsl,scu.yaml in the firmware bindings folder. This one is only for
the main SCU node. The old txt file will be removed only after all
the child nodes have been properly switch to yaml.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'watchdog' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'thermal' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'rtc' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'power controller' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'ocotp' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'keys' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'iomux/pinctrl' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'clock' child node of the SCU main node.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add device-tree binding documentation to represent the Control Backbone
(CBB) version 2.0 used on Tegra234 SoCs.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device-tree binding documentation to represent the AXI2APB bridges
used by Control Backbone (CBB) 1.0 on Tegra194 SoCs. All errors for APB
slaves are reported as slave error because APB bas single bit to report
error. So, CBB driver needs to further check error status registers of
all the AXI2APB bridges to find error type.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device-tree binding documentation to represent the Control Backbone
(CBB) version 1.0 used on Tegra194 SoCs.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the memory client and stream ID definitions for the MGBE hardware
found on Tegra234 SoCs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the clocks and resets used by the MGBE Ethernet hardware found on
Tegra234 SoCs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add power domain IDs for the four MGBE power partitions found on
Tegra234.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
