Commit graph

322177 commits

Author SHA1 Message Date
Richard Zhao
1530280084 usb: chipidea: add imx platform driver
This patch supports only the host-mode functionality so far.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peter Chen <peter.chen@freescale.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Felipe Balbi <balbi@ti.com>
Tested-by: Subodh Nijsure <snijsure@grid-net.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 10:01:09 -07:00
Richard Zhao
b3d9968122 usb: otg: add basic mxs phy driver support
mxs phy is used in Freescale i.MX SoCs, for example
imx23, imx28, imx6Q. This patch adds the basic host
support.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peter Chen <peter.chen@freescale.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Subodh Nijsure <snijsure@grid-net.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:59:23 -07:00
Richard Zhao
a2c3d6902f usb: chipidea: permit driver bindings pass phy pointer
Sometimes, the driver bindings may know what phy they use.
For example, when using device tree, the usb controller may have a
phandler pointing to usb phy.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Subodh Nijsure <snijsure@grid-net.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:59:23 -07:00
Daniel Wagner
496f1314f9 cgroup: Remove populate() documentation
This function was removed by 86f82d5618.

Signed-off-by: Daniel Wagner <daniel.wagner@bmw-carit.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Rob Landley <rob@landley.net>
Cc: Paul Menage <paul@paulmenage.org>
Cc: Li Zefan <lizf@cn.fujitsu.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
2012-07-09 09:56:23 -07:00
Richard Zhao
526c51382d usb: otg: add notify_connect/notify_disconnect callback
This let usb phy driver has a chance to change hw settings when connect
status change.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Tested-by: Subodh Nijsure <snijsure@grid-net.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:55:09 -07:00
Richard Zhao
ca72ae9bf6 usb: chipidea: select USB_EHCI_ROOT_HUB_TT in USB_CHIPIDEA_HOST of Kconfig
ci13xxx host needs Root Hub Transaction Translators.

Reported-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:55:09 -07:00
Richard Zhao
fe6e125e30 USB: Chipidea: add ci13xxx device id management
We use ida_simple_get and ida_simple_remove to manage the ids.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:53:44 -07:00
Richard Zhao
cbc6dc2af3 USB: Chipidea: add unified ci13xxx_{add,remove}_device for platform drivers
Platform drivers do the similar things to add/remove ci13xxx device, so
create a unified one.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:53:44 -07:00
Richard Zhao
26c696c678 USB: Chipidea: rename struct ci13xxx variables from udc to ci
struct ci13xxx represent the controller, which may be device or host,
so name its variables as ci.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:52:15 -07:00
Kuninori Morimoto
2f0de9d844 usb: renesas_usbhs: use dmaengine helper functions
This patch used dmaengine helper functions instead of using hand setting.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:48:26 -07:00
Kishon Vijay Abraham I
277bd8746b drivers: usb: otg: fix build break in twl6030-usb.c
Fixed a mistake in the merge conflict resoultion commit(ff9cce) in file
twl6030-usb.c

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:46:51 -07:00
Hans de Goede
fe2072cc17 usb/hcd: Ensure scatter-gather is not used for isoc transfers
We don't support sg for isoc transfers, enforce this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 09:46:50 -07:00
Will Deacon
ad72254114 ARM: 7456/1: ptrace: provide separate functions for tracing syscall {entry,exit}
The syscall_trace on ARM takes a `why' parameter to indicate whether or
not we are entering or exiting a system call. This can be confusing for
people looking at the code since (a) it conflicts with the why register
alias in the entry assembly code and (b) it is not immediately clear
what it represents.

This patch splits up the syscall_trace function into separate wrappers
for syscall entry and exit, allowing the low-level syscall handling
code to branch to the appropriate function.

Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:44:14 +01:00
Will Deacon
5125430ccc ARM: 7455/1: audit: move syscall auditing until after ptrace SIGTRAP handling
When auditing system calls on ARM, the audit code is called before
notifying the parent process in the case that the current task is being
ptraced. At this point, the parent (debugger) may choose to change the
system call being issued via the SET_SYSCALL ptrace request, causing
the wrong system call to be reported to the audit tools.

This patch moves the audit calls after the ptrace SIGTRAP handling code
in the syscall tracing implementation.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:44:14 +01:00
Will Deacon
64284a9f8a ARM: 7454/1: entry: don't bother with syscall tracing on ret_from_fork path
ret_from_fork is setup for a freshly spawned child task via copy_thread,
called from copy_process. The latter function clears TIF_SYSCALL_TRACE
and also resets the child task's audit_context to NULL, meaning that
there is little point invoking the system call tracing routines.
Furthermore, getting hold of the syscall number is a complete pain and
it looks like the current code doesn't even bother.

This patch removes the syscall tracing checks from ret_from_fork.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:44:12 +01:00
Will Deacon
8f827a1468 ARM: 7453/1: audit: only allow syscall auditing for pure EABI userspace
The audit tools support only EABI userspace and, since there are no
AUDIT_ARCH_* defines for the ARM OABI, it makes sense to allow syscall
auditing on ARM only for EABI at the moment.

Cc: Eric Paris <eparis@redhat.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:44:12 +01:00
Will Deacon
d0a533b182 ARM: 7452/1: delay: allow timer-based delay implementation to be selected
This patch allows a timer-based delay implementation to be selected by
switching the delay routines over to use get_cycles, which is
implemented in terms of read_current_timer. This further allows us to
skip the loop calibration and have a consistent delay function in the
face of core frequency scaling.

To avoid the pain of dealing with memory-mapped counters, this
implementation uses the co-processor interface to the architected timers
when they are available. The previous loop-based implementation is
kept around for CPUs without the architected timers and we retain both
the maximum delay (2ms) and the corresponding conversion factors for
determining the number of loops required for a given interval. Since the
indirection of the timer routines will only work when called from C,
the sa1100 sleep routines are modified to branch to the loop-based delay
functions directly.

Tested-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:42:23 +01:00
Will Deacon
923df96b9f ARM: 7451/1: arch timer: implement read_current_timer and get_cycles
This patch implements read_current_timer using the architected timers
when they are selected via CONFIG_ARM_ARCH_TIMER. If they are detected
not to be usable at runtime, we return -ENXIO to the caller.

Furthermore, if read_current_timer is exported then we can implement
get_cycles in terms of it for use as both an entropy source and for
implementing __udelay and friends.

Tested-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:42:23 +01:00
Will Deacon
b9a50f7490 ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs
DCACHE_WORD_ACCESS uses the word-at-a-time API for optimised string
comparisons in the vfs layer.

This patch implements support for load_unaligned_zeropad for ARM CPUs
with native support for unaligned memory accesses (v6+) when running
little-endian.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:41:11 +01:00
Will Deacon
8c56cc8be5 ARM: 7449/1: use generic strnlen_user and strncpy_from_user functions
This patch implements the word-at-a-time interface for ARM using the
same algorithm as x86. We use the fls macro from ARMv5 onwards, where
we have a clz instruction available which saves us a mov instruction
when targetting Thumb-2. For older CPUs, we use the magic 0x0ff0001
constant. Big-endian configurations make use of the implementation from
asm-generic.

With this implemented, we can replace our byte-at-a-time strnlen_user
and strncpy_from_user functions with the optimised generic versions.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:41:11 +01:00
Will Deacon
4295b898f5 ARM: 7448/1: perf: remove arm_perf_pmu_ids global enumeration
In order to provide PMU name strings compatible with the OProfile
user ABI, an enumeration of all PMUs is currently used by perf to
identify each PMU uniquely. Unfortunately, this does not scale well
in the presence of multiple PMUs and creates a single, global namespace
across all PMUs in the system.

This patch removes the enumeration and instead uses the name string
for the PMU to map onto the OProfile variant. perf_pmu_name is
implemented for CPU PMUs, which is all that OProfile cares about anyway.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:41:10 +01:00
Will Deacon
881ccccb6b ARM: 7447/1: rwlocks: remove unused branch labels from trylock routines
The ARM arch_{read,write}_trylock implementations include unused
backwards branch labels, since we don't retry the locking operation
if the exclusive store fails.

This patch removes the labels.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:41:10 +01:00
Will Deacon
546c2896a4 ARM: 7446/1: spinlock: use ticket algorithm for ARMv6+ locking implementation
Ticket spinlocks ensure locking fairness by introducing a FIFO-like
nature to the granting of lock acquisitions and also reducing the
thundering herd effect when spinning on a lock by allowing the cacheline
to remain in a shared state amongst the waiting CPUs. This is especially
important on systems where memory-access times are not necessarily
uniform when accessing the lock structure (for example, on a
multi-cluster platform where the lock is allocated into L1 when a CPU
releases it).

This patch implements the ticket spinlock algorithm for ARM, replacing
the simpler implementation for ARMv6+ processors.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:41:10 +01:00
Will Deacon
575320d625 ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process
This patch introduces a new Kconfig option which, when enabled, causes
the kernel to write the PID of the current task into the PROCID field
of the CONTEXTIDR on context switch. This is useful when analysing
hardware trace, since writes to this register can be configured to emit
an event into the trace stream.

The thread notifier for writing the PID is deliberately kept separate
from the ASID-writing code so that we can support newer processors using
LPAE, where the ASID is stored in TTBR0. As such, the switch_mm code is
updated to perform a read-modify-write sequence to ensure that we don't
clobber the PID on CPUs using the classic 2-level page tables.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:41:10 +01:00
Lorenzo Pieralisi
27a5569dc6 ARM: 7444/1: kernel: add arch-timer C3STOP feature
When a CPU is shutdown its architected timer comparators registers are
lost. Within CPU idle, before processors enter shutdown they enter
clock events broadcast mode through the

clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, cpuid);

function where the local timers are emulated by a global always-on timer.
On CPU resume, the per-CPU tick device normal mode is restored by exiting
broadcast mode through

clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, cpuid);

In order for this mechanism to function, architected timers should add to
their feature C3STOP, which means that they are not able to function when the
CPU is in off-mode.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:41:09 +01:00
Paul Bolle
a5203c4ce6 ARM: 7460/1: remove asm/locks.h
Commit 64ac24e738 ("Generic semaphore
implementation") removed the last include of this header. Apparently it
was just an oversight to keep this header. It can safely be removed now.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:59 +01:00
Nicolas Pitre
9fa16b7755 ARM: 7439/1: head.S: simplify initial page table mapping
Let's map the initial RAM up to the end of the kernel .bss instead of
the strict kernel image area.  This simplifies the code as the kernel
image only needs to be handled specially in the XIP case.  That covers
the legacy ATAG location as well.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:39 +01:00
Genoud Richard
d0f34a11dd ARM: 7437/1: zImage: Allow DTB command line concatenation with ATAG_CMDLINE
This patch allows the ATAG_CMDLINE provided by the bootloader to be
concatenated to the bootargs property of the device tree.

This is useful to merge static values defined in the device tree
with the boot loader's (possibly) more dynamic values, such as
startup reasons and more.

The bootloader should use the device tree to pass those values to
the kernel, but that's not always simple (old bootloader or very
small one).

The behaviour is the same as the one introduced by Victor Boivie in
4394c12442 by extending the CONFIG_CMDLINE.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:39 +01:00
Catalin Marinas
9ad86ddde0 ARM: 7436/1: Do not map the vectors page as write-through on UP systems
The vectors page has been traditionally mapped as WT on UP systems but
this creates a mismatched alias with the directly mapped RAM that is
using WB attributes. On newer processors like Cortex-A15 this has
implications on the data/instructions coherency at the point of
unification (usually L2).

This patch removes such restriction.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:38 +01:00
Rabin Vincent
02df19b422 ARM: 7424/1: update die handler from x86
Robustify ARM's die() handling with improvements from x86:

 - Fix for a deadlock (before panic in the case of panic_on_oops) if we
   oops under a spinlock which is also used from interrupt handler,
   since the old code was unconditionally enabling interrupts.

 - Usage of arch spinlock so lockdep etc doesn't get involved while
   we're trying to dump out oopses.

 - Deadlock prevention in the unlikely event that die() recurses.

The changes all touch the same few lines of code, so they're done
together in one patch.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:37 +01:00
Russell King
ffae894035 ARM: MSM: use SGI0 to wake secondary CPUs
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:36 +01:00
Russell King
79d15ce999 ARM: OMAP: use SGI0 to wake secondary CPUs
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:36 +01:00
Russell King
98437b83ee ARM: Realview: use SGI0 to wake secondary CPUs
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:36 +01:00
Arnd Bergmann
929678005c ARM: 7459/1: irda/pxa: use readl_relaxed() to access OSCR register
After c00184f9ab4 "ARM: sa11x0/pxa: convert OS timer registers to IOMEM",
magician_defconfig and a few others fail to build because the OSCR
register is accessed by the drivers/net/irda/pxaficp_ir.c but has turned
into a pointer that needs to be read using readl.

There are other registers in the same driver that eventually should
be converted, and it's unclear whether we would want a better interface
to access the OSCR from a device driver.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:35 +01:00
Russell King
3169663ac5 ARM: sa11x0/pxa: convert OS timer registers to IOMEM
Make the OS timer registers have IOMEM like properities so they can
be passed to readl_relaxed/writel_relaxed() et.al. rather than being
straight volatile dereferences.  Add linux/io.h includes where
required.

linux/io.h includes added to arch/arm/mach-sa1100/cpu-sa1100.c,
 arch/arm/mach-sa1100/jornada720_ssp.c, arch/arm/mach-sa1100/leds-lart.c
 drivers/input/touchscreen/jornada720_ts.c, drivers/pcmcia/sa1100_shannon.c
from Arnd.

This fixes these warnings:

arch/arm/mach-sa1100/time.c: In function 'sa1100_timer_init':
arch/arm/mach-sa1100/time.c:104: warning: passing argument 1 of 'clocksource_mmio_init' discards qualifiers from pointer target type
arch/arm/mach-pxa/time.c: In function 'pxa_timer_init':
arch/arm/mach-pxa/time.c:126: warning: passing argument 1 of 'clocksource_mmio_init' discards qualifiers from pointer target type

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:37:35 +01:00
Stephen Boyd
ff081e05bf ARM: 7457/1: smp: Fix suspicious RCU originating from cpu_die()
While running hotplug tests I ran into this RCU splat

===============================
[ INFO: suspicious RCU usage. ]
3.4.0 #3275 Tainted: G        W
-------------------------------
include/linux/rcupdate.h:729 rcu_read_lock() used illegally while idle!

other info that might help us debug this:

RCU used illegally from idle CPU!
rcu_scheduler_active = 1, debug_locks = 0
RCU used illegally from extended quiescent state!
4 locks held by swapper/2/0:
 #0:  ((cpu_died).wait.lock){......}, at: [<c00ab128>] complete+0x1c/0x5c
 #1:  (&p->pi_lock){-.-.-.}, at: [<c00b275c>] try_to_wake_up+0x2c/0x388
 #2:  (&rq->lock){-.-.-.}, at: [<c00b2860>] try_to_wake_up+0x130/0x388
 #3:  (rcu_read_lock){.+.+..}, at: [<c00abe5c>] cpuacct_charge+0x28/0x1f4

stack backtrace:
[<c001521c>] (unwind_backtrace+0x0/0x12c) from [<c00abec8>] (cpuacct_charge+0x94/0x1f4)
[<c00abec8>] (cpuacct_charge+0x94/0x1f4) from [<c00b395c>] (update_curr+0x24c/0x2c8)
[<c00b395c>] (update_curr+0x24c/0x2c8) from [<c00b59c4>] (enqueue_task_fair+0x50/0x194)
[<c00b59c4>] (enqueue_task_fair+0x50/0x194) from [<c00afea4>] (enqueue_task+0x30/0x34)
[<c00afea4>] (enqueue_task+0x30/0x34) from [<c00b0908>] (ttwu_activate+0x14/0x38)
[<c00b0908>] (ttwu_activate+0x14/0x38) from [<c00b28a8>] (try_to_wake_up+0x178/0x388)
[<c00b28a8>] (try_to_wake_up+0x178/0x388) from [<c00a82a0>] (__wake_up_common+0x34/0x78)
[<c00a82a0>] (__wake_up_common+0x34/0x78) from [<c00ab154>] (complete+0x48/0x5c)
[<c00ab154>] (complete+0x48/0x5c) from [<c07db7cc>] (cpu_die+0x2c/0x58)
[<c07db7cc>] (cpu_die+0x2c/0x58) from [<c000f954>] (cpu_idle+0x64/0xfc)
[<c000f954>] (cpu_idle+0x64/0xfc) from [<80208160>] (0x80208160)

When a cpu is marked offline during its idle thread it calls
cpu_die() during an RCU idle period. cpu_die() calls complete()
to notify the killing process that the cpu has died. complete()
calls into the scheduler code and eventually grabs an RCU read
lock in cpuacct_charge().

Mark complete() as RCU_NONIDLE so that RCU pays attention to this
CPU for the duration of the complete() function even though it's
in idle.

Suggested-by: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:35:32 +01:00
Alan Stern
c5cf9212a3 EHCI: centralize controller suspend/resume
This patch (as1563) removes a lot of duplicated code by moving the
EHCI controller suspend/resume routines into the core driver, where
the various platform drivers can invoke them as needed.

Not only does this simplify these platform drivers, this also makes it
easier for other platform drivers to add suspend/resume support in the
future.

Note: The patch does not touch the ehci-fsl.c file, because its
approach to suspend and resume is so different from all the others.
It will have to be handled specially by its maintainer.

Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-07-09 08:54:18 -07:00
Keng-Yu Lin
929578ab03 HID: Add suport for the brightness control keys on HP keyboards
The keys are found on the keyboards bundled with HP All-In-One machines
with USB VID/PID of 04ca:004d and 04f2:1061.

Signed-off-by: Keng-Yu Lin <kengyu@canonical.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2012-07-09 16:23:33 +02:00
Frank Kunz
0e050923a7 HID: add Sennheiser BTD500USB device support
The Sennheiser BTD500USB composit device requires the
HID_QUIRK_NOGET flag to be set for working proper. Without the
flag the device crashes during hid intialization.

Signed-off-by: Frank Kunz <xxxxxmichl@googlemail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2012-07-09 16:21:32 +02:00
Martlin Ettl
9ea3c49896 backlight: fix memory leak on obscure error path
Dredged out of bugzilla

Reported-by: Martlin Ettl <ettl.martin@gmx.de>
Resolves-bug: https://bugzilla.kernel.org/show_bug.cgi?id=15492
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2012-07-09 16:20:11 +02:00
Tarun Kanti DebBarma
39f47d9f43 ARM: Kconfig update to support additional GPIOs in OMAP5
OMAP5 has 8 GPIO banks so that there are 32x8 = 256 GPIOs.
In order for the gpiolib to detect and initialize these
additional GPIOs and other TWL GPIOs, ARCH_NR_GPIO is set
to 512 instead of present 256.

Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Cousson, Benoit <b-cousson@ti.com>
Reported-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:40 +05:30
R Sricharan
35eb429875 ARM: OMAP5: Add the build support
Adding the build support required for OMAP5 soc
in to omap2+ config.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:40 +05:30
R Sricharan
6b5de09121 arm/dts: OMAP5: Add omap5 dts files
Adding the minimum device tree files required for
OMAP5 to boot.

Reviewed-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30
R Sricharan
0c1b6fac94 ARM: OMAP5: board-generic: Add device tree support
Adding the minimal support for OMAP5 evm board
with device tree.

Reviewed-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30
R Sricharan
c4082d499f ARM: omap2+: board-generic: clean up the irq data from board file
Move the irq_match arrays and the irq init functions of OMAP 2,3
and 4 based boards out of board-generic.c file and also rename the
irq init function to match the interrupt controller present in
the SOCs.

This is a preparatory patch to add the OMAP5 evm board's irq init
support with device tree.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30
Santosh Shilimkar
283f708ca8 ARM: OMAP5: Add SMP support
Add OMAP5 SMP boot support using OMAP4 SMP code. The relevant code paths
are runtime checked using cpu id

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30
Santosh Shilimkar
247c445c0f ARM: OMAP5: Add the WakeupGen IP updates
OMAP4 and OMAP5 share same WakeupGen IP with below few udpates on OMAP5.
- Additional 32 interrupt support is added w.r.t OMAP4 design.
- The AUX CORE boot registers are now made accessible from non-secure SW.
- SAR offset are changed and PTMSYNC* registers are removed from SAR.

Patch updates the WakeupGen code accordingly.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30
R Sricharan
e17933c2c0 ARM: OMAP5: l3: Add l3 error handler support for omap5
The l3 interconnect ip is same for OMAP4 and OMAP5.
So reuse the l3 error handler error code for OMAP5
as well. Also a few targets has been newly added for
OMAP5. So updating the driver for that here.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30
R Sricharan
1a5da219a4 ARM: OMAP5: gpmc: Update gpmc_init()
GPMC module is the same as in OMAP4.
Just update the base address and irq number.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30
R Sricharan
37b3280de2 ARM: OMAP5: timer: Add clocksource, clockevent support
Adding the Initialisaton for clocksource and clockevent device
on OMAP5 Socs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-09 19:14:39 +05:30