linux-xiaomi-chiron/arch/x86/kernel/cpu
Linus Torvalds d82924c3b8 Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 pti updates from Ingo Molnar:
 "The main changes:

   - Make the IBPB barrier more strict and add STIBP support (Jiri
     Kosina)

   - Micro-optimize and clean up the entry code (Andy Lutomirski)

   - ... plus misc other fixes"

* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/speculation: Propagate information about RSB filling mitigation to sysfs
  x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation
  x86/speculation: Apply IBPB more strictly to avoid cross-process data leak
  x86/speculation: Add RETPOLINE_AMD support to the inline asm CALL_NOSPEC variant
  x86/CPU: Fix unused variable warning when !CONFIG_IA32_EMULATION
  x86/pti/64: Remove the SYSCALL64 entry trampoline
  x86/entry/64: Use the TSS sp2 slot for SYSCALL/SYSRET scratch space
  x86/entry/64: Document idtentry
2018-10-23 18:43:04 +01:00
..
mcheck Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2018-10-23 16:16:40 +01:00
microcode x86/microcode: Update the new microcode revision unconditionally 2018-09-02 14:10:54 +02:00
mtrr x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number 2018-09-27 18:28:57 +02:00
.gitignore
amd.c x86/cpu/amd: Remove unnecessary parentheses 2018-10-03 08:27:47 +02:00
aperfmperf.c
bugs.c Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2018-10-23 18:43:04 +01:00
cacheinfo.c x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana 2018-09-27 18:28:57 +02:00
centaur.c x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() 2018-05-13 16:14:24 +02:00
common.c Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2018-10-23 18:43:04 +01:00
cpu.h x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana 2018-09-27 18:28:57 +02:00
cpuid-deps.c
cyrix.c x86/CPU: Use correct macros for Cyrix calls 2018-09-22 11:46:56 +02:00
hygon.c x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana 2018-09-27 18:28:57 +02:00
hypervisor.c
intel.c x86/spectre: Add missing family 6 check to microcode check 2018-08-27 10:29:14 +02:00
intel_pconfig.c
intel_rdt.c x86/intel_rdt: Prevent pseudo-locking from using stale pointers 2018-10-19 14:54:28 +02:00
intel_rdt.h x86/intel_rdt: Fix out-of-bounds memory access in CBM tests 2018-10-09 08:02:15 +02:00
intel_rdt_ctrlmondata.c x86/intel_rdt: Prevent pseudo-locking from using stale pointers 2018-10-19 14:54:28 +02:00
intel_rdt_monitor.c x86/intel_rdt/mba_sc: Feedback loop to dynamically update mem bandwidth 2018-05-19 13:16:44 +02:00
intel_rdt_pseudo_lock.c Merge branch 'x86/cache' into perf/core, to pick up fixes 2018-10-23 12:30:19 +02:00
intel_rdt_pseudo_lock_event.h x86/intel_rdt: Support L3 cache performance event of Broadwell 2018-06-24 15:35:48 +02:00
intel_rdt_rdtgroup.c x86/intel_rdt: Prevent pseudo-locking from using stale pointers 2018-10-19 14:54:28 +02:00
Makefile x86/cpu: Create Hygon Dhyana architecture support file 2018-09-27 16:14:05 +02:00
match.c
mkcapflags.sh
mshyperv.c x86/hyperv: Enable PV qspinlock for Hyper-V 2018-10-09 14:21:39 +02:00
perfctr-watchdog.c x86/events: Add Hygon Dhyana support to PMU infrastructure 2018-09-27 18:28:57 +02:00
powerflags.c
proc.c
rdrand.c
scattered.c
topology.c x86/cpu/topology: Provide detect_extended_topology_early() 2018-06-21 14:20:59 +02:00
transmeta.c
umc.c
vmware.c x86/paravirt: Use a single ops structure 2018-09-03 16:50:35 +02:00