Grace Kao 69388e15f5 pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler ... According to Braswell NDA Specification Update (#557593), concurrent read accesses may result in returning 0xffffffff and write instructions may be dropped. We have an established format for the commit references, i.e. cdca06e4e8 ("pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handler") Fixes: 0bd50d719b ("pinctrl: cherryview: prevent concurrent access to GPIO controllers") Signed-off-by: Grace Kao <grace.kao@intel.com> Reported-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>		2020-04-17 14:37:40 +03:00
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Kconfig	pinctrl: lynxpoint: Switch to pin control API	2019-12-13 16:48:49 +02:00
Makefile	pinctrl: lynxpoint: Move GPIO driver to pin controller folder	2019-12-13 16:48:47 +02:00
pinctrl-baytrail.c	pinctrl: baytrail: Enable pin configuration setting for GPIO chip	2020-04-13 13:14:35 +03:00
pinctrl-broxton.c
pinctrl-cannonlake.c
pinctrl-cedarfork.c
pinctrl-cherryview.c	pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handler	2020-04-17 14:37:40 +03:00
pinctrl-denverton.c	pinctrl: denverton: Update pin names according to v1.08	2019-08-08 12:57:01 +03:00
pinctrl-geminilake.c
pinctrl-icelake.c
pinctrl-intel.c	pinctrl: intel: Pass irqchip when adding gpiochip	2020-01-09 13:12:20 +02:00
pinctrl-intel.h	pinctrl: intel: Share struct intel_pinctrl for wider use	2019-12-13 16:48:47 +02:00
pinctrl-lewisburg.c	pinctrl: lewisburg: Update pin list according to v1.1v6	2019-11-21 15:04:16 +01:00
pinctrl-lynxpoint.c	pinctrl: lynxpoint: Update summary in the driver	2019-12-13 16:48:49 +02:00
pinctrl-merrifield.c
pinctrl-sunrisepoint.c	pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H	2020-04-13 13:14:35 +03:00
pinctrl-tigerlake.c	pinctrl: tigerlake: Tiger Lake uses _HID enumeration	2020-01-16 13:30:40 +02:00