We're supposed to list the supplies in the dt bindings but there are none in the eDP PHY bindings. Looking at the driver in Linux, I can see that there seem to be two relevant supplies: "vdda-phy" and "vdda-pll". Let's add those to the bindings. NOTE: from looking at the Qualcomm datasheet for sc7280, it's not immediately clear how to figure out how to fill in these supplies. The only two eDP related supplies are simply described as "power for eDP 0.9V circuits" and "power for eDP 1.2V circuits". From guessing and from comparing how a similar PHY is hooked up on other similar Qualcomm boards, I'll make the educated guess that the 1.2V supply goes to "vdda-phy" and the 0.9V supply goes to "vdda-pll" and I'll use that in the example here. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com> Link: https://lore.kernel.org/r/20220425140619.2.Iae013f0ff4599294189f3a6e91376fad137bbabf@changeid Signed-off-by: Vinod Koul <vkoul@kernel.org>
75 lines
1.4 KiB
YAML
75 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Qualcomm eDP PHY
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description:
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The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
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the physical interface for Embedded Display Port.
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properties:
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compatible:
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enum:
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- qcom,sc7280-edp-phy
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- qcom,sc8180x-edp-phy
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reg:
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items:
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- description: PHY base register block
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- description: tx0 register block
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- description: tx1 register block
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- description: PLL register block
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: aux
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- const: cfg_ahb
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"#clock-cells":
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const: 1
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"#phy-cells":
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const: 0
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vdda-phy-supply: true
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vdda-pll-supply: true
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- "#clock-cells"
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- "#phy-cells"
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additionalProperties: false
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examples:
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- |
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phy@aec2a00 {
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compatible = "qcom,sc8180x-edp-phy";
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reg = <0x0aec2a00 0x1c0>,
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<0x0aec2200 0xa0>,
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<0x0aec2600 0xa0>,
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<0x0aec2000 0x19c>;
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clocks = <&dispcc 0>, <&dispcc 1>;
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clock-names = "aux", "cfg_ahb";
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#clock-cells = <1>;
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#phy-cells = <0>;
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vdda-phy-supply = <&vdd_a_edp_0_1p2>;
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vdda-pll-supply = <&vdd_a_edp_0_0p9>;
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};
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...
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