linux-xiaomi-chiron/drivers/gpu
Hawking Zhang ed4454c384 drm/amdgpu: correct psp ucode arrary start address
For ASICs that need to load sys_drv_aux and sos_aux,
the sys_start_addr is not the start address of psp
ucode array because the sys_drv_aux and sos_aux actaully
located at the end of the ucode array, instead, the
psp ucode arrary start address should be sos_hdr +
sos_hdr_offset.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <John.Clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-15 17:25:42 -04:00
..
drm drm/amdgpu: correct psp ucode arrary start address 2021-06-15 17:25:42 -04:00
host1x gpu: host1x: Add early init and late exit callbacks 2021-03-31 17:42:14 +02:00
ipu-v3 gpu: ipu-v3: Add Rec.709 limited range support to DP 2021-05-10 17:20:29 +02:00
trace
vga vgaarb: Use ACPI HID name to find integrated GPU 2021-05-20 14:55:56 -04:00
Makefile