linux-xiaomi-chiron/drivers/gpu
Imre Deak cc99bc62ff drm/i915/dp: Ensure max link params are always valid
Atm until the DPCD for a connector is read the max link rate and lane
count params are invalid. If the connector is modeset, in
intel_dp_compute_config(), intel_dp_common_len_rate_limit(max_link_rate)
will return 0, leading to a intel_dp->common_rates[-1] access.

Fix the above by making sure the max link params are always valid.

The above access leads to an undefined behaviour by definition, though
not causing a user visible problem to my best knowledge, see the previous
patch why. Nevertheless it is an undefined behaviour and it triggers a
BUG() in CONFIG_UBSAN builds, hence CC:stable.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018094154.1407705-4-imre.deak@intel.com
(cherry picked from commit 9ad87de473)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2021-10-27 06:09:58 -04:00
..
drm drm/i915/dp: Ensure max link params are always valid 2021-10-27 06:09:58 -04:00
host1x gpu: host1x: debug: Dump DMASTART and DMAEND register 2021-08-13 18:23:32 +02:00
ipu-v3 Updates to the interrupt core and driver subsystems: 2021-08-30 14:38:37 -07:00
trace
vga vgaarb: don't pass a cookie to vga_client_register 2021-07-21 10:29:10 +02:00
Makefile