linux-xiaomi-chiron/tools/testing/selftests/powerpc/pmu/ebb
Athira Rajeev d81090ed44 selftests/powerpc: EBB selftest for MMCR0 control for PMU SPRs in ISA v3.1
With the MMCR0 control bit (PMCCEXT) in ISA v3.1, read access to
group B registers is restricted when MMCR0 PMCC=0b00. In other
platforms (like power9), the older behaviour works where group B
PMU SPRs are readable.

Patch creates a selftest which verifies that the test takes a
SIGILL when attempting to read PMU registers via helper function
"dump_ebb_state" for ISA v3.1.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Tested-by: Nageswara R Sastry <rnsastry@linux.ibm.com <mailto:rnsastry@linux.ibm.com>>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1621950703-1532-3-git-send-email-atrajeev@linux.vnet.ibm.com
2021-06-17 00:09:11 +10:00
..
.gitignore
back_to_back_ebbs_test.c
busy_loop.S
close_clears_pmcc_test.c
cpu_event_pinned_vs_ebb_test.c
cpu_event_vs_ebb_test.c
cycles_test.c
cycles_with_freeze_test.c
cycles_with_mmcr2_test.c
ebb.c
ebb.h
ebb_handler.S
ebb_on_child_test.c
ebb_on_willing_child_test.c
ebb_vs_cpu_event_test.c
event_attributes_test.c
fixed_instruction_loop.S
fork_cleanup_test.c
instruction_count_test.c
lost_exception_test.c
Makefile selftests/powerpc: EBB selftest for MMCR0 control for PMU SPRs in ISA v3.1 2021-06-17 00:09:11 +10:00
multi_counter_test.c
multi_ebb_procs_test.c
no_handler_test.c selftests/powerpc: Fix "no_handler" EBB selftest 2021-06-17 00:09:11 +10:00
pmae_handling_test.c
pmc56_overflow_test.c
reg_access_test.c
regs_access_pmccext_test.c selftests/powerpc: EBB selftest for MMCR0 control for PMU SPRs in ISA v3.1 2021-06-17 00:09:11 +10:00
task_event_pinned_vs_ebb_test.c
task_event_vs_ebb_test.c
trace.c
trace.h