Alexandre Ghiti 6d7f91d914 riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion ... The usage of CONFIG_PHYS_RAM_BASE for all kernel types was a mistake: this value is implementation-specific and this breaks the genericity of the RISC-V kernel. Fix this by introducing a new variable phys_ram_base that holds this value at runtime and use it in the kernel physical address conversion macro. Since this value is used only for XIP kernels, evaluate it only if CONFIG_XIP_KERNEL is set which in addition optimizes this macro for standard kernels at compile-time. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Tested-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Fixes: 44c9225729 ("RISC-V: enable XIP") Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-08-06 22:41:28 -07:00
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vdso
alternative-macros.h	riscv: alternative: fix typo in macro name	2021-06-10 20:35:05 -07:00
alternative.h
asm-offsets.h
asm-prototypes.h	riscv: add VMAP_STACK overflow detection	2021-07-06 12:11:38 -07:00
asm.h
atomic.h
barrier.h
bitops.h
bug.h
cache.h
cacheflush.h
cacheinfo.h
clint.h
clocksource.h
cmpxchg.h
cpu_ops.h
csr.h
current.h
delay.h
efi.h	RISC-V: load initrd wherever it fits into memory	2021-07-21 22:58:17 -07:00
elf.h
errata_list.h
fence.h
fixmap.h
ftrace.h
futex.h
gdb_xml.h
hugetlb.h
hwcap.h
image.h
io.h	RISC-V: Use asm-generic for {in,out}{bwlq}	2021-06-30 20:55:40 -07:00
irq.h
irq_work.h
irqflags.h
jump_label.h
kasan.h
Kbuild
kdebug.h
kexec.h
kfence.h	riscv: Enable KFENCE for riscv64	2021-06-30 20:55:41 -07:00
kgdb.h
kprobes.h
linkage.h
mmio.h
mmiowb.h
mmu.h
mmu_context.h	riscv: add ASID-based tlbflushing methods	2021-06-30 20:55:39 -07:00
mmzone.h
module.h
module.lds.h
numa.h
page.h	riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion	2021-08-06 22:41:28 -07:00
parse_asm.h
patch.h
pci.h
perf_event.h
pgalloc.h	mm/thp: define default pmd_pgtable()	2021-07-01 11:06:03 -07:00
pgtable-32.h
pgtable-64.h	RISC-V Patches for the 5.14 Merge Window, Part 1	2021-07-09 10:36:29 -07:00
pgtable-bits.h
pgtable.h	RISC-V Patches for the 5.14 Merge Window, Part 1	2021-07-09 10:36:29 -07:00
probes.h
processor.h
ptdump.h
ptrace.h	riscv: ptrace: add argn syntax	2021-07-05 20:53:09 -07:00
sbi.h
seccomp.h
sections.h	riscv: Map the kernel with correct permissions the first time	2021-06-30 21:18:58 -07:00
set_memory.h	riscv: Map the kernel with correct permissions the first time	2021-06-30 21:18:58 -07:00
smp.h
soc.h
sparsemem.h
spinlock.h
spinlock_types.h
stackprotector.h
stacktrace.h
string.h
switch_to.h
syscall.h
thread_info.h	riscv: add VMAP_STACK overflow detection	2021-07-06 12:11:38 -07:00
timex.h
tlb.h
tlbflush.h	riscv: fix build error when CONFIG_SMP is disabled	2021-06-08 17:05:03 -07:00
uaccess.h
unistd.h	arch, mm: wire up memfd_secret system call where relevant	2021-07-08 11:48:21 -07:00
uprobes.h
vdso.h
vendorid_list.h
vermagic.h
vmalloc.h
word-at-a-time.h