37d1583665
This register always appears to read 0 on <SDM845 generations so simply ignore it to avoid refreshing at ~3 Hz as seen on OnePlus 5 with a command-mode panel with the following spammed in dmesg every time the screen refreshes: [drm:_dpu_encoder_phys_cmd_wait_for_ctl_start:660] [dpu error]enc31 intf1 ctl start interrupt wait failed [drm:dpu_kms_wait_for_commit_done:525] [dpu error]wait for commit done returned -22 ... |
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| drm | ||
| host1x | ||
| ipu-v3 | ||
| trace | ||
| vga | ||
| Makefile | ||