Anup Patel b91f0e4cb8 RISC-V: KVM: Factor-out instruction emulation into separate sources ... The instruction and CSR emulation for VCPU is going to grow over time due to upcoming AIA, PMU, Nested and other virtualization features. Let us factor-out VCPU instruction emulation from vcpu_exit.c to a separate source dedicated for this purpose. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>		2022-07-29 17:14:40 +05:30
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asm	RISC-V: KVM: Factor-out instruction emulation into separate sources	2022-07-29 17:14:40 +05:30
uapi/asm	riscv: Wire up memfd_secret in UAPI header	2022-06-01 21:46:36 -07:00