Daniel Jurgens b47bd6ea40 {net, ib}/mlx5: Make cache line size determination at runtime. ... ARM 64B cache line systems have L1_CACHE_BYTES set to 128. cache_line_size() will return the correct size. Fixes: cf50b5efa2fe('net/mlx5_core/ib: New device capabilities handling.') Signed-off-by: Daniel Jurgens <danielj@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2016-10-29 12:00:39 -04:00
..
cmd.h	net/mlx5_core: Fix Mellanox copyright note	2015-04-02 16:33:42 -04:00
cq.h	{net,IB}/mlx5: CQ commands via mlx5 ifc	2016-08-14 14:39:15 +03:00
device.h	net/mlx5: Add MLX5_ARRAY_SET64 to fix BUILD_BUG_ON	2016-10-13 10:13:24 -04:00
doorbell.h	net/mlx5_core: Fix Mellanox copyright note	2015-04-02 16:33:42 -04:00
driver.h	{net, ib}/mlx5: Make cache line size determination at runtime.	2016-10-29 12:00:39 -04:00
fs.h	net/mlx5: Add sniffer namespaces	2016-08-18 18:49:59 +03:00
mlx5_ifc.h	Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net	2016-09-12 15:52:44 -07:00
port.h	net/mlx5: Separate query_port_proto_oper for IB and EN	2016-08-18 18:49:52 +03:00
qp.h	{net,IB}/mlx5: Modify QP commands via mlx5 ifc	2016-08-17 17:45:58 +03:00
srq.h	{net, IB}/mlx5: Refactor internal SRQ API	2016-06-23 11:20:07 -04:00
transobj.h	IB/mlx5: Support setting Ethernet priority for Raw Packet QPs	2016-01-21 12:01:09 -05:00
vport.h	net/mlx5: Enable setting minimum inline header mode for VFs	2016-08-17 17:45:59 +03:00