Ruchika Kharwar 690c70bab1 usb: phy: omap-usb3: fix dpll clock index ... Correction of the omap_usb3_dpll_params array when the sys_clk_rate is 20MHz. Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com> Signed-off-by: Ruchika Kharwar <ruchika@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>		2013-07-15 13:05:30 +03:00
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Kconfig
Makefile
of.c
phy-ab8500-usb.c
phy-fsl-usb.c
phy-fsl-usb.h
phy-fsm-usb.c
phy-fsm-usb.h
phy-gpio-vbus-usb.c
phy-isp1301-omap.c
phy-isp1301.c
phy-msm-usb.c
phy-mv-u3d-usb.c
phy-mv-u3d-usb.h
phy-mv-usb.c
phy-mv-usb.h
phy-mxs-usb.c
phy-nop.c
phy-omap-control.c
phy-omap-usb2.c
phy-omap-usb3.c	usb: phy: omap-usb3: fix dpll clock index	2013-07-15 13:05:30 +03:00
phy-rcar-usb.c
phy-samsung-usb.c
phy-samsung-usb.h
phy-samsung-usb2.c
phy-samsung-usb3.c
phy-tegra-usb.c
phy-twl4030-usb.c
phy-twl6030-usb.c
phy-ulpi-viewport.c
phy-ulpi.c
phy.c