Bas Nieuwenhuizen 8bf073ca92 drm/amdgpu: Init GFX10_ADDR_CONFIG for VCN v3 in DPG mode. ... Otherwise tiling modes that require the values form this field (In particular _*_X) would be corrupted upon video decode. Copied from the VCN v2 code. Fixes: 99541f392b ("drm/amdgpu: add mc resume DPG mode for VCN3.0") Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org		2021-05-05 23:09:12 -04:00
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drm	drm/amdgpu: Init GFX10_ADDR_CONFIG for VCN v3 in DPG mode.	2021-05-05 23:09:12 -04:00
host1x	gpu: host1x: Use different lock classes for each client	2021-03-30 19:37:20 +02:00
ipu-v3	gpu/ipu-v3/ipu-di: Strip out 2 unused 'di_sync_config' entries	2021-01-04 12:54:18 +01:00
trace
vga	pci-v5.11-changes	2020-12-15 16:49:59 -08:00
Makefile