linux-xiaomi-chiron/Documentation/devicetree/bindings
Miquel Raynal 8389a7b909 SPI NOR core changes:
- introduce 'struct spi_nor_controller_ops',
 - clean the Register Operations methods,
 - use dev_dbg insted of dev_err for low level info,
 - fix retlen handling in sst_write(),
 - fix silent truncations in spi_nor_read and spi_nor_read_raw(),
 - fix the clearing of QE bit on lock()/unlock(),
 - rework the disabling of the block write protection,
 - rework the Quad Enable methods,
 - make sure nor->spimem and nor->controller_ops are mutually exclusive,
 - set default Quad Enable method for ISSI flashes,
 - add support for few flashes.
 
 SPI NOR controller drivers changes:
 - intel-spi:
 	- support chips without software sequencer,
 	- add support for Intel Cannon Lake and Intel Comet Lake-H flashes.
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Merge tag 'spi-nor/for-5.5' into mtd/next

SPI NOR core changes:
- introduce 'struct spi_nor_controller_ops',
- clean the Register Operations methods,
- use dev_dbg insted of dev_err for low level info,
- fix retlen handling in sst_write(),
- fix silent truncations in spi_nor_read and spi_nor_read_raw(),
- fix the clearing of QE bit on lock()/unlock(),
- rework the disabling of the block write protection,
- rework the Quad Enable methods,
- make sure nor->spimem and nor->controller_ops are mutually exclusive,
- set default Quad Enable method for ISSI flashes,
- add support for few flashes.

SPI NOR controller drivers changes:
- intel-spi:
	- support chips without software sequencer,
	- add support for Intel Cannon Lake and Intel Comet Lake-H flashes.
2019-11-17 18:34:01 +01:00
..
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.gitignore
ABI.txt
chosen.txt
common-properties.txt
example-schema.yaml
graph.txt
jailhouse.txt
Makefile
numa.txt
property-units.txt
resource-names.txt
submitting-patches.txt
trivial-devices.yaml
unittest.txt
vendor-prefixes.yaml
writing-bindings.txt
xilinx.txt