Thierry Reding 82df0e5e78 soc/tegra: fuse: Add spare bit offset for Tegra124 ... The offset of the first spare bit register on Tegra124 is 0x300, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>		2015-07-16 10:38:31 +02:00
..
mediatek	soc: mediatek: Add compile dependency to pmic-wrapper	2015-05-27 16:27:05 +02:00
qcom	soc: qcom: spm: Fix idle on THUMB2 kernels	2015-07-01 12:16:30 -07:00
sunxi	drivers: soc: sunxi: Introduce SoC driver to map SRAMs	2015-06-01 17:57:34 +02:00
tegra	soc/tegra: fuse: Add spare bit offset for Tegra124	2015-07-16 10:38:31 +02:00
ti	soc: ti: knav_qmss_queue: change knav_range_setup_acc_irq to static	2015-01-29 13:23:51 -08:00
versatile	drivers/soc: Convert non-modular soc-realview to use builtin_platform_driver	2015-06-16 14:12:38 -04:00
Kconfig	drivers: soc: sunxi: Introduce SoC driver to map SRAMs	2015-06-01 17:57:34 +02:00
Makefile	drivers: soc: sunxi: Introduce SoC driver to map SRAMs	2015-06-01 17:57:34 +02:00