Shay Drory 3af26495a2 net/mlx5: Enlarge interrupt field in CREATE_EQ ... FW is now supporting more than 256 MSI-X per PF (up to 2K). Hence, enlarge interrupt field in CREATE_EQ to make use of the new MSI-X's. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Maor Gottlieb <maorg@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>		2021-06-14 20:58:00 -07:00
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accel.h	net/mlx5: Accel, Add core IPsec support for the Connect-X family	2020-07-16 16:36:42 -07:00
cq.h	net/mlx5: Avoid RDMA file inclusion in core driver	2020-06-27 13:50:46 -07:00
device.h	net/mlx5: mlx5_ifc support for header insert/remove	2021-06-09 18:36:06 -07:00
doorbell.h	net/mlx5: Remove spinlock support from mlx5_write64	2019-04-02 12:49:37 -07:00
driver.h	mlx5-updates-2021-05-26	2021-05-27 17:14:23 -07:00
eq.h	net/mlx5: Provide cpumask at EQ creation phase	2021-06-14 20:57:57 -07:00
eswitch.h	net/mlx5e: TC: Reserved bit 31 of REG_C1 for IPsec offload	2021-05-27 11:54:36 -07:00
fs.h	net/mlx5: Bridge, add offload infrastructure	2021-06-09 18:36:09 -07:00
fs_helpers.h	{net,IB}/mlx5: Add ipsec helper	2018-04-04 12:06:27 -06:00
mlx5_ifc.h	net/mlx5: Enlarge interrupt field in CREATE_EQ	2021-06-14 20:58:00 -07:00
mlx5_ifc_fpga.h	net/mlx5: fix spelling mistake "reserverd" -> "reserved"	2020-02-18 15:44:07 +02:00
mlx5_ifc_vdpa.h	vdpa/mlx5: Make hardware definitions visible to all mlx5 devices	2020-12-04 14:46:56 +02:00
mpfs.h	{net,vdpa}/mlx5: Configure interface MAC into mpfs L2 table	2021-05-18 23:01:48 -07:00
port.h	net/mlx5: Add support for DSFP module EEPROM dumps	2021-04-11 16:34:56 -07:00
qp.h	net/mlx5: Set QP timestamp mode to default	2021-03-10 11:01:56 -08:00
rsc_dump.h	net/mlx5: Add support in query QP, CQ and MKEY segments	2020-06-23 17:26:10 +03:00
transobj.h	net/mlx5: Update transobj.c new cmd interface	2020-04-23 21:42:16 +03:00
vport.h	net/mlx5: E-Switch, Prepare to return total vports from eswitch struct	2021-04-24 00:58:43 -07:00