70a65240ef
Let's add data for the known interconnect target module types by mapping their register bits. Note that we can handle many quirks for the older omap2 type1 modules directly in the driver without a need for adding custom properties. Signed-off-by: Tony Lindgren <tony@atomide.com>
69 lines
1.7 KiB
C
69 lines
1.7 KiB
C
#ifndef __TI_SYSC_DATA_H__
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#define __TI_SYSC_DATA_H__
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enum ti_sysc_module_type {
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TI_SYSC_OMAP2,
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TI_SYSC_OMAP2_TIMER,
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TI_SYSC_OMAP3_SHAM,
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TI_SYSC_OMAP3_AES,
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TI_SYSC_OMAP4,
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TI_SYSC_OMAP4_TIMER,
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TI_SYSC_OMAP4_SIMPLE,
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TI_SYSC_OMAP34XX_SR,
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TI_SYSC_OMAP36XX_SR,
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TI_SYSC_OMAP4_SR,
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TI_SYSC_OMAP4_MCASP,
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TI_SYSC_OMAP4_USB_HOST_FS,
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};
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/**
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* struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
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* @midle_shift: Offset of the midle bit
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* @clkact_shift: Offset of the clockactivity bit
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* @sidle_shift: Offset of the sidle bit
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* @enwkup_shift: Offset of the enawakeup bit
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* @srst_shift: Offset of the softreset bit
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* @autoidle_shift: Offset of the autoidle bit
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* @dmadisable_shift: Offset of the dmadisable bit
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* @emufree_shift; Offset of the emufree bit
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*
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* Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
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* feature is not available.
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*/
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struct sysc_regbits {
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s8 midle_shift;
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s8 clkact_shift;
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s8 sidle_shift;
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s8 enwkup_shift;
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s8 srst_shift;
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s8 autoidle_shift;
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s8 dmadisable_shift;
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s8 emufree_shift;
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};
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#define SYSC_QUIRK_UNCACHED BIT(1)
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#define SYSC_QUIRK_USE_CLOCKACT BIT(0)
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/**
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* struct sysc_capabilities - capabilities for an interconnect target module
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*
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* @sysc_mask: bitmask of supported SYSCONFIG register bits
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* @regbits: bitmask of SYSCONFIG register bits
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* @mod_quirks: bitmask of module specific quirks
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*/
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struct sysc_capabilities {
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const enum ti_sysc_module_type type;
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const u32 sysc_mask;
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const struct sysc_regbits *regbits;
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const u32 mod_quirks;
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};
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/**
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* struct sysc_config - configuration for an interconnect target module
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* @quirks: bitmask of enabled quirks
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*/
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struct sysc_config {
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u32 quirks;
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};
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#endif /* __TI_SYSC_DATA_H__ */
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