Liu Ying 591129d3db drm/bridge: fsl-ldb: Fix mode clock rate validation ... With LVDS dual link, up to 160MHz mode clock rate is supported. With LVDS single link, up to 80MHz mode clock rate is supported. Fix mode clock rate validation by swapping the maximum mode clock rates of the two link modes. Fixes: 463db5c2ed ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge") Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Robert Foss <robert.foss@linaro.org> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Jernej Skrabec <jernej.skrabec@gmail.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Marek Vasut <marex@denx.de> Cc: NXP Linux Team <linux-imx@nxp.com> Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220701065634.4027537-2-victor.liu@nxp.com		2022-07-04 16:17:05 +02:00
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drm	drm/bridge: fsl-ldb: Fix mode clock rate validation	2022-07-04 16:17:05 +02:00
host1x	gpu: host1x: Add context bus	2022-06-01 11:50:42 +02:00
ipu-v3	drm/imx: various cleanups	2022-05-06 15:07:39 +10:00
trace
vga	PCI/VGA: Move vgaarb to drivers/pci	2022-03-09 18:30:46 -06:00
Makefile	gpu: host1x: Add context bus	2022-06-01 11:50:42 +02:00