Artemy Kovalyov 49780d42df IB/mlx5: Expose MR cache for mlx5_ib ... Allow other parts of mlx5_ib to use MR cache mechanism. * Add new functions mlx5_mr_cache_alloc and mlx5_mr_cache_free * Traditional MTT MKey buckets are limited by MAX_UMR_CACHE_ENTRY Additinal buckets may be added above. Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>		2017-02-14 11:41:18 -05:00
..
cmd.h	net/mlx5_core: Fix Mellanox copyright note	2015-04-02 16:33:42 -04:00
cq.h	IB/mlx5: Support 4k UAR for libmlx5	2017-01-09 20:25:09 +02:00
device.h	mlx5 4K UAR	2017-01-09 17:09:31 -05:00
doorbell.h	IB/mlx5: Use blue flame register allocator in mlx5_ib	2017-01-09 20:25:08 +02:00
driver.h	IB/mlx5: Expose MR cache for mlx5_ib	2017-02-14 11:41:18 -05:00
fs.h	net/mlx5: Support encap id when setting new steering entry	2016-11-09 13:41:56 -05:00
mlx5_ifc.h	IB/mlx5: Add port counter support for Receive WQs	2017-02-14 11:41:09 -05:00
port.h	net/mlx5: Add DCBX firmware commands support	2016-11-28 15:09:35 -05:00
qp.h	IB/mlx5: Add ODP atomics support	2017-01-02 15:51:20 -05:00
srq.h	net/mlx5: Ensure SRQ physical address structure endianness	2016-10-30 15:43:10 +02:00
transobj.h	IB/mlx5: Support setting Ethernet priority for Raw Packet QPs	2016-01-21 12:01:09 -05:00
vport.h	net/mlx5: Enable to query min inline for a specific vport	2016-11-24 16:01:14 -05:00