linux-xiaomi-chiron/arch/x86/kernel/cpu
Thomas Gleixner 46d28947d9 x86/extable: Rework the exception table mechanics
The exception table entries contain the instruction address, the fixup
address and the handler address. All addresses are relative. Storing the
handler address has a few downsides:

 1) Most handlers need to be exported

 2) Handlers can be defined everywhere and there is no overview about the
    handler types

 3) MCE needs to check the handler type to decide whether an in kernel #MC
    can be recovered. The functionality of the handler itself is not in any
    way special, but for these checks there need to be separate functions
    which in the worst case have to be exported.

    Some of these 'recoverable' exception fixups are pretty obscure and
    just reuse some other handler to spare code. That obfuscates e.g. the
    #MC safe copy functions. Cleaning that up would require more handlers
    and exports

Rework the exception fixup mechanics by storing a fixup type number instead
of the handler address and invoke the proper handler for each fixup
type. Also teach the extable sort to leave the type field alone.

This makes most handlers static except for special cases like the MCE
MSR fixup and the BPF fixup. This allows to add more types for cleaning up
the obscure places without adding more handler code and exports.

There is a marginal code size reduction for a production config and it
removes _eight_ exported symbols.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lkml.kernel.org/r/20210908132525.211958725@linutronix.de
2021-09-13 17:51:47 +02:00
..
mce x86/extable: Rework the exception table mechanics 2021-09-13 17:51:47 +02:00
microcode x86/microcode: Replace deprecated CPU-hotplug functions. 2021-08-10 14:46:27 +02:00
mtrr x86/mtrr: Replace deprecated CPU-hotplug functions. 2021-08-10 14:46:27 +02:00
resctrl - A first round of changes towards splitting the arch-specific bits from 2021-08-30 13:31:36 -07:00
sgx Merge branch 'akpm' (patches from Andrew) 2021-06-29 17:29:11 -07:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
acrn.c x86/acrn: Introduce acrn_cpuid_base() and hypervisor feature bits 2021-02-09 10:58:18 +01:00
amd.c x86/cpu: Add get_llc_id() helper function 2021-08-26 09:14:36 +02:00
aperfmperf.c x86/cpu: Avoid cpuinfo-induced IPIing of idle CPUs 2020-11-06 16:59:11 -08:00
bugs.c x86, prctl: Hook L1D flushing in via prctl 2021-07-28 11:42:25 +02:00
cacheinfo.c drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION() 2021-09-01 10:29:10 +02:00
centaur.c x86/cpu/centaur: Add Centaur family >=7 CPUs initialization support 2020-09-11 10:53:19 +02:00
common.c x86/cpu: Add get_llc_id() helper function 2021-08-26 09:14:36 +02:00
cpu.h x86/tsx: Clear CPUID bits when TSX always force aborts 2021-06-15 17:46:48 +02:00
cpuid-deps.c x86/cpufeatures: Add SGX1 and SGX2 sub-features 2021-03-25 17:33:11 +01:00
cyrix.c x86: Fix various typos in comments 2021-03-18 15:31:53 +01:00
feat_ctl.c x86/cpu/intel: Allow SGX virtualization without Launch Control support 2021-04-06 09:43:41 +02:00
hygon.c perf/x86/rapl: Use CPUID bit on AMD and Hygon parts 2021-06-01 21:10:33 +02:00
hypervisor.c x86/paravirt: Remove const mark from x86_hyper_xen_hvm variable 2019-07-17 08:09:59 +02:00
intel.c Changes in this cycle were: 2021-06-28 13:30:02 -07:00
intel_epb.c x86: intel_epb: Do not build when CONFIG_PM is unset 2019-05-30 10:58:36 +02:00
intel_pconfig.c x86/pconfig: Detect PCONFIG targets 2018-03-12 12:10:54 +01:00
Makefile x86/sgx: Initialize metadata for Enclave Page Cache (EPC) sections 2020-11-17 14:36:13 +01:00
match.c x86/cpu: Add a steppings field to struct x86_cpu_id 2020-04-20 12:19:21 +02:00
mkcapflags.sh x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_* 2020-01-13 18:36:02 +01:00
mshyperv.c hyperv-next for 5.15 2021-09-01 18:25:20 -07:00
perfctr-watchdog.c x86/nmi_watchdog: Fix old-style NMI watchdog regression on old Intel CPUs 2021-06-10 10:04:40 +02:00
powerflags.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
proc.c x86/cpu: Print VMX flags in /proc/cpuinfo using VMX_FEATURES_* 2020-01-13 18:36:02 +01:00
rdrand.c x86/rdrand: Sanity-check RDRAND output 2019-10-01 19:55:32 +02:00
scattered.c x86/cpufeatures: Add SGX1 and SGX2 sub-features 2021-03-25 17:33:11 +01:00
topology.c x86: Fix various typos in comments 2021-03-18 15:31:53 +01:00
transmeta.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
tsx.c x86/tsx: Clear CPUID bits when TSX always force aborts 2021-06-15 17:46:48 +02:00
umc.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
umwait.c KVM: VMX: Stop context switching MSR_IA32_UMWAIT_CONTROL 2020-06-22 20:54:57 -04:00
vmware.c Have vmware guests skip the refined TSC calibration when the TSC 2021-04-26 09:13:43 -07:00
zhaoxin.c x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup 2020-06-15 14:18:37 +02:00