04dbd86539
The $id path checks were inadequately checking the path part of the $id value. With the check fixed, there's a number of errors that need to be fixed. Most of the errors are including 'bindings/' in the path which should not be as that is considered the root. Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: "Nuno Sá" <nuno.sa@analog.com> Cc: Jean Delvare <jdelvare@suse.com> Cc: Stefan Popa <stefan.popa@analog.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Cc: Marcus Folkesson <marcus.folkesson@gmail.com> Cc: Kent Gustavsson <kent@minoris.se> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: linux-clk@vger.kernel.org Cc: linux-iio@vger.kernel.org Cc: linux-input@vger.kernel.org Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
76 lines
1.6 KiB
YAML
76 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/clock/bitmain,bm1880-clk.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Bitmain BM1880 Clock Controller
|
|
|
|
maintainers:
|
|
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
|
|
description: |
|
|
The Bitmain BM1880 clock controller generates and supplies clock to
|
|
various peripherals within the SoC.
|
|
|
|
This binding uses common clock bindings
|
|
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
|
|
|
properties:
|
|
compatible:
|
|
const: bitmain,bm1880-clk
|
|
|
|
reg:
|
|
items:
|
|
- description: pll registers
|
|
- description: system registers
|
|
|
|
reg-names:
|
|
items:
|
|
- const: pll
|
|
- const: sys
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
clock-names:
|
|
const: osc
|
|
|
|
'#clock-cells':
|
|
const: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- reg-names
|
|
- clocks
|
|
- clock-names
|
|
- '#clock-cells'
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
# Clock controller node:
|
|
- |
|
|
clk: clock-controller@e8 {
|
|
compatible = "bitmain,bm1880-clk";
|
|
reg = <0xe8 0x0c>, <0x800 0xb0>;
|
|
reg-names = "pll", "sys";
|
|
clocks = <&osc>;
|
|
clock-names = "osc";
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
# Example UART controller node that consumes clock generated by the clock controller:
|
|
- |
|
|
uart0: serial@58018000 {
|
|
compatible = "snps,dw-apb-uart";
|
|
reg = <0x0 0x58018000 0x0 0x2000>;
|
|
clocks = <&clk 45>, <&clk 46>;
|
|
clock-names = "baudclk", "apb_pclk";
|
|
interrupts = <0 9 4>;
|
|
reg-shift = <2>;
|
|
reg-io-width = <4>;
|
|
};
|
|
|
|
...
|