ed0d3a6af5
Move the device tree bindings for the Tegra20 memory controller to the same location as the Tegra30 (and later) memory controller bindings. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org> |
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| .. | ||
| fsl | ||
| ti | ||
| arm,pl172.txt | ||
| ath79-ddr-controller.txt | ||
| atmel,ebi.txt | ||
| brcm,dpfe-cpu.txt | ||
| calxeda-ddr-ctrlr.txt | ||
| exynos-srom.txt | ||
| ingenic,jz4780-nemc.txt | ||
| mediatek,smi-common.txt | ||
| mediatek,smi-larb.txt | ||
| mvebu-devbus.txt | ||
| mvebu-sdram-controller.txt | ||
| nvidia,tegra20-mc.txt | ||
| nvidia,tegra30-mc.txt | ||
| nvidia,tegra124-emc.txt | ||
| omap-gpmc.txt | ||
| renesas,h8300-bsc.txt | ||
| renesas-memory-controllers.txt | ||
| synopsys.txt | ||
| ti-aemif.txt | ||
| ti-da8xx-ddrctl.txt | ||