Add legacy SoC support that needs to manage gio clock and reset and to skip setting unimplemented phy parameters. This supports Pro5. This specifies only 1 port use because Pro5 doesn't set it in the power-on sequence. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| phy-uniphier-pcie.c | ||
| phy-uniphier-usb2.c | ||
| phy-uniphier-usb3hs.c | ||
| phy-uniphier-usb3ss.c | ||