Commit graph

781771 commits

Author SHA1 Message Date
Boris Brezillon
317c6d9b69 mtd: rawnand: micron: Make ECC activation stateful
We currently don't store the on-die ECC state (enabled/disabled) which
might force us to re-disable the engine even if it's already been
disabled after we've read the page in raw mode to count the actual
number of bitflips.

Add an "enabled" field to struct micron_on_die_ecc to keep track of the
ECC state.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:15:05 +02:00
Boris Brezillon
ef422e1ecd mtd: rawnand: micron: Avoid enabling/disabling ECC when it can't be disabled
Some chips have their on-die ECC forcibly enabled, there's no point in
trying to enable/disable the ECC engine in that case.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:15:04 +02:00
Boris Brezillon
2301780711 mtd: rawnand: micron: Get the actual number of bitflips
The MT29F2Gxxx chips with 4bits/512byte on-die ECC let us know when
some bitflips were corrected by the on-die ECC, but they do not report
the actual number of bitflips that were present in the data+ECC chunk.

We initially decided to always return ecc->strength to avoid re-reading
the page in raw mode + comparing it to the corrected buffer to extract
the real number of bitflips, but this forces UBI to move data around as
soon as one bitflip is present in a page.

This not only wears the NAND out faster, but also degrades
performances, since reading a full PEB + writing it back to a different
PEB + erasing the old one is much more expensive than re-reading the
faulty page in raw mode and comparing it to the corrected buffer.
In most cases, the actual number of bitflips does not exceed the
bitflips threshold, and UBI won't have to move data around. Otherwise,
we can assume the time spent re-reading the page and doing the
comparison is negligible compared to the time UBI spends moving a full
PEB to another PEB.

Note that this logic is not applied to chips with 8bits/512byte on-die
ECC, because those chips provide fine-grained information (the maximum
error is 1 bit, and it will not force UBI to move blocks around at the
first bitflip).

Suggested-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:15:04 +02:00
Chris Packham
cb2bf403a4 mtd: rawnand: micron: allow forced on-die ECC
Some Micron NAND chips have on-die ECC forceably enabled. Allow such
chips to be used as long as the controller has set chip->ecc.mode to
NAND_ECC_ON_DIE.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:15:03 +02:00
Boris Brezillon
0d6030ac04 mtd: rawnand: Expose _notsupp() helpers for raw page accessors
Some implementations simply can't disable their ECC engine. Expose
helpers returning -ENOTSUPP so that the caller knows that raw accesses
are not supported instead of silently falling back to non-raw
accessors.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:57 +02:00
Chris Packham
3ec7cb369e mtd: rawnand: micron: support 8/512 on-die ECC
Micron MT29F1G08ABAFAWP-ITE:F supports an on-die ECC with 8 bits
per 512 bytes. Add support for this combination.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:15 +02:00
Boris Brezillon
dbc44edbf8 mtd: rawnand: micron: Fix on-die ECC detection logic
Basing the "mandatory on-die" detection on ID byte 2 does not work,
because Micron has plenty of NANDs using the same device ID code, and
not all of them have forcibly enabled on-die ECC.

Since the "Array Operation" feature does not provide the "ECC
enabled/disabled" bit when the ECC can't be disabled, let's try to use
the "ECC enabled/disabled" bit in the READ_ID bytes.

It seems that this bit is dynamically updated on NANDs where on-die ECC
can freely be enabled/disabled, so let's hope it stays at one when we
have a NAND with on-die ECC forcibly enabled.

Fixes: 51f3b3970a8c ("mtd: rawnand: micron: detect forced on-die ECC")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:14 +02:00
Boris Brezillon
79e1ca37cc mtd: rawnand: fsmc: Stop using chip->read_buf()
chip->read_buf is left unassigned since commit 4da712e702 ("mtd: nand:
fsmc: use ->exec_op()"), leading to a NULL pointer dereference when it's
called from fsmc_read_page_hwecc(). Fix that by using the appropriate
helper to read data out of the NAND.

Fixes: 4da712e702 ("mtd: nand: fsmc: use ->exec_op()")
Cc: <stable@vger.kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:14 +02:00
Arnd Bergmann
7330fc505a mtd: rawnand: qcom: stop using phys_to_dma()
Compile-testing this driver on x86 caused a link error:

ERROR: "__phys_to_dma" [drivers/mtd/nand/raw/qcom_nandc.ko] undefined!

The problem here is that the driver attempts to convert the physical
address into the DMA controller as a dma_addr_t and calls phys_to_dma()
to do the conversion.

The correct way to do the conversion is using the dma mapping interfaces.

Fixes: c76b78d8ec ("mtd: nand: Qualcomm NAND controller driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:13 +02:00
Stefan Agner
d535934a9a mtd: rawnand: tegra: check bounds of die_nr properly
The Tegra driver currently only support a single chip select, hence
check boundaries accordingly. This fixes a off by one issue catched
with Smatch:
    drivers/mtd/nand/raw/tegra_nand.c:476 tegra_nand_select_chip()
    warn: array off by one? 'nand->cs[die_nr]'

Also warn in case the stack asks for a chip select we currently do
not support.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:13 +02:00
Miquel Raynal
6a943386ee mtd: rawnand: add default values for dynamic timings
Some timings like tBERS (block erase time), tCCs (change column setup
time), tPROG (page program time) and tR (page read time) are derived
from the ONFI parameter page. They are set in the SDR interface only
if the chip is ONFI compliant.

It makes these timings unreliable and prevent the driver to use one of
these four values with a non-ONFI chip.

Fix this situation by taking the highest possible value (or a default
one) value for each missing timing (stored as unsigned 16-bit entries in
the parameter page).

This makes tBERS and tPROG being ~65ms while typical values are at most
a few milliseconds. As these are timeouts, it is not impacting at all
the performances in nominal use.

tR maximum time and tCCS minimum time (delay to wait after a change
column) are set, according to the ONFI specification, to default 'slow'
values; respectively 200us and 500ns.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:13 +02:00
Rafał Miłecki
e8b0ac398f mtd: onenand: use mtd_device_register() where applicable
If driver doesn't specify parsers it can use that little helper.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:12 +02:00
Rafał Miłecki
29597ca14d mtd: rawnand: use mtd_device_register() where applicable
If driver doesn't specify parsers it can use that little helper.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Xiaolei Li <xiaolei.li@mediatek.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:12 +02:00
Arnd Bergmann
c2204734bb mtd: rawnand: MTD_NAND_BCM47XXNFLASH needs CONFIG_BCMA
We already have a dependency on BCMA_NFLASH, which in turn depends on
BCMA, but since BCMA is a tristate option and BCMA_NFLASH is bool,
we can run into an invalid configuration with MTD_NAND_BCM47XXNFLASH=y
and BCMA=m:

drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.o: In function `bcm47xxnflash_ops_bcm4706_init':
ops_bcm4706.c:(.text+0x790): undefined reference to `bcma_chipco_pll_read'

Adding the dependency here forces MTD_NAND_BCM47XXNFLASH to only be
configured =m here so it can link against the BCMA driver.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:11 +02:00
Boris Brezillon
ab99e11062 memory: jz4780-nemc: Allow selection of this driver when COMPILE_TEST=y
It just makes maintainers' life easier by allowing them to compile-test
this driver without having MACH_JZ4780 enabled.

We also need to add a dependency on HAS_IOMEM to make sure the
driver compiles correctly.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:11 +02:00
Boris Brezillon
72b77bb018 mtd: rawnand: jz4740: Use the proper format specifier to print chipnr
In jz_nand_detect_bank(), chipnr is a size_t argument. Use %zu instead
of %i when printing it.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:14:11 +02:00
Miquel Raynal
d70420bcd4 mtd: adapt misleading comment in mtd_oob_ops structure
A comment in the kernel doc of the mtd_oob_ops structure tells that it
is not possible to write more than one page with OOB. This is actually
true for only a few MTD devices like 'onenand' but it is definitely not
a general limitation. While this would benefit to be handled elsewhere
either by the MTD layer or by the limited drivers, let's update this
comment to reflect the reality.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-07-19 23:12:09 +02:00
Boris Brezillon
a8222a84ce mtd: Make Kconfig formatting consistent
Fix indentation and replace '---help---' by 'help' to make things
consistent.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-19 23:12:06 +02:00
Thomas Gleixner
73ab603f44 Merge branch 'linus' into x86/timers
Pick up upstream changes to avoid conflicts
2018-07-19 23:11:52 +02:00
Maciej W. Rozycki
1ae22a0e35
MIPS: Add FP_MODE regset support
Define an NT_MIPS_FP_MODE core file note and implement a corresponding
regset holding the state handled by PR_SET_FP_MODE and PR_GET_FP_MODE
prctl(2) requests.  This lets debug software correctly interpret the
contents of floating-point general registers both in live debugging and
in core files, and also switch floating-point modes of a live process.

[paul.burton@mips.com:
  - Changed NT_MIPS_FP_MODE to 0x801 to match first nibble of
    NT_MIPS_DSP, which was also changed to avoid a conflict.]

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19331/
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
2018-07-19 13:58:44 -07:00
Maciej W. Rozycki
44109c6017
MIPS: Add DSP ASE regset support
Define an NT_MIPS_DSP core file note type and implement a corresponding
regset holding the DSP ASE register context, following the layout of the
`mips_dsp_state' structure, except for the DSPControl register stored as
a 64-bit rather than 32-bit quantity in a 64-bit note.

The lack of DSP ASE register saving to core files can be considered a
design flaw with commit e50c0a8fa6 ("Support the MIPS32 / MIPS64 DSP
ASE."), leading to an incomplete state being saved.  Consequently no DSP
ASE regset has been created with commit 7aeb753b53 ("MIPS: Implement
task_user_regset_view."), when regset support was added to the MIPS
port.

Additionally there is no way for ptrace(2) to correctly access the DSP
accumulator registers in n32 processes with the existing interfaces.
This is due to 32-bit truncation of data passed with PTRACE_PEEKUSR and
PTRACE_POKEUSR requests, which cannot be avoided owing to how the data
types for ptrace(3) have been defined.  This new NT_MIPS_DSP regset
fills the missing interface gap.

[paul.burton@mips.com:
  - Change NT_MIPS_DSP to 0x800 to avoid conflict with NT_VMCOREDD
    introduced by commit 2724273e8f ("vmcore: add API to collect
    hardware dump in second kernel").
  - Drop stable tag. Whilst I agree the lack of this functionality can
    be considered a flaw in earlier DSP ASE support, it's still new
    functionality which doesn't meet up to the requirements set out in
    Documentation/process/stable-kernel-rules.rst.]

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
References: 7aeb753b53 ("MIPS: Implement task_user_regset_view.")
Patchwork: https://patchwork.linux-mips.org/patch/19330/
Cc: Alexander Viro <viro@zeniv.linux.org.uk>
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-fsdevel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
2018-07-19 13:47:51 -07:00
Maciej W. Rozycki
f5958b4cf4
MIPS: Correct the 64-bit DSP accumulator register size
Use the `unsigned long' rather than `__u32' type for DSP accumulator
registers, like with the regular MIPS multiply/divide accumulator and
general-purpose registers, as all are 64-bit in 64-bit implementations
and using a 32-bit data type leads to contents truncation on context
saving.

Update `arch_ptrace' and `compat_arch_ptrace' accordingly, removing
casts that are similarly not used with multiply/divide accumulator or
general-purpose register accesses.

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Fixes: e50c0a8fa6 ("Support the MIPS32 / MIPS64 DSP ASE.")
Patchwork: https://patchwork.linux-mips.org/patch/19329/
Cc: Alexander Viro <viro@zeniv.linux.org.uk>
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-fsdevel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org # 2.6.15+
2018-07-19 13:47:21 -07:00
Maciej W. Rozycki
2f819db565
binfmt_elf: Respect error return from `regset->active'
The regset API documented in <linux/regset.h> defines -ENODEV as the
result of the `->active' handler to be used where the feature requested
is not available on the hardware found.  However code handling core file
note generation in `fill_thread_core_info' interpretes any non-zero
result from the `->active' handler as the regset requested being active.
Consequently processing continues (and hopefully gracefully fails later
on) rather than being abandoned right away for the regset requested.

Fix the problem then by making the code proceed only if a positive
result is returned from the `->active' handler.

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Fixes: 4206d3aa19 ("elf core dump: notes user_regset")
Patchwork: https://patchwork.linux-mips.org/patch/19332/
Cc: Alexander Viro <viro@zeniv.linux.org.uk>
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-fsdevel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
2018-07-19 13:46:34 -07:00
Christian König
5c675bf2c6 drm/amdgpu: clean up UVD instance handling v2
The whole handle, filp and entity handling is superfluous here.

We should have reviewed that more thoughtfully. It looks like somebody
just made the code instance aware without knowing the background.

v2: fix one more missed case in amdgpu_uvd_suspend

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming  Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-19 13:56:44 -05:00
Christian König
58c24b7c89 drm/amdgpu: remove superflous UVD encode entity
Not sure what that was every used for, but now it is completely unused.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming  Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-19 13:56:44 -05:00
Michel Dänzer
4841203102 drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86
Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-19 13:56:43 -05:00
Evan Quan
1ce0688f3f drm/amd/powerplay: fixed uninitialized value
The 'result' is not initialized correctly. It causes the API
return an error code even on success.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2018-07-19 13:56:43 -05:00
Linus Torvalds
fb7d1bcf16 pci-v4.18-fixes-3
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Merge tag 'pci-v4.18-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI fixes from Bjorn Helgaas:

 - Fix crashes that happen when PHY drivers are left disabled in the V3
   Semiconductor, MediaTek, Faraday, Aardvark, DesignWare, Versatile,
   and X-Gene host controller drivers (Sergei Shtylyov)

 - Fix a NULL pointer dereference in the endpoint library configfs
   support (Kishon Vijay Abraham I)

 - Fix a race condition in Hyper-V IRQ handling (Dexuan Cui)

* tag 'pci-v4.18-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: v3-semi: Fix I/O space page leak
  PCI: mediatek: Fix I/O space page leak
  PCI: faraday: Fix I/O space page leak
  PCI: aardvark: Fix I/O space page leak
  PCI: designware: Fix I/O space page leak
  PCI: versatile: Fix I/O space page leak
  PCI: xgene: Fix I/O space page leak
  PCI: OF: Fix I/O space page leak
  PCI: endpoint: Fix NULL pointer dereference error when CONFIGFS is disabled
  PCI: hv: Disable/enable IRQs rather than BH in hv_compose_msi_msg()
2018-07-19 11:54:04 -07:00
Alex Deucher
c64fb6dade drm/amdgpu/powerplay: use irq source defines for smu7 sources
Use the newly added irq source defines rather than magic numbers
for smu7 thermal interrupts.

Rewiewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-07-19 13:53:55 -05:00
Takashi Iwai
7abeb64da6 Merge branch 'topic/drm_audio_component' into for-next
Pull the generic drm_audio_component support, which will be used later
for AMD/ATI and other HD-audio HDMI codec drivers.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2018-07-19 20:48:14 +02:00
Vineet Gupta
af1fc5baa7 ARCv2: [plat-hsdk]: Save accl reg pair by default
This manifsted as strace segfaulting on HSDK because gcc was targetting
the accumulator registers as GPRs, which kernek was not saving/restoring
by default.

Cc: stable@vger.kernel.org   #4.14+
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2018-07-19 10:36:45 -07:00
Hans de Goede
9ee6f8a8cb
ASoC: Intel: bytcr_rt5640: Add quirk for the "Connect Tablet 9" tablet
Add a quirk for the "Connect Tablet 9" tablet, this tablet has a
mono-speaker. Otherwise it works fine with the defaults.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-19 18:08:26 +01:00
Thomas Gleixner
246b6472b7 irqchip updates for 4.18, take #3
- DT binding updates for Renesas r8a77470 and r8a77980 SoCs
 - DT binding update for Ingenic JZ4725B SoC
 - Fix stm32mp1's exti0 pin routing
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Merge tag 'irqchip-4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates for 4.18, take #3 from Marc Zyngier

 - DT binding updates for Renesas r8a77470 and r8a77980 SoCs
 - DT binding update for Ingenic JZ4725B SoC
 - Fix stm32mp1's exti0 pin routing
2018-07-19 18:16:01 +02:00
Rodrigo Vivi
ef821e3f14 drm/i915: Update DRIVER_DATE to 20180719
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-07-19 08:47:59 -07:00
Ville Syrjälä
d81be4f379 drm/i915: Remove intel_panel_detect()
With neither LVDS or eDP no longer using intel_panel_detect() we can
kill it, and the accompanying modparam.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717174216.22252-3-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-07-19 18:39:31 +03:00
Ville Syrjälä
b93b41afce drm/i915: Assume eDP is always connected
We never registered any kind of lid notifier for eDP, so looking at the
lid status is pretty much bonkers. Let's just consider eDP always
connected instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717174216.22252-2-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-07-19 18:39:31 +03:00
Ville Syrjälä
05c72e77cc drm/i915: Nuke the LVDS lid notifier
We broke the LVDS notifier resume thing in (presumably) commit
e2c8b8701e ("drm/i915: Use atomic helpers for suspend, v2.") as
we no longer duplicate the current state in the LVDS notifier and
thus we never resume it properly either.

Instead of trying to fix it again let's just kill off the lid
notifier entirely. None of the machines tested thus far have
apparently needed it. Originally the lid notifier was added to
work around cases where the VBIOS was clobbering some of the
hardware state behind the driver's back, mostly on Thinkpads.
We now have a few report of Thinkpads working just fine without
the notifier. So maybe it was misdiagnosed originally, or
something else has changed (ACPI video stuff perhaps?).

If we do end up finding a machine where the VBIOS is still causing
problems I would suggest that we first try setting various bits in
the VBIOS scratch registers. There are several to choose from that
may instruct the VBIOS to steer clear.

With the notifier gone we'll also stop looking at the panel status
in ->detect().

v2: Nuke enum modeset_restore (Rodrigo)

Cc: stable@vger.kernel.org
Cc: Wolfgang Draxinger <wdraxinger.maillist@draxit.de>
Cc: Vito Caputo <vcaputo@pengaru.com>
Cc: kitsunyan <kitsunyan@airmail.cc>
Cc: Joonas Saarinen <jza@saunalahti.fi>
Tested-by: Vito Caputo <vcaputo@pengaru.com> # Thinkapd X61s
Tested-by: kitsunyan <kitsunyan@airmail.cc> # ThinkPad X200
Tested-by: Joonas Saarinen <jza@saunalahti.fi> # Fujitsu Siemens U9210
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105902
References: https://lists.freedesktop.org/archives/intel-gfx/2018-June/169315.html
References: https://bugs.freedesktop.org/show_bug.cgi?id=21230
Fixes: e2c8b8701e ("drm/i915: Use atomic helpers for suspend, v2.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717174216.22252-1-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-07-19 18:39:31 +03:00
Sergei Shtylyov
d5fd148035 dt-bindings: irqchip: renesas-irqc: Document r8a77980 support
Document R-Car V3H (AKA R8A77980) SoC bindings.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-07-19 16:12:28 +01:00
Biju Das
dcbabbbd26 dt-bindings: irqchip: renesas-irqc: Document r8a77470 support
Renesas RZ/G SoC have the R-Car gen2 compatible IRQC interrupt
controllers. Document RZ/G1C (also known as R8A77470) SoC bindings.

Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-07-19 16:12:28 +01:00
Paul Cercueil
1047557cb9 irqchip/ingenic: Add support for the JZ4725B SoC
The interrupt controller of the JZ4725B works the same way as the other
JZ SoCs from Ingenic; so we just add a new compatible string.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-07-19 16:12:27 +01:00
Ludovic Barre
6bdd0299cf irqchip/stm32: Add exti0 translation for stm32mp1
This patch fixes a datasheet issue, in the draft version the "exti0"
was not connected whereas is it.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-07-19 16:12:27 +01:00
Hans de Goede
06aa6e5127
ASoC: Intel: bytcr_rt5651: Add quirk table entries for various devices
Add quirk table entries for the following tablets:

ITWorks TW701
Ployer Momo7w
Trekstor win7
Yours 8"

These all use the default settings, except that they only have a single
speaker and thus need the mono-speaker quirk.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-19 16:04:41 +01:00
Hans de Goede
a0d1d867c2
ASoC: Intel: bytcr_rt5651: Add mono speaker quirk
During my initial round of bytcr_rt5651 long-name patches I did not include
a difference for mono vs stereo speaker setups in the longname because it
seems that all 5651 devices with only a single speaker do some mixing of
left + right on the PCB.

However further testing has shown that while this works great when only
playing audio on the left or right channel, the output becomes garbled
when using both channels at once. Something which does not happen when
using the Stereo DAC MIXL / MIXR switches to mix the channels together
inside the codec and then only outputting on a single channel.

So we need to have separate UCM profiles and thus separate long-names
for devices with a mono speaker vs stereo speakers. Just as we already
have for the bytcr_rt5640 case.

This commit adds a new BYT_RT5651_MONO_SPEAKER quirk and adds "stereo-spk"
or "mono-spk" to the long-name based on this and enables this mapping on
devices with a mono speaker.

Changing the long-name like this is ok for now, since I'm still working
on the UCM profiles, so they are not in upstream alsa-lib yet.

This brings the long-name naming scheme fully in sync with the bytcr_rt5640
case, which is good from a consistency pov.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-19 16:04:35 +01:00
Hans de Goede
ac275ee5aa
ASoC: Intel: bytcr_rt5651: Add IN2 input mapping
During the recent cleanup series 3 of the 6 input mappings where removed
from the bytcr_rt5651 machine driver because testing showed that none of
them were used.

However some devices do actually have their internal mic on IN2 (and
only IN2, not IN1 and IN2), this did not show during previous tests
due to a bug in the userspace UCM input device switching code.

This commit re-adds the IN2 mapping for devices with the internal mic.
on IN2 and the headser mic on IN3 and enables this mapping on devices
with their internal mic on IN2.

This commit also changes the default internal mic input to IN2, because
all my 7 test devices have their mic there.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-19 16:04:32 +01:00
Hans de Goede
8627fb257e
ASoC: Intel: bytcr_rt5651: Set OVCD limit for VIOS LTH17 to 2000uA
With the default over current detect limit of 1500uA headsets on often
get detected as headphones on the VIOS LTH17 and even when detected as
headset the OVCD current triggers often while plugged in, resulting in
false-positive button press detection.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-19 16:04:28 +01:00
Hans de Goede
0a3badd141
ASoC: Intel: bytcr_rt5651: Fix using the wrong GPIO for the ext-amp on some boards
Some boards have I2cSerialBusV2, GpioIo, GpioInt as ACPI resources, other
boards may  have I2cSerialBusV2, GpioInt, GpioIo instead. We want the
GpioIo one for the ext-amp-enable-gpio.

So far we've been assuming that the GpioIo one always comes first, this
commit adds code to detect which one comes first and to add the right
gpio-mapping.

This fixes sound not working on the Vios LTH17 laptop.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-19 16:04:13 +01:00
Hans de Goede
eea1662525
ASoC: rt5651: Add IN3 Boost volume control
Add a mixer control for the IN3 Boost volume, IN3 is used for the headset
mic on most devices, so this is necessary to control the headset mic
volume.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-19 16:02:55 +01:00
Yi Wang
3058758925 timer: Fix coding style
The call to wake_up_nohz_cpu() is incorrectly indented. Remove the surplus TAB.

Signed-off-by: Yi Wang <wang.yi59@zte.com.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jiang Biao <jiang.biao2@zte.com.cn>
Cc: john.stultz@linaro.org
Cc: sboyd@kernel.org
Cc: zhong.weidong@zte.com.cn
CC: Anna-Maria Gleixner <anna-maria@linutronix.de>
Link: https://lkml.kernel.org/r/1531721337-30284-1-git-send-email-wang.yi59@zte.com.cn
2018-07-19 16:52:40 +02:00
Icenowy Zheng
ecbd611882
arm64: allwinner: h6: enable MMC0/2 on Pine H64
The Pine H64 board have a MicroSD slot connected to MMC0 controller of
the H6 SoC and a eMMC slot connected to MMC2.

Enable them in the device tree.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-19 16:50:33 +02:00
Icenowy Zheng
8f54bd1595
arm64: allwinner: h6: add device tree nodes for MMC controllers
The Allwinner H6 SoC have 3 MMC controllers.

Add device tree nodes for them.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-07-19 16:50:30 +02:00