Commit graph

164149 commits

Author SHA1 Message Date
Arnd Bergmann
a3950da161 Merge tag 'ux500-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/soc
This is a slew of Ux500 updates for the v5.4 kernel cycle:

- Stop populating the PRCMU devices from the core CPU
  file, it works just fine at device_initcall() level.

- Add a missing of_node_put() in the core file.

- Simplify the debug UART code.

- Add myself to MAINTAINERS

* tag 'ux500-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  MAINTAINERS: add soc/ux500
  ARM: ux500: simplify and move debug UART
  ARM: ux500: add missing of_node_put()
  ARM: ux500: Stop populating the PRCMU devices early

Link: https://lore.kernel.org/r/CACRpkdbH-h5fRwuidcpeOp8mtRoKUW65SAk8a4A==BCDzn3QMA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:37:17 +02:00
Arnd Bergmann
a1f487d75c ARM: iop32x: merge everything into mach-iop32x/
Various bits of iop32x are now in their traditional locations in plat-iop,
mach-iop/include/mach/ and in include/asm/mach/hardware. As nothing
outside of the iop32x mach code references these any more, this can all
be moved into one place now.

The only remaining things in the include/mach/ directory are now the
NR_IRQS definition, the entry-macros.S file and the the decompressor
uart access. After the irqchip code has been converted to SPARSE_IRQ
and GENERIC_IRQ_MULTI_HANDLER, it can be moved to ARCH_MULTIPLATFORM.

Link: https://lore.kernel.org/r/20190809163334.489360-7-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:36:22 +02:00
Arnd Bergmann
ba9ef6afc4 ARM: iop32x: make mach/uncompress.h independent of mach/hardware.h
All supported uarts use the same address: IQ80321_UART and IQ31244_UART
are both defined to the default value of 0xfe800000. By using that as
the address unconditionally, all dependencies on other machine headers
can be avoided.

Link: https://lore.kernel.org/r/20190809163334.489360-6-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:36:22 +02:00
Arnd Bergmann
c7b6804994 ARM: xscale: fix multi-cpu compilation
Building a combined ARMv4+XScale kernel produces these
and other build failures:

/tmp/copypage-xscale-3aa821.s: Assembler messages:
/tmp/copypage-xscale-3aa821.s:167: Error: selected processor does not support `pld [r7,#0]' in ARM mode
/tmp/copypage-xscale-3aa821.s:168: Error: selected processor does not support `pld [r7,#32]' in ARM mode
/tmp/copypage-xscale-3aa821.s:169: Error: selected processor does not support `pld [r1,#0]' in ARM mode
/tmp/copypage-xscale-3aa821.s:170: Error: selected processor does not support `pld [r1,#32]' in ARM mode
/tmp/copypage-xscale-3aa821.s:171: Error: selected processor does not support `pld [r7,#64]' in ARM mode
/tmp/copypage-xscale-3aa821.s:176: Error: selected processor does not support `ldrd r4,r5,[r7],#8' in ARM mode
/tmp/copypage-xscale-3aa821.s:180: Error: selected processor does not support `strd r4,r5,[r1],#8' in ARM mode

Add an explict .arch armv5 in the inline assembly to allow the ARMv5
specific instructions regardless of the compiler -march= target.

Link: https://lore.kernel.org/r/20190809163334.489360-5-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:36:22 +02:00
Arnd Bergmann
aad7ad2a01 dma: iop-adma: allow building without platform headers
Now that iop3xx and iop13xx are gone, the iop-adma driver no
longer needs to deal with incompatible register layout defined
in machine specific header files.

Move the iop32x specific definitions into drivers/dma/iop-adma.h
and the platform_data into include/linux/platform_data/dma-iop32x.h,
and change the machine code to no longer reference those.

The DMA0_ID/DMA1_ID/AAU_ID macros are required as part of the
platform data interface and still need to be visible, so move
those from one header to the other.

Link: https://lore.kernel.org/r/20190809163334.489360-4-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:36:22 +02:00
Arnd Bergmann
59d3ae9a5b ARM: remove Intel iop33x and iop13xx support
There are three families of IOP machines we support in Linux: iop32x
(which includes EP80219), iop33x and iop13xx (aka IOP34x aka WP8134x).

All products we support in the kernel are based on the first of these,
iop32x, the other families only ever supported the Intel reference
boards but no actual machine anyone could ever buy.

While one could clearly make them all three work in a single kernel
with some work, this takes the easy way out, removing the later two
platforms entirely, under the assumption that there are no remaining
users.

Earlier versions of OpenWRT and Debian both had support for iop32x
but not the others, and they both dropped iop32x as well in their 2015
releases.

Link: https://lore.kernel.org/r/20190809163334.489360-1-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de> # for I2C parts
Acked-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:36:21 +02:00
Arnd Bergmann
e14e5c1111 Renesas ARM64 DT updates for v5.4
- CAN, BT, and WLAN support for the HiHope RZ/G2[MN] boards,
   - Sound support for RZ/G2M,
   - Sort nodes in various SoC and board DTSes,
   - Small fixes and improvements.
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Merge tag 'renesas-arm64-dt-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM64 DT updates for v5.4

  - CAN, BT, and WLAN support for the HiHope RZ/G2[MN] boards,
  - Sound support for RZ/G2M,
  - Sort nodes in various SoC and board DTSes,
  - Small fixes and improvements.

* tag 'renesas-arm64-dt-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (23 commits)
  arm64: dts: renesas: ulcb: Sort nodes
  arm64: dts: renesas: ulcb-kf: Sort nodes
  arm64: dts: renesas: salvator-common: Sort nodes
  arm64: dts: renesas: r8a7796: salvator-xs: Sort nodes
  arm64: dts: renesas: r8a7796: salvator-x: Sort nodes
  arm64: dts: renesas: r8a7795: salvator-xs: Sort nodes
  arm64: dts: renesas: r8a7795: salvator-x: Sort nodes
  arm64: dts: renesas: r8a7795-es1: salvator-x: Sort nodes
  arm64: dts: renesas: r8a77965: Sort nodes
  arm64: dts: renesas: r8a7795-es1: Sort nodes
  arm64: dts: renesas: r8a7795: Sort nodes
  arm64: dts: renesas: r8a774a1: Add SSIU support for sound
  arm64: dts: renesas: r8a774a1: Use extended audio dmac registers
  arm64: dts: renesas: hihope-common: Add WLAN support
  arm64: dts: renesas: hihope-common: Add BT support
  arm64: dts: renesas: hihope-common: Add PCA9654 I/O expander
  arm64: dts: renesas: hihope-rzg2-ex: Enable CAN interfaces
  arm64: dts: renesas: r8a774a1: Add CANFD support
  arm64: dts: renesas: r8a774a1: Add missing assigned-clocks for CAN[01]
  arm64: dts: renesas: r8a774c0: Add missing assigned-clocks for CAN[01]
  ...

Link: https://lore.kernel.org/r/20190802120355.1430-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:24:38 +02:00
Arnd Bergmann
f50365a192 STM32 defconfig updates for v5.4, round 1
Highlights:
 ----------
 
 -Enable FMC2 NAND (used for STM32MP socs)
 -Enable STM32 booster regulator as module
 -Enable STM32 QSPI as module
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Merge tag 'stm32-defconfig-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/defconfig

STM32 defconfig updates for v5.4, round 1

Highlights:
----------

-Enable FMC2 NAND (used for STM32MP socs)
-Enable STM32 booster regulator as module
-Enable STM32 QSPI as module

* tag 'stm32-defconfig-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI support
  ARM: multi_v7_defconfig: enable STM32 booster regulator
  ARM: multi_v7_defconfig: add FMC2 NAND controller support

Link: https://lore.kernel.org/r/b164eaa8-4553-9c0f-0729-2ecc96fbae7a@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:22:02 +02:00
Patrice Chotard
2e925d2315 ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI support
Enable support for QSPI block on STM32 SoCs.

Link: https://lore.kernel.org/r/20190731072204.32160-1-patrice.chotard@st.com
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:07:38 +02:00
Arnd Bergmann
f63cf88fd8 ARM: remove w90x900 platform
This removes the old Winbond w90x900 platform, also known
as Nuvoton NUC900. Wan Zongshun originally contributed
the port and maintained it since then.

From all I can tell, this platform is no longer being used
with modern kernels, based on various indications:

- The supported chips (nuc910/950/960) are no longer marketed
  by the manufacturer

- Newer chips from the same family (nuc97x, nuc980, n329x)
  that are still marketed have Linux BSPs but those were never
  submitted for upstream inclusion.

- The last patch from the platform maintainer was in 2011.

- All patches to w90x900 platform specific files afterwards
  are cleanups that were apparently done without access to
  test hardware.

- Both the website and the email address listed in the
  MAINTAINERS have become unreachable.

Link: https://lore.kernel.org/r/20190809202749.742267-17-arnd@arndb.de
Cc: "Wanzongshun (Vincent)" <wanzongshun@huawei.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:04:09 +02:00
Arnd Bergmann
c68b26697d ARM: remove ks8695 platform
ks8695 is an older SoC originally made by Kendin, which was later acquired
by Micrel, and subsequently by Microchip.

The platform port was originally contributed by Andrew Victor and Ben
Dooks, and later maintained by Greg Ungerer.

When I recently submitted cleanups, but Greg noted that the platform no
longer boots and nobody is using it any more, we decided to remove it.

Link: https://lore.kernel.org/r/20190809202749.742267-2-arnd@arndb.de
Cc: Andrew Victor <linux@maxim.org.za>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Link: https://wikidevi.com/wiki/Micrel
Link: https://lore.kernel.org/linux-arm-kernel/2bc41895-d4f9-896c-0726-0b2862fcbf25@kernel.org/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Greg Ungerer <gerg@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:03:52 +02:00
Lorenzo Pieralisi
72362da873 ARM: imx_v6_v7_defconfig: Enable the PSCI CPUidle driver
Enable the PSCI CPUidle driver to replace the functionality
previously provided by the generic ARM CPUidle driver.

Link: https://lore.kernel.org/r/20190814125239.6270-3-lorenzo.pieralisi@arm.com
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:02:11 +02:00
Lorenzo Pieralisi
a227229f62 arm64: defconfig: Enable the PSCI CPUidle driver
Enable the PSCI CPUidle driver to replace the functionality
previously provided by the generic ARM CPUidle driver through
CPU operations.

Link: https://lore.kernel.org/r/20190814125239.6270-2-lorenzo.pieralisi@arm.com
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-14 15:02:01 +02:00
Will Deacon
d0b3c32ed9 arm64: memory: Cosmetic cleanups
Cleanup memory.h so that the indentation is consistent, remove pointless
line-wrapping and use consistent parameter names for different versions
of the same macro.

Reviewed-by: Steve Capper <steve.capper@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:09:45 +01:00
Will Deacon
68933aa973 arm64: memory: Add comments to end of non-trivial #ifdef blocks
Commenting the #endif of a multi-statement #ifdef block with the
condition which guards it is useful and can save having to scroll back
through the file to figure out which set of Kconfig options apply to
a particular piece of code.

Reviewed-by: Steve Capper <steve.capper@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:09:24 +01:00
Will Deacon
6bbd497f02 arm64: memory: Implement __tag_set() as common function
There's no need for __tag_set() to be a complicated macro when
CONFIG_KASAN_SW_TAGS=y and a simple static inline otherwise. Rewrite
the thing as a common static inline function.

Tested-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:08:44 +01:00
Will Deacon
a5ac40f53b arm64: memory: Simplify _VA_START and _PAGE_OFFSET definitions
Rather than subtracting from -1 and then adding 1, we can simply
subtract from 0.

Tested-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:08:40 +01:00
Will Deacon
9ba33dcc6b arm64: memory: Simplify virt_to_page() implementation
Build virt_to_page() on top of virt_to_pfn() so we can avoid the need
for explicit shifting.

Tested-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:07:49 +01:00
Will Deacon
96628f0fb1 arm64: memory: Rewrite default page_to_virt()/virt_to_page()
The default implementations of page_to_virt() and virt_to_page() are
fairly confusing to read and the former evaluates its 'page' parameter
twice in the macro

Rewrite them so that the computation is expressed as 'base + index' in
both cases and the parameter is always evaluated exactly once.

Tested-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:05:35 +01:00
Will Deacon
577c2b3528 arm64: memory: Ensure address tag is masked in conversion macros
When converting a linear virtual address to a physical address, pfn or
struct page *, we must make sure that the tag bits are masked before the
calculation otherwise we end up with corrupt pointers when running with
CONFIG_KASAN_SW_TAGS=y:

  | Unable to handle kernel paging request at virtual address 0037fe0007580d08
  | [0037fe0007580d08] address between user and kernel address ranges

Mask out the tag in __virt_to_phys_nodebug() and virt_to_page().

Reported-by: Qian Cai <cai@lca.pw>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Tested-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Fixes: 9cb1c5ddd2 ("arm64: mm: Remove bit-masking optimisations for PAGE_OFFSET and VMEMMAP_START")
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:04:46 +01:00
Will Deacon
68dd8ef321 arm64: memory: Fix virt_addr_valid() using __is_lm_address()
virt_addr_valid() is intended to test whether or not the passed address
is a valid linear map address. Unfortunately, it relies on
_virt_addr_is_linear() which is broken because it assumes the linear
map is at the top of the address space, which it no longer is.

Reimplement virt_addr_valid() using __is_lm_address() and remove
_virt_addr_is_linear() entirely. At the same time, ensure we evaluate
the macro parameter only once and move it within the __ASSEMBLY__ block.

Reported-by: Qian Cai <cai@lca.pw>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Tested-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Fixes: 14c127c957 ("arm64: mm: Flip kernel VA space")
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-14 13:00:57 +01:00
Will Deacon
d06fa5a118 Merge tag 'common/for-v5.4-rc1/cpu-topology' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux into for-next/cpu-topology
Pull in generic CPU topology changes from Paul Walmsley (RISC-V).

* tag 'common/for-v5.4-rc1/cpu-topology' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  MAINTAINERS: Add an entry for generic architecture topology
  base: arch_topology: update Kconfig help description
  RISC-V: Parse cpu topology during boot.
  arm: Use common cpu_topology structure and functions.
  cpu-topology: Move cpu topology code to common code.
  dt-binding: cpu-topology: Move cpu-map to a common binding.
  Documentation: DT: arm: add support for sockets defining package boundaries
2019-08-14 10:07:00 +01:00
Luis Araneda
b7005d4ef4 ARM: zynq: Use memcpy_toio instead of memcpy on smp bring-up
This fixes a kernel panic on memcpy when
FORTIFY_SOURCE is enabled.

The initial smp implementation on commit aa7eb2bb4e
("arm: zynq: Add smp support")
used memcpy, which worked fine until commit ee333554fe
("ARM: 8749/1: Kconfig: Add ARCH_HAS_FORTIFY_SOURCE")
enabled overflow checks at runtime, producing a read
overflow panic.

The computed size of memcpy args are:
- p_size (dst): 4294967295 = (size_t) -1
- q_size (src): 1
- size (len): 8

Additionally, the memory is marked as __iomem, so one of
the memcpy_* functions should be used for read/write.

Fixes: aa7eb2bb4e ("arm: zynq: Add smp support")
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-14 09:40:43 +02:00
Luis Araneda
5f595063af ARM: zynq: Support smp in thumb mode
Add .arm directive to headsmp.S to ensure that the
CPU starts in 32-bit ARM mode and the correct code
size is copied on smp bring-up.
This is related to the fix applied to SoCFPGA by
commit 5616f36713
("ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel")

Additionally, start secondary CPUs on secondary_startup_arm
to automatically switch from ARM to thumb on a thumb kernel

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-14 09:40:35 +02:00
Alistair Francis
d568cb3f93 riscv: defconfig: Update the defconfig
Update the defconfig:
 - Add CONFIG_HW_RANDOM=y and CONFIG_HW_RANDOM_VIRTIO=y to enable
   VirtIORNG when running on QEMU

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-08-13 19:26:42 -07:00
Alistair Francis
500bc2c1f4 riscv: rv32_defconfig: Update the defconfig
Update the rv32_defconfig:
 - Add 'CONFIG_DEVTMPFS_MOUNT=y' to match the RISC-V defconfig
 - Add CONFIG_HW_RANDOM=y and CONFIG_HW_RANDOM_VIRTIO=y to enable
   VirtIORNG when running on QEMU

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2019-08-13 19:26:38 -07:00
Ben Pai
0a1dcf954e ARM: dts: aspeed: Add Mihawk BMC platform
The Mihawk BMC is an ASPEED ast2500 based BMC that is part of an
OpenPower Power9 server.

Signed-off-by: Ben Pai <Ben_Pai@wistron.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-14 11:06:47 +09:30
John Wang
d00523097a ARM: dts: aspeed: fp5280g2: Fix power supply address
There are two PSU on i2c11. PSU0's address is 0x58, PSU1's address is
`0x59`, not `0x5a`.

Signed-off-by: John Wang <wangzqbj@inspur.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2019-08-14 11:05:07 +09:30
Paul E. McKenney
31da067023 Merge branches 'consolidate.2019.08.01b', 'fixes.2019.08.12a', 'lists.2019.08.13a' and 'torture.2019.08.01b' into HEAD
consolidate.2019.08.01b: Further consolidation cleanups
fixes.2019.08.12a: Miscellaneous fixes
lists.2019.08.13a: Optional lockdep arguments for RCU list macros
torture.2019.08.01b: Torture-test updates
2019-08-13 14:30:30 -07:00
Joel Fernandes (Google)
842a56cf3e x86/pci: Pass lockdep condition to pcm_mmcfg_list iterator
The pcm_mmcfg_list is traversed by list_for_each_entry_rcu() outside
of an RCU read-side critical section, which is safe because the
pci_mmcfg_lock is held.  This commit therefore adds a lockdep expression
to list_for_each_entry_rcu() in order t avoid lockdep warnings.

Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Joel Fernandes (Google) <joel@joelfernandes.org>
Signed-off-by: Paul E. McKenney <paulmck@linux.ibm.com>
2019-08-13 14:29:22 -07:00
Paul Walmsley
eb93685847 riscv: fix flush_tlb_range() end address for flush_tlb_page()
The RISC-V kernel implementation of flush_tlb_page() when CONFIG_SMP
is set is wrong.  It passes zero to flush_tlb_range() as the final
address to flush, but it should be at least 'addr'.

Some other Linux architecture ports use the beginning address to
flush, plus PAGE_SIZE, as the final address to flush.  This might
flush slightly more than what's needed, but it seems unlikely that
being more clever would improve anything.  So let's just take that
implementation for now.

While here, convert the macro into a static inline function, primarily
to avoid unintentional multiple evaluations of 'addr'.

This second version of the patch fixes a coding style issue found by
Christoph Hellwig <hch@lst.de>.

Reported-by: Andreas Schwab <schwab@suse.de>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
2019-08-13 14:03:52 -07:00
Mark Rutland
37143dcc44 arm64: constify sys64_hook instances
All instances of struct sys64_hook contain compile-time constant data,
and are never inentionally modified, so let's make them all const.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-13 18:32:17 +01:00
Mark Rutland
0da23df2ff arm64: constify aarch64_insn_encoding_class[]
The aarch64_insn_encoding_class[] array contains compile-time constant
data, and is never intentionally modified, so let's mark it as const.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-13 18:32:17 +01:00
Mark Rutland
0bf136a8cf arm64: constify icache_policy_str[]
The icache_policy_str[] array contains compile-time constant data, and
is never intentionally modified, so let's mark it as const.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-13 18:32:17 +01:00
Nick Desaulniers
80d8381226 arm64: prefer __section from compiler_attributes.h
GCC unescapes escaped string section names while Clang does not. Because
__section uses the `#` stringification operator for the section name, it
doesn't need to be escaped.

This antipattern was found with:
$ grep -e __section\(\" -e __section__\(\" -r

Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
Suggested-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Will Deacon <will@kernel.org>
2019-08-13 18:32:15 +01:00
Ilya Leoshkevich
91b4db5313 s390/bpf: use 32-bit index for tail calls
"p runtime/jit: pass > 32bit index to tail_call" fails when
bpf_jit_enable=1, because the tail call is not executed.

This in turn is because the generated code assumes index is 64-bit,
while it must be 32-bit, and as a result prog array bounds check fails,
while it should pass. Even if bounds check would have passed, the code
that follows uses 64-bit index to compute prog array offset.

Fix by using clrj instead of clgrj for comparing index with array size,
and also by using llgfr for truncating index to 32 bits before using it
to compute prog array offset.

Fixes: 6651ee070b ("s390/bpf: implement bpf_tail_call() helper")
Reported-by: Yauheni Kaliuta <yauheni.kaliuta@redhat.com>
Acked-by: Vasily Gorbik <gor@linux.ibm.com>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2019-08-13 16:07:13 +02:00
Linus Walleij
367f4acc69 ARM: mach-nspire: Kill off CLCD auxdata
After transitioning the CLCD to use DRM we can now kill off
the final piece of auxdata on the NSPIRE.

Link: https://lore.kernel.org/r/20190810075023.7327-1-linus.walleij@linaro.org
Cc: Daniel Tang <dt.tangr@gmail.com>
Cc: Fabian Vogt <fabian@ritter-vogt.de>
Tested-by: Fabian Vogt <fabian@ritter-vogt.de>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 15:48:23 +02:00
Arnd Bergmann
2a2bb58aae DTS updates for the Gemini platform:
- Fix up some pin config confusion
 
 - Use redboot partition parsing on the SL93512r
 
 - Mount root on mtdblock3 by default
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Merge tag 'gemini-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt

DTS updates for the Gemini platform:

- Fix up some pin config confusion

- Use redboot partition parsing on the SL93512r

- Mount root on mtdblock3 by default

* tag 'gemini-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: gemini: Mount root from mtdblock3
  ARM: dts: gemini: Switch to redboot partition parsing
  ARM: dts: gemini: Fix up confused pin settings

Link: https://lore.kernel.org/r/CACRpkdarsQNfXgXMQKfYwOyiqhKY67gKd3ufQ+wexwO3v=LE5w@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 15:43:13 +02:00
Arnd Bergmann
fbe4a49f6d STM32 DT updates for v5.4, round 1
Highlights:
 ----------
 
 MPU part:
  -Add FMC2 NAND controller support on stm32mp157c-ev1.
  -Add M4 remoteproc support:
   -Add support in stm32mp157c.dtsi.
   -Declare copro reserved memories region on stm32mp157 EV1 and DK1
    boards.
   -Enable M4 copro support on stm32mp157 EV1 and DK1.
  -Add booster for ADC on stm32mp157c.
  -Add audio codec support on stm32mp157 DK1.
 
 MCU part:
  -Remove fixed regulator unit address on stm32429i-eval used by ADC.
  -Add missing vdd-supply required by ADC on stm32429i-eval and
   stm32h743i-eval.
  -Add pwm cells on f746 and f429.
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Merge tag 'stm32-dt-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.4, round 1

Highlights:
----------

MPU part:
 -Add FMC2 NAND controller support on stm32mp157c-ev1.
 -Add M4 remoteproc support:
  -Add support in stm32mp157c.dtsi.
  -Declare copro reserved memories region on stm32mp157 EV1 and DK1
   boards.
  -Enable M4 copro support on stm32mp157 EV1 and DK1.
 -Add booster for ADC on stm32mp157c.
 -Add audio codec support on stm32mp157 DK1.

MCU part:
 -Remove fixed regulator unit address on stm32429i-eval used by ADC.
 -Add missing vdd-supply required by ADC on stm32429i-eval and
  stm32h743i-eval.
 -Add pwm cells on f746 and f429.

* tag 'stm32-dt-for-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (21 commits)
  ARM: dts: stm32: remove useless pinctrl entries in stm32mp157-pinctrl
  ARM: dts: stm32: add phy-dsi-supply property on stm32mp157c-ev1
  ARM: dts: stm32: add audio codec support on stm32mp157a-dk1 board
  ARM: dts: stm32: add syscfg to ADC on stm32mp157c
  ARM: dts: stm32: add pwm cells to stm32f746
  ARM: dts: stm32: add pwm cells to stm32f429
  ARM: dts: stm32: add pwm cells to stm32mp157c
  ARM: dts: stm32: fix -Wall W=1 compilation in stm32mp157 pinctrl for mcan
  ARM: dts: stm32: add booster for ADC analog switches on stm32mp157c
  ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1
  ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1
  ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1
  ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1
  ARM: dts: stm32: add m4 remoteproc support on STM32MP157c
  ARM: dts: stm32: add missing vdda-supply to adc on stm32h743i-eval
  ARM: dts: stm32: add missing vdda-supply to adc on stm32429i-eval
  ARM: dts: stm32: remove fixed regulator unit address on stm32429i-eval
  ARM: dts: stm32: enable FMC2 NAND controller on stm32mp157c-ev1
  ARM: dts: stm32: add FMC2 NAND controller pins muxing on stm32mp157c-ev1
  ARM: dts: stm32: add FMC2 NAND controller support on stm32mp157c
  ...

Link: https://lore.kernel.org/r/482a2a40-a246-6654-7e3b-8e38b137752f@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 15:42:09 +02:00
Arnd Bergmann
d4bc63b193 This are some DTS changes for the Ux500 for the v5.4 kernel cycle:
- Update the CoreSight blocks to use the latest and greatest
   bindings
 
 - Push the thermal driver config down to the main SoC DTSI
   as it applies to all ASICs.
 
 - Set a pull-up on the ST UIB right.
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Merge tag 'ux500-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt

This are some DTS changes for the Ux500 for the v5.4 kernel cycle:

- Update the CoreSight blocks to use the latest and greatest
  bindings

- Push the thermal driver config down to the main SoC DTSI
  as it applies to all ASICs.

- Set a pull-up on the ST UIB right.

* tag 'ux500-dts-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: dts: ux500: set pull-up on STUIB STMPE IRQ line
  ARM: dts: ux500: Fix up the thermal nodes
  ARM: dts: ste: Update coresight DT bindings

Link: https://lore.kernel.org/r/CACRpkdbKX7a15SC-zwxmH_ygGzOKrn0h-pzzm22UpRcLRfRVNA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 15:30:45 +02:00
Linus Walleij
da5fbcb1d0 ARM: dts: Update the NSPIRE DTS files for DRM
The DRM subsystem graphics drivers require more granular
definition of the connection between display drivers and
panels, and a proper panel compatible. This utilizes the
bindings merged to the DRM subsystem to properly define
the display on the NSPIRE devices.

We also do away with the undocumented DT binding
"lcd-type".

We add both the clocks to the CLCD block so the driver
have full control over its clocking.

Link: https://lore.kernel.org/r/20190810074230.6492-1-linus.walleij@linaro.org
Cc: Daniel Tang <dt.tangr@gmail.com>
Cc: Fabian Vogt <fabian@ritter-vogt.de>
Tested-by: Fabian Vogt <fabian@ritter-vogt.de>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 15:28:34 +02:00
Linus Walleij
c08b598410 ARM: dts: nomadik: Set up the CS GPIO right
Now that the SPI GPIO driver knows how to handle these
chip select GPIOs and we get nasty messages about the
core having to enforce active low on the GPIO, fix this
up by actually requesting the CS GPIO line as active
low.

Link: https://lore.kernel.org/r/20190813072731.4558-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 15:28:33 +02:00
Arnd Bergmann
ebc526233b i.MX fixes for 5.3, round 2:
- A fix on vf610-bk4 board qspi device description to get SPI-NOR
    memory recognized correctly.
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Merge tag 'imx-fixes-5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.3, round 2:
 - A fix on vf610-bk4 board qspi device description to get SPI-NOR
   memory recognized correctly.

* tag 'imx-fixes-5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: vf610-bk4: Fix qspi node description

Link: https://lore.kernel.org/r/20190812160020.GA12364@X250
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-13 14:05:10 +02:00
Will Deacon
5717fe5ab3 arm64: cpufeature: Don't treat granule sizes as strict
If a CPU doesn't support the page size for which the kernel is
configured, then we will complain and refuse to bring it online. For
secondary CPUs (and the boot CPU on a system booting with EFI), we will
also print an error identifying the mismatch.

Consequently, the only time that the cpufeature code can detect a
granule size mismatch is for a granule other than the one that is
currently being used. Although we would rather such systems didn't
exist, we've unfortunately lost that battle and Kevin reports that
on his amlogic S922X (odroid-n2 board) we end up warning and taining
with defconfig because 16k pages are not supported by all of the CPUs.

In such a situation, we don't actually care about the feature mismatch,
particularly now that KVM only exposes the sanitised view of the CPU
registers (commit 93390c0a1b - "arm64: KVM: Hide unsupported AArch64
CPU features from guests"). Treat the granule fields as non-strict and
let Kevin run without a tainted kernel.

Cc: Marc Zyngier <maz@kernel.org>
Reported-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
[catalin.marinas@arm.com: changelog updated with KVM sanitised regs commit]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2019-08-13 12:56:35 +01:00
Gustavo A. R. Silva
0c0d1ec21b ARM: OMAP: dma: Mark expected switch fall-throughs
Mark switch cases where we are expecting to fall through.

This patch fixes the following warnings:

arch/arm/plat-omap/dma.c: In function 'omap_set_dma_src_burst_mode':
arch/arm/plat-omap/dma.c:384:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
   if (dma_omap2plus()) {
      ^
arch/arm/plat-omap/dma.c:393:2: note: here
  case OMAP_DMA_DATA_BURST_16:
  ^~~~
arch/arm/plat-omap/dma.c:394:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
   if (dma_omap2plus()) {
      ^
arch/arm/plat-omap/dma.c:402:2: note: here
  default:
  ^~~~~~~
arch/arm/plat-omap/dma.c: In function 'omap_set_dma_dest_burst_mode':
arch/arm/plat-omap/dma.c:473:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
   if (dma_omap2plus()) {
      ^
arch/arm/plat-omap/dma.c:481:2: note: here
  default:
  ^~~~~~~

Notice that, in this particular case, the code comment is
modified in accordance with what GCC is expecting to find.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13 04:53:37 -07:00
David Lechner
a27401cecf ARM: dts: am335x-boneblue: Use of am335x-osd335x-common.dtsi
This makes use of the am335x-osd335x-common.dtsi file that contains the
common device tree components for Octavo Systems AM335x System-in-
Package that is used on the BeagleBone Blue.

This has two minor side-effects:
1. pinmux_i2c0_pins is renamed to pinmux-i2c0-pins
2. the 1000MHz cpufreq operating point is enabled

Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13 04:51:31 -07:00
H. Nikolaus Schaller
26b1c8bed5 ARM: dts: gta04: define chosen/stdout-path
This allows to remove the console= entry in the kernel command line.

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13 04:47:15 -07:00
Ezequiel Garcia
9fc6bff807 ARM: dts: omap3-n950-n9: Remove regulator-boot-off property
This property was never supported upstream. Get rid of it.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13 04:45:13 -07:00
Ezequiel Garcia
dc1b6ca8fa ARM: dts: am335x-cm-t335: Remove regulator-boot-off property
This property was never supported upstream. Get rid of it.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13 04:45:06 -07:00
Tony Lindgren
50e4b5cac4 Merge branch 'ti-sysc-fixes' into fixes 2019-08-13 04:04:16 -07:00