This adds myself as the Google contact for embargoed hardware security
issues and fixes some small typos.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Matt Linton <amuse@google.com>
Cc: Matthew Garrett <mjg59@google.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: Guenter Roeck <groeck@chromium.org>
Link: https://lore.kernel.org/r/201909040922.56496BF70@keescook
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The timeriomem_rng driver only accesses the first 4 bytes of the given
memory area and currently, it also forces that memory resource to be
exactly 4 bytes in size.
This, however, is problematic when used with device-trees that are
generated from things like FPGA toolchains, where the minimum size
of an exposed memory block may be something like 4k.
Hence, let's only check for what's needed for the driver to operate
properly; namely that we have enough memory available to read the
random data from.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Introduce two options to control the use of the tlbie instruction. A
boot time option which completely disables the kernel using the
instruction, this is currently incompatible with HASH MMU, KVM, and
coherent accelerators.
And a debugfs option can be switched at runtime and avoids using tlbie
for invalidating CPU TLBs for normal process and kernel address
mappings. Coherent accelerators are still managed with tlbie, as will
KVM partition scope translations.
Cross-CPU TLB flushing is implemented with IPIs and tlbiel. This is a
basic implementation which does not attempt to make any optimisation
beyond the tlbie implementation.
This is useful for performance testing among other things. For example
in certain situations on large systems, using IPIs may be faster than
tlbie as they can be directed rather than broadcast. Later we may also
take advantage of the IPIs to do more interesting things such as trim
the mm cpumask more aggressively.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190902152931.17840-7-npiggin@gmail.com
MT7530 port 5 has many modes/configurations.
Update the documentation how to use port 5.
Signed-off-by: René van Dorst <opensource@vdorst.com>
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds device tree binding documentation for the driver communicating
with the rWTM firmware on Turris Mox.
Link: https://lore.kernel.org/r/20190822014318.19478-2-marek.behun@nic.cz
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add support for Turris Mox board (Armada 3720 SoC based)
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXW5eNQAKCRALBhiOFHI7
1aqnAJsGU/B3GFbhiuwI4+l3In7TMVVpIgCbB1T/eo1RJhvh9kH9zMj641Rmsk0=
=B8dQ
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt64-5.4-2' of git://git.infradead.org/linux-mvebu into arm/late
mvebu dt64 for 5.4 (part 2)
Add support for Turris Mox board (Armada 3720 SoC based)
* tag 'mvebu-dt64-5.4-2' of git://git.infradead.org/linux-mvebu: (53 commits)
arm64: dts: marvell: add DTS for Turris Mox
dt-bindings: marvell: document Turris Mox compatible
arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl
arm64: dts: marvell: Add cpu clock node on Armada 7K/8K
arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply
arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
arm64: dts: marvell: Add CP110 COMPHY clocks
arm64: dts: marvell: armada-37xx: add mailbox node
dt-bindings: gpio: Document GPIOs via Moxtet bus
drivers: gpio: Add support for GPIOs over Moxtet bus
bus: moxtet: Add sysfs and debugfs documentation
dt-bindings: bus: Document moxtet bus binding
bus: Add support for Moxtet bus
reset: Add support for resets provided by SCMI
firmware: arm_scmi: Add RESET protocol in SCMI v2.0
dt-bindings: arm: Extend SCMI to support new reset protocol
firmware: arm_scmi: Make use SCMI v2.0 fastchannel for performance protocol
firmware: arm_scmi: Add discovery of SCMI v2.0 performance fastchannels
...
Link: https://lore.kernel.org/r/87h85two0r.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Typo fixes for gic-its unit addresses for both am654 and j721e
- HW spinlock nodes added for both am654 and j721e
- GPIO support for j721e
- power-domain cells update for both am654 / j721e for exclusive only
access
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEtQ6szHmfiBT7fujkyvq9MXlQGhEFAl1pFzsQHHQta3Jpc3Rv
QHRpLmNvbQAKCRDK+r0xeVAaERL3D/44Xth2Ti/UIZIzZrM7t6R2t84UYoYF2AFu
129ehlVk7k6pqiv1FRHG4SQpRV09DRmUX1JIoukoNtfrQMmF1C1/ryLaHGf/4vV6
sj/tbIPs1LxrTomCOuoLG2quhu6JBHDWE8ZjRJnOFo7rHOTo1w0orOnnnx6S0ES8
5WyFAecfI34noroFcHZ0mKcZmG2/AkzY6pDQGSMOnugbCjq2EteFwoKcVssKdcsA
tlT5KkqAwehS4CdZxObikE3y5rYALinFcZYATzX1eHkd4Jqo0PchunXSLj0A5y7i
7tVSslCaCZKKFg7BYpXbKA/vAhMXfpKjpL3hosHb7qPQ84GsCl1WIfH4HKtqkOXA
81jbOZu7Dgqx7J11Dtj7h46G84pxaO/78izEoineheIfKheYePyG1rRcJAHkxebF
hGZE/KbXyx5Uj8sjVtrCg4/xdrnD17JT/GGelw83vPIxf49rWvq1Rt+njIDCcIyq
GpWwjjJWnKbLx75Dr480YEU6Klp4YuyBOOL9X+/8dQLTOhtlmR2jq4TzkqtDsqWW
DFp2HQSCv7jsFag50qYrUCwcvI9Ru8MMNIX9laXVKPINqVB0aMa00EdvpBDY2eMh
mOXeurMY7jQ907oymSw7rx6DhjlQx9qcNqHgpyTJ7k9xSVW5NqQoTBnmm06pviC6
55xzDSjBAw==
=OoxU
-----END PGP SIGNATURE-----
Merge tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/late
Texas Instruments K3 SoC family changes for 5.4
- Typo fixes for gic-its unit addresses for both am654 and j721e
- HW spinlock nodes added for both am654 and j721e
- GPIO support for j721e
- power-domain cells update for both am654 / j721e for exclusive only
access
* tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address
arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address
arm64: dts: ti: k3-j721e-main: Add hwspinlock node
arm64: dts: ti: k3-am65-main: Add hwspinlock node
arm64: dts: k3-j721e: Add gpio-keys on common processor board
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
arm64: dts: ti: k3-j721e-common-proc-board: Disable unused gpio modules
arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain
arm64: dts: ti: k3-j721e: Add gpio nodes in main domain
arm64: dts: ti: k3-j721e: Update the power domain cells
arm64: dts: ti: k3-am654: Update the power domain cells
soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
firmware: ti_sci: Allow for device shared and exclusive requests
Link: https://lore.kernel.org/r/b838d666-ab3b-7d41-67d4-09d606c732da@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SAE J1939 is the vehicle bus recommended practice used for communication
and diagnostics among vehicle components. Originating in the car and
heavy-duty truck industry in the United States, it is now widely used in
other parts of the world.
J1939, ISO 11783 and NMEA 2000 all share the same high level protocol.
SAE J1939 can be considered the replacement for the older SAE J1708 and
SAE J1587 specifications.
Acked-by: Oliver Hartkopp <socketcan@hartkopp.net>
Signed-off-by: Bastian Stender <bst@pengutronix.de>
Signed-off-by: Elenita Hinds <ecathinds@gmail.com>
Signed-off-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Kurt Van Dijck <dev.kurt@vandijck-laurijssen.be>
Signed-off-by: Maxime Jayat <maxime.jayat@mobile-devices.fr>
Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Add a paragraph to describe the use of the "of_id" module parameter,
along with the new DT property.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20190815212807.25058-2-daniel@zonque.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add documentation for the serial communication interface module (LINFlexD),
found in two instances on S32V234.
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20190823191115.18490-7-stefan-gabriel.mirea@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Guessing the first tty for a gsm0710 multiplexed serial device is not
currently possible, which makes it racy to use with multiple modems.
Add a way to map the physical serial tty to its related mux devices
using an ioctl.
Signed-off-by: Martin Hundebøll <martin@geanix.com>
Link: https://lore.kernel.org/r/20190812211243.98686-1-martin@geanix.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Introduce support for LINFlex driver, based on:
- the version of Freescale LPUART driver after commit b3e3bf2ef2 ("Merge
4.0-rc7 into tty-next");
- commit abf1e0a980 ("tty: serial: fsl_lpuart: lock port on console
write").
In this basic version, the driver can be tested using initramfs and relies
on the clocks and pin muxing set up by U-Boot.
Remarks concerning the earlycon support:
- LinFlexD does not allow character transmissions in the INIT mode (see
section 47.4.2.1 in the reference manual[1]). Therefore, a mutual
exclusion between the first linflex_setup_watermark/linflex_set_termios
executions and linflex_earlycon_putchar was employed and the characters
normally sent to earlycon during initialization are kept in a buffer and
sent afterwards.
- Empirically, character transmission is also forbidden within the last 1-2
ms before entering the INIT mode, so we use an explicit timeout
(PREINIT_DELAY) between linflex_earlycon_putchar and the first call to
linflex_setup_watermark.
- U-Boot currently uses the UART FIFO mode, while this driver makes the
transition to the buffer mode. Therefore, the earlycon putchar function
matches the U-Boot behavior before initializations and the Linux behavior
after.
[1] https://www.nxp.com/webapp/Download?colCode=S32V234RM
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Adrian.Nitu <adrian.nitu@freescale.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Ana Nedelcu <B56683@freescale.com>
Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Signed-off-by: Matthew Nunez <matthew.nunez@nxp.com>
[stefan-gabriel.mirea@nxp.com: Reduced for upstreaming and implemented
earlycon support]
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Link: https://lore.kernel.org/r/20190809112853.15846-6-stefan-gabriel.mirea@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add a note for enabling wakeup capabilities of usart
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1560433800-12255-2-git-send-email-erwan.leray@st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
There is no reason to gues the line discipline number when it is
available from tty.h
Signed-off-by: Martin Hundebøll <martin@geanix.com>
Link: https://lore.kernel.org/r/20190710192656.60381-2-martin@geanix.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The n_gsm driver handles registration of /dev/gsmttyX nodes, so there's
no need to do mknod manually.
Signed-off-by: Martin Hundebøll <martin@geanix.com>
Link: https://lore.kernel.org/r/20190710192656.60381-1-martin@geanix.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This function is entirely unused given that declared memory is
generally provided by platform setup code.
Signed-off-by: Christoph Hellwig <hch@lst.de>
This patch adds bindings for Soundwire Slave devices that includes how
SoundWire enumeration address and Link ID are used to represented in
SoundWire slave device tree nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20190829163514.11221-2-srinivas.kandagatla@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This pull-request contains the FPGA DFL changes for 5.4
- The first three patches are cleanup patches making use of dev_groups and
making the init callback optional.
- One patch adds userclock sysfs entries that are DFL specific
- One patch exposes AFU port disable/enable functions
- One patch adds error reporting
- One patch adds AFU SignalTap support
- One patch adds FME global error reporting
- The final patch is a documentation patch that decribes the
virtualization interfaces
This patchset requires the 'dev_groups_all_drivers' tag from drivers
core for the dev_groups refactoring as well as the DFL changes already
in char-misc-next.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQS/ea/a56fFi9QbQeJ+E8eWOj6VqQUCXW8mjQAKCRB+E8eWOj6V
qVbHAQDnhqNNyMPY93VseWIyJ/9OpkSzunc820XfmVehPZkw+gD+KLByUWy6vZN0
lh/LgdvIKYeUSm1ZZXj+DszemmaPiwk=
=xtf/
-----END PGP SIGNATURE-----
Merge tag 'fpga-dfl-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next
Moritz writes:
FPGA DFL Changes for 5.4
This pull-request contains the FPGA DFL changes for 5.4
- The first three patches are cleanup patches making use of dev_groups and
making the init callback optional.
- One patch adds userclock sysfs entries that are DFL specific
- One patch exposes AFU port disable/enable functions
- One patch adds error reporting
- One patch adds AFU SignalTap support
- One patch adds FME global error reporting
- The final patch is a documentation patch that decribes the
virtualization interfaces
This patchset requires the 'dev_groups_all_drivers' tag from drivers
core for the dev_groups refactoring as well as the DFL changes already
in char-misc-next.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
* tag 'fpga-dfl-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
Documentation: fpga: dfl: add descriptions for virtualization and new interfaces.
fpga: dfl: fme: add global error reporting support
fpga: dfl: afu: add STP (SignalTap) support
fpga: dfl: afu: add error reporting support.
fpga: dfl: afu: expose __afu_port_enable/disable function.
fpga: dfl: afu: add userclock sysfs interfaces.
fpga: dfl: afu: convert platform_driver to use dev_groups
fpga: dfl: fme: convert platform_driver to use dev_groups
fpga: dfl: make init callback optional
driver core: add dev_groups to all drivers
The commit b37e3534ac ("dt-bindings: dmaengine: Add YAML schemas
for the generic DMA bindings") changed the property from
dma-channel-mask to dma-channel-masks. So, this patch fixes it.
Fixes: b37e3534ac ("dt-bindings: dmaengine: Add YAML schemas for the generic DMA bindings")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1566988223-14657-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Abstract:
--------
Mellanox ConnetX devices supports packet matching, packet modification and
redirection. These functionalities are also referred to as flow-steering.
To configure a steering rule, the rule is written to the device owned
memory, this memory is accessed and cached by the device when processing
a packet.
Steering rules are constructed from multiple steering entries (STE).
Rules are configured using the Firmware command interface. The Firmware
processes the given driver command and translates them to STEs, then
writes them to the device memory in the current steering tables.
This process is slow due to the architecture of the command interface and
the processing complexity of each rule.
The highlight of this patchset is to cut the middle man (The firmware) and
do steering rules programming into device directly from the driver, with
no firmware intervention whatsoever.
Motivation:
-----------
Software (driver managed) steering allows for high rule insertion rates
compared to the FW steering described above, this is achieved by using
internal RDMA writes to the device owned memory instead of the slow
command interface to program steering rules.
Software (driver managed) steering, doesn't depend on new FW
for new steering functionality, new implementations can be done in the
driver skipping the FW layer.
Performance:
------------
The insertion rate on a single core using the new approach allows
programming ~300K rules per sec. (Done via direct raw test to the new mlx5
sw steering layer, without any kernel layer involved).
Test: TC L2 rules
33K/s with Software steering (this patchset).
5K/s with FW and current driver.
This will improve OVS based solution performance.
Architecture and implementation details:
----------------------------------------
Software steering will be dynamically selected via devlink device
parameter. Example:
$ devlink dev param show pci/0000:06:00.0 name flow_steering_mode
pci/0000:06:00.0:
name flow_steering_mode type driver-specific
values:
cmode runtime value smfs
mlx5 software steering module a.k.a (DR - Direct Rule) is implemented
and contained in mlx5/core/steering directory and controlled by
MLX5_SW_STEERING kconfig flag.
mlx5 core steering layer (fs_core) already provides a shim layer for
implementing different steering mechanisms, software steering will
leverage that as seen at the end of this series.
When Software Steering for a specific steering domain
(NIC/RDMA/Vport/ESwitch, etc ..) is supported, it will cause rules
targeting this domain to be created using SW steering instead of FW.
The implementation includes:
Domain - The steering domain is the object that all other object resides
in. It holds the memory allocator, send engine, locks and other shared
data needed by lower objects such as table, matcher, rule, action.
Each domain can contain multiple tables. Domain is equivalent to
namespaces e.g (NIC/RDMA/Vport/ESwitch, etc ..) as implemented
currently in mlx5_core fs_core (flow steering core).
Table - Table objects are used for holding multiple matchers, each table
has a level used to prevent processing loops. Packets are being
directed to this table once it is set as the root table, this is done
by fs_core using a FW command. A packet is being processed inside the
table matcher by matcher until a successful hit, otherwise the packet
will perform the default action.
Matcher - Matchers objects are used to specify the fields mask for
matching when processing a packet. A matcher belongs to a table, each
matcher can hold multiple rules, each rule with different matching
values corresponding to the matcher mask. Each matcher has a priority
used for rule processing order inside the table.
Action - Action objects are created to specify different steering actions
such as count, reformat (encapsulate, decapsulate, ...), modify
header, forward to table and many other actions. When creating a rule
a sequence of actions can be provided to be executed on a successful
match.
Rule - Rule objects are used to specify a specific match on packets as
well as the actions that should be executed. A rule belongs to a
matcher.
STE - This layer is used to hold the specific STE format for the device
and to convert the requested rule to STEs. Each rule is constructed of
an STE chain, Multiple rules construct a steering graph. Each node in
the graph is a hash table containing multiple STEs. The index of each
STE in the hash table is being calculated using a CRC32 hash function.
Memory pool - Used for managing and caching device owned memory for rule
insertion. The memory is being allocated using DM (device memory) API.
Communication with device - layer for standard RDMA operation using RC QP
to configure the device steering.
Command utility - This module holds all of the FW commands that are
required for SW steering to function.
Patch planning and files:
-------------------------
1) First patch, adds the support to Add flow steering actions to fs_cmd
shim layer.
2) Next 12 patch will add a file per each Software steering
functionality/module as described above. (See patches with title: DR, *)
3) Add CONFIG_MLX5_SW_STEERING for software steering support and enable
build with the new files
4) Next two patches will add the support for software steering in mlx5
steering shim layer
net/mlx5: Add API to set the namespace steering mode
net/mlx5: Add direct rule fs_cmd implementation
5) Last two patches will add the new devlink parameter to select mlx5
steering mode, will be valid only for switchdev mode for now.
Two modes are supported:
1. DMFS - Device managed flow steering
2. SMFS - Software/Driver managed flow steering.
In the DMFS mode, the HW steering entities are created through the
FW. In the SMFS mode this entities are created though the driver
directly.
The driver will use the devlink steering mode only if the steering
domain supports it, for now SMFS will manages only the switchdev
eswitch steering domain.
User command examples:
- Set SMFS flow steering mode::
$ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime
- Read device flow steering mode::
$ devlink dev param show pci/0000:06:00.0 name flow_steering_mode
pci/0000:06:00.0:
name flow_steering_mode type driver-specific
values:
cmode runtime value smfs
-----BEGIN PGP SIGNATURE-----
iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAl1uxPAACgkQSD+KveBX
+j5AkggAymoYqG2G+s8cLa4vQFySaD1Td3VzzWglp7PlpDBE3UcSoMAMg/gIDU1D
8F04PeCsJ6snt1ICk56vPNyAEHWfWeBUd56+QK5lEJBuwozyFvBh6HP81Bnr6T/n
n6uTx45ljAFQPTHJjEOLBPSzEXecLu07+mvpzSoW0F3ehfGbELhL1IkVobr/RELx
z4xZW9uM2vm5ylheWvjf4V1S/SvokgJazW9+4fh//rl8tfXgun5IfPoS0hqKie1/
h5sjcMSYkYR4gLVqrhKmBYHmHVl/h0TYROckW8iC/+XX7ailSo9uPG7lPa6cm+GE
7Bajlbz4oD/K5RWoByo+q+dmyjeVhQ==
=M9bS
-----END PGP SIGNATURE-----
Merge tag 'mlx5-updates-2019-09-01-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says:
====================
mlx5-updates-2019-09-01 (Software steering support)
Abstract:
--------
Mellanox ConnetX devices supports packet matching, packet modification and
redirection. These functionalities are also referred to as flow-steering.
To configure a steering rule, the rule is written to the device owned
memory, this memory is accessed and cached by the device when processing
a packet.
Steering rules are constructed from multiple steering entries (STE).
Rules are configured using the Firmware command interface. The Firmware
processes the given driver command and translates them to STEs, then
writes them to the device memory in the current steering tables.
This process is slow due to the architecture of the command interface and
the processing complexity of each rule.
The highlight of this patchset is to cut the middle man (The firmware) and
do steering rules programming into device directly from the driver, with
no firmware intervention whatsoever.
Motivation:
-----------
Software (driver managed) steering allows for high rule insertion rates
compared to the FW steering described above, this is achieved by using
internal RDMA writes to the device owned memory instead of the slow
command interface to program steering rules.
Software (driver managed) steering, doesn't depend on new FW
for new steering functionality, new implementations can be done in the
driver skipping the FW layer.
Performance:
------------
The insertion rate on a single core using the new approach allows
programming ~300K rules per sec. (Done via direct raw test to the new mlx5
sw steering layer, without any kernel layer involved).
Test: TC L2 rules
33K/s with Software steering (this patchset).
5K/s with FW and current driver.
This will improve OVS based solution performance.
Architecture and implementation details:
----------------------------------------
Software steering will be dynamically selected via devlink device
parameter. Example:
$ devlink dev param show pci/0000:06:00.0 name flow_steering_mode
pci/0000:06:00.0:
name flow_steering_mode type driver-specific
values:
cmode runtime value smfs
mlx5 software steering module a.k.a (DR - Direct Rule) is implemented
and contained in mlx5/core/steering directory and controlled by
MLX5_SW_STEERING kconfig flag.
mlx5 core steering layer (fs_core) already provides a shim layer for
implementing different steering mechanisms, software steering will
leverage that as seen at the end of this series.
When Software Steering for a specific steering domain
(NIC/RDMA/Vport/ESwitch, etc ..) is supported, it will cause rules
targeting this domain to be created using SW steering instead of FW.
The implementation includes:
Domain - The steering domain is the object that all other object resides
in. It holds the memory allocator, send engine, locks and other shared
data needed by lower objects such as table, matcher, rule, action.
Each domain can contain multiple tables. Domain is equivalent to
namespaces e.g (NIC/RDMA/Vport/ESwitch, etc ..) as implemented
currently in mlx5_core fs_core (flow steering core).
Table - Table objects are used for holding multiple matchers, each table
has a level used to prevent processing loops. Packets are being
directed to this table once it is set as the root table, this is done
by fs_core using a FW command. A packet is being processed inside the
table matcher by matcher until a successful hit, otherwise the packet
will perform the default action.
Matcher - Matchers objects are used to specify the fields mask for
matching when processing a packet. A matcher belongs to a table, each
matcher can hold multiple rules, each rule with different matching
values corresponding to the matcher mask. Each matcher has a priority
used for rule processing order inside the table.
Action - Action objects are created to specify different steering actions
such as count, reformat (encapsulate, decapsulate, ...), modify
header, forward to table and many other actions. When creating a rule
a sequence of actions can be provided to be executed on a successful
match.
Rule - Rule objects are used to specify a specific match on packets as
well as the actions that should be executed. A rule belongs to a
matcher.
STE - This layer is used to hold the specific STE format for the device
and to convert the requested rule to STEs. Each rule is constructed of
an STE chain, Multiple rules construct a steering graph. Each node in
the graph is a hash table containing multiple STEs. The index of each
STE in the hash table is being calculated using a CRC32 hash function.
Memory pool - Used for managing and caching device owned memory for rule
insertion. The memory is being allocated using DM (device memory) API.
Communication with device - layer for standard RDMA operation using RC QP
to configure the device steering.
Command utility - This module holds all of the FW commands that are
required for SW steering to function.
Patch planning and files:
-------------------------
1) First patch, adds the support to Add flow steering actions to fs_cmd
shim layer.
2) Next 12 patch will add a file per each Software steering
functionality/module as described above. (See patches with title: DR, *)
3) Add CONFIG_MLX5_SW_STEERING for software steering support and enable
build with the new files
4) Next two patches will add the support for software steering in mlx5
steering shim layer
net/mlx5: Add API to set the namespace steering mode
net/mlx5: Add direct rule fs_cmd implementation
5) Last two patches will add the new devlink parameter to select mlx5
steering mode, will be valid only for switchdev mode for now.
Two modes are supported:
1. DMFS - Device managed flow steering
2. SMFS - Software/Driver managed flow steering.
In the DMFS mode, the HW steering entities are created through the
FW. In the SMFS mode this entities are created though the driver
directly.
The driver will use the devlink steering mode only if the steering
domain supports it, for now SMFS will manages only the switchdev
eswitch steering domain.
User command examples:
- Set SMFS flow steering mode::
$ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime
- Read device flow steering mode::
$ devlink dev param show pci/0000:06:00.0 name flow_steering_mode
pci/0000:06:00.0:
name flow_steering_mode type driver-specific
values:
cmode runtime value smfs
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds virtualization support description for DFL based
FPGA devices (based on PCIe SRIOV), and introductions to new
interfaces added by new dfl private feature drivers.
[mdf@kernel.org: Fixed up to make it work with new reStructuredText docs]
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
This patch adds support for global error reporting for FPGA
Management Engine (FME), it introduces sysfs interfaces to
report different error detected by the hardware, and allow
user to clear errors or inject error for testing purpose.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Ananda Ravuri <ananda.ravuri@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Error reporting is one important private feature, it reports error
detected on port and accelerated function unit (AFU). It introduces
several sysfs interfaces to allow userspace to check and clear
errors detected by hardware.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
This patch introduces userclock sysfs interfaces for AFU, user
could use these interfaces for clock setting to AFU.
Please note that, this is only working for port header feature
with revision 0, for later revisions, userclock setting is moved
to a separated private feature, so one revision sysfs interface
is exposed to userspace application for this purpose too.
Signed-off-by: Ananda Ravuri <ananda.ravuri@intel.com>
Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
These flags were added by commit 61754c1875 ("kbuild: Allow arch
Makefiles to override {cpp,ld,c}flags") to allow ARC to override -O2.
We did not see any other usage after all. Now that ARC switched to
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3, there is no more user of
these variables.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Revised pull request to fix up a missing Signed-off-by and roll in
a fix in the lsm9ds1 support after I broke it when applying.
Revised again because the fix changed a hash meaning a fix
that previously followed it now had the wrong fixes tag.
A few fixes in here that could have gone a faster path but aren't quite
worth the rush for 5.3.
New device support
* ad7606
- Support the ad7606b which adds a software controlled mode alongside
the pin controlled only approach of the ad7606. Including dt-bindings.
* lsm6dsx
- Add support for the gyro and accelerometer part of the lsm9ds1 which is
a compound device also including a magnetometer (st_sensors driver).
Includes bindings and precursor rework of the driver.
Features
* ad7192
- Add support for low pass filter control.
- DT binding docs.
Cleanups and minor fixes
* MAINTAINERS
- Fix a typo in a path.
- Add entry for ad7606
* ad5380
- Fix a failure to dereference a pointer before atempting to assign the
value.
* ad7192
- Drop platform data as not used in mainline and we now have full DT bindings.
* ad7606
- YAML conversion for dt-bindings.
* adis16240
- Rework write_raw to make it more readable using GENMASK.
* adis16460
- Fix and issue with an unsigned variable holding potential negatives.
* cros_ec
- Fix missing default of calibration vector so that we get 'something'
before calibration is complete on a given axis.
* hid-sensors
- Use int_pow instead of opencoding.
* isl29501
- rename dt-binding docs to include renesas inline with other renesas parts
and general current convention.
* kxcjk1013
- Improve comments on the 'unusual' ACPI ids used to identify which sensor
is which in certain laptops.
* lsm6dsx
- Add one bit to the fifo status masks for a number of parts.
- Drop a reserved entry from the sensitivity values to tidy up interface.
- Use core conversion macro from G to m/s^2 for lsm9ds1 to make it easier
to relate to the datasheet and consistent with other parts supported.
* max1027
- Use device managed APIs to avoid manual error handling and cleanup.
* rfd77402
- Typo in Kconfig help.
* sc27xx
- Switch to polling mode from interrupts as interrupt handling typically
to slow for very short sleeps.
* st-sensors
- Fix some missing selects for regmap.
* tools
- Add a .gitignore containing the binary outputs.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAl1uyTgRHGppYzIzQGtl
cm5lbC5vcmcACgkQVIU0mcT0Foideg//fknN/aM40zRZlClkWx9XqUsByS/3XUAl
dZL//5DGh566D8/auBeacQxt6SzOFRpj2XwWI/K8mGJi39y9LFOywOn4dDgOBh3x
VWe/1eCNFg9Y1eMCXncYHBtxxobuV3UKEjVtYFtzg210HP/KM6C3fWdPTpmj1zNZ
PYSnKGiBGxeJHMCUjN0QweifIRvTy0MLkxPc9CUHcFq0XiMD2enI4TwHYuZ/CNQw
oisDPPksbPTW5R547vLEnQe/p16MtoFMX57yehbzKIp6qYBEVR+D5ne5kxct8x80
Ma7YVWLyWTxYF/MwLi3felIniEeyYhgTFVhy2rhZGt6eKDmNFTwTrJG5iTweeHQm
3FJPbZ04lDjE3RhoETGDc2aSqY5/Xy1nnOJcMjZ1twbDxPGmN2/rCP3YxYRmGL/P
VCsCZYeQF6cKi7FyFiViqALTPH0k/Ebklol1f/IG8CuFCs8r/m6kKMeSJX3+miHZ
gIxA2lX5uj8FIiB1bZxORN76W5PzxLji5IiCPy1KtlBin3E3oWM3nQLXNHpzp2Fw
5A8IyHb/qDoKnO1MlTkprIxdIzKqV4gtWqkY1kTBYyNyreMP/dsiw/lC1rnzWMm/
v7JHuTbO/Ay5gvT58goK7FD77CyvRTvy3bmi7PNkWJyogWpnRTLiPusMDz7FwxK4
Ffrbi7+qijk=
=rPVR
-----END PGP SIGNATURE-----
Merge tag 'iio-for-5.4b-take3' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
Second set of new device support, cleanups and features for IIO in the 5.4 cycle
Revised pull request to fix up a missing Signed-off-by and roll in
a fix in the lsm9ds1 support after I broke it when applying.
Revised again because the fix changed a hash meaning a fix
that previously followed it now had the wrong fixes tag.
A few fixes in here that could have gone a faster path but aren't quite
worth the rush for 5.3.
New device support
* ad7606
- Support the ad7606b which adds a software controlled mode alongside
the pin controlled only approach of the ad7606. Including dt-bindings.
* lsm6dsx
- Add support for the gyro and accelerometer part of the lsm9ds1 which is
a compound device also including a magnetometer (st_sensors driver).
Includes bindings and precursor rework of the driver.
Features
* ad7192
- Add support for low pass filter control.
- DT binding docs.
Cleanups and minor fixes
* MAINTAINERS
- Fix a typo in a path.
- Add entry for ad7606
* ad5380
- Fix a failure to dereference a pointer before atempting to assign the
value.
* ad7192
- Drop platform data as not used in mainline and we now have full DT bindings.
* ad7606
- YAML conversion for dt-bindings.
* adis16240
- Rework write_raw to make it more readable using GENMASK.
* adis16460
- Fix and issue with an unsigned variable holding potential negatives.
* cros_ec
- Fix missing default of calibration vector so that we get 'something'
before calibration is complete on a given axis.
* hid-sensors
- Use int_pow instead of opencoding.
* isl29501
- rename dt-binding docs to include renesas inline with other renesas parts
and general current convention.
* kxcjk1013
- Improve comments on the 'unusual' ACPI ids used to identify which sensor
is which in certain laptops.
* lsm6dsx
- Add one bit to the fifo status masks for a number of parts.
- Drop a reserved entry from the sensitivity values to tidy up interface.
- Use core conversion macro from G to m/s^2 for lsm9ds1 to make it easier
to relate to the datasheet and consistent with other parts supported.
* max1027
- Use device managed APIs to avoid manual error handling and cleanup.
* rfd77402
- Typo in Kconfig help.
* sc27xx
- Switch to polling mode from interrupts as interrupt handling typically
to slow for very short sleeps.
* st-sensors
- Fix some missing selects for regmap.
* tools
- Add a .gitignore containing the binary outputs.
* tag 'iio-for-5.4b-take3' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (27 commits)
iio: imu: st_lsm6dsx: rely on IIO_G_TO_M_S_2 for gain definition for LSM9DS1
iio: imu: st_lsm6dsx: remove invalid gain value for LSM9DS1
iio: cros_ec: set calibscale for 3d MEMS to unit vector
iio: dac: ad5380: fix incorrect assignment to val
iio: imu: st_lsm6dsx: Fix FIFO diff mask for tagged fifo
dt-bindings: iio: imu: st_lsm6dsx: add lsm9ds1 device bindings
iio: imu: st_lsm6dsx: add support for accel/gyro unit of lsm9ds1
iio: imu: st_lsm6dsx: move register definitions to sensor_settings struct
iio: imu: st_lsm6dsx: introduce update_fifo function pointer
dt-bindings: iio: light: isl29501: Rename bindings documentation file
Kconfig: Fix the reference to the RFD77402 ToF sensor in the 'help' section
iio: st_sensors: Fix build error
dt-bindings: iio: adc: Add AD7606B ADC documentation
dt-bindings: iio: adc: Migrate AD7606 documentation to yaml
MAINTAINERS: Add Beniamin Bia for AD7606 driver
iio: adc: ad7606: Add support for AD7606B ADC
tools: iio: add .gitignore
iio: adc: sc27xx: Change to polling mode to read data
iio: hid-sensor-attributes: Convert to use int_pow()
iio: adc: max1027: Use device-managed APIs
...
Highlights
- clk-measure: support new S905X3 and A311D SoCs
- socinfo: support new S905X3 and A311D SoCs
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl1cbXEACgkQWTcYmtP7
xmU5iQ//btRUq8o4I2hnmoKMCpsfv9tWA8/CnepjH0/uXL8Dd8um7bBkB1BByog8
GSaLAxiL7C6WdUo9a206HP/FC7Rp9GpdBYSaGglbE4xng4LZpzhjQyuNhoozByFK
ak94py6kzt6V4/XC+DTFhDirIz9D0WAhsyS8iXdc9BVynLd290OXUNxWTM7kJpnh
NB3JuSEQB9JnXSBlNZ2cdoTFm2m/pujda17o4ycc4ZGFruNvXPHmcm9TvYns9id0
aS9oA3QXq7+dWS7Hpr0uwoxqE9KZGVKN8VEwKdKc4PNlv+1z6/3W3CzbxLhpQU+q
KK4bBBL99ZYaDb+lnxcuag+7yi8uRXG0aWZ2FkEoq+mKnOETodT8l/qVqf+3VHwF
zLj6QqVEQMPmBZnW0NXIHVXCdmwKIhZA49K0Nu835X99rWdqWWlgGIh8PPDehRfS
FC+Cd6IXK3VFKbssj9x59qGKle+jo2/mKe/roSnJlOp97JVUn/WXEBtRMcGs7DZf
SpXxFAtGKi5qS2VVV7Dn+O/3B4PFwOs3JCEJiE4r0V0dwDEN8e2bzRf1tS1pRDqi
SkUyNJ9gAnG2uFtTgost1ipGkfgqq4DLqA5GGiP/njxhPW83MuWp+KUuVorhVJTg
y2g4tQVe9BEJTMadkgLNhhBRwz7XWhchxWJbxiKdpuIA3SdHPVk=
=txyO
-----END PGP SIGNATURE-----
Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers
soc: amlogic: driver updates for v5.4
Highlights
- clk-measure: support new S905X3 and A311D SoCs
- socinfo: support new S905X3 and A311D SoCs
* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
soc: amlogic: meson-gx-socinfo: Add of_node_put() before return
soc: amlogic: clk-measure: Add support for SM1
dt-bindings: soc: amlogic: clk-measure: Add SM1 compatible
soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs
soc: amlogic: meson-gx-socinfo: add A311D id
soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk
soc: amlogic: meson-clk-measure: protect measure with a mutex
Link: https://lore.kernel.org/r/7h7e77cwv5.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add new parameter (flow_steering_mode) to control the flow steering
mode of the driver.
Two modes are supported:
1. DMFS - Device managed flow steering
2. SMFS - Software/Driver managed flow steering.
In the DMFS mode, the HW steering entities are created through the
FW. In the SMFS mode this entities are created though the driver
directly.
The driver will use the devlink steering mode only if the steering
domain supports it, for now SMFS will manages only the switchdev eswitch
steering domain.
User command examples:
- Set SMFS flow steering mode::
$ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime
- Read device flow steering mode::
$ devlink dev param show pci/0000:06:00.0 name flow_steering_mode
pci/0000:06:00.0:
name flow_steering_mode type driver-specific
values:
cmode runtime value smfs
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
*) Add a new PHY driver for Lantiq VRX200/ARX300 PCIe PHY
*) Add missing of_node_put() to a bunch of drivers using
for_each_available_child_of_node()
*) Add RXAUI/PCIe/SATA/USB3 support in Marvell's Armada
CP110 COMPHY
*) Other misc fixes and cleanup
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEEUXMr/TfP2p4suIY5Dlx4XIBNgtkFAl1lQAIOHGtpc2hvbkB0
aS5jb20ACgkQDlx4XIBNgtmG9w//Te50DQemUjryStFT9dcKx0GE0+fC4tStkdsD
nkn1+PaYrHHrB9DU5fjYZNrI1QPGxMXX3bP1B3+rjCp8yBOEoM/UcdlZPGch93NU
pa4i+it63bT4WJ/b9OGlWqJHZCwsg+uq/XkpLGW/RJiHfJMv+bNdL32q+NK3aLUB
RC3/jhdHbZmXLWgcb4c12PuO4U29mZtHviK9EKTYUbc6ilfAXfFlR/+HwOX8a8Kf
wlg++9/tqE8LBD3LNLUiOYOGfl2HFEhmuS4J+b71Yujx3Jh+ME6idqJepCMiQEnv
nbzMxw8TrYapqB/+4a4Asb9gxY95hTtlsAlNy0qxGS+7LBrj1epFTqmdFNfhv2n7
SMXpQOc3++yN1ultXmJmt4G1pyP2hi1M1d2l++rJ4c3bNZ229gkXpvTgdw0zBMum
JA9fK1+sHrJDjcvvOQ+5WcrQ7e9XyB/98mH2jBIEsybWTz7AQrmlqnKy2CEenUIj
hGQRIM+Z22UBIW9OsJGj2c3xvI0Rz7EnvyJmEjCDBoVjrG+e/omOi7YXvF0cL72S
jdMNTs3rErRnFldq9safwNLrIHiTeel70Lytsl44go9n6f5EO/xT+voOX6Wl3LGB
hjnBb+3P1X/cJb6+rHclx+Fo7ZKlv69oxUv1NBDLqbn3l66QdKfRTnQVAdBSxJ0H
gNkt8ew=
=FzqB
-----END PGP SIGNATURE-----
Merge tag 'phy-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into char-misc-next
Kishon writes:
phy: for 5.4
*) Add a new PHY driver for Lantiq VRX200/ARX300 PCIe PHY
*) Add missing of_node_put() to a bunch of drivers using
for_each_available_child_of_node()
*) Add RXAUI/PCIe/SATA/USB3 support in Marvell's Armada
CP110 COMPHY
*) Other misc fixes and cleanup
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* tag 'phy-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (30 commits)
phy: marvell: phy-mvebu-cp110-comphy: rename instances of DLT
phy: marvell: phy-mvebu-cp110-comphy: implement RXAUI support
dt-bindings: pci: add PHY properties to Armada 7K/8K controller bindings
dt-bindings: phy: Add Marvell COMPHY clocks
phy: mvebu-cp110-comphy: Update comment about powering off all lanes at boot
phy: mvebu-cp110-comphy: Add PCIe support
phy: mvebu-cp110-comphy: Cosmetic change in a helper
phy: mvebu-cp110-comphy: Add SATA support
phy: mvebu-cp110-comphy: Add USB3 host/device support
phy: mvebu-cp110-comphy: Allow non-Ethernet modes to be configured
phy: mvebu-cp110-comphy: Rename the macro handling only Ethernet modes
phy: mvebu-cp110-comphy: Add RXAUI support
phy: mvebu-cp110-comphy: List already supported Ethernet modes
phy: mvebu-cp110-comphy: Add SMC call support
phy: mvebu-cp110-comphy: Explicitly initialize the lane submode
phy: mvebu-cp110-comphy: Add clocks support
phy-rockchip-inno-hdmi: Fix RK3328_TERM_RESISTOR_CALIB_SPEED_7_0's third value
phy: qcom-qmp: Correct ready status, again
phy: qualcomm: phy-qcom-qmp: Add of_node_put() before return
phy: renesas: rcar-gen3-usb2: Disable clearing VBUS in over-current
...
Here are the interconnect driver updates for the 5.4-rc1 merge window.
- New feature is the path tagging support that helps with grouping and
aggregating the bandwidth requests into separate buckets based on a tag.
- The first user of the path tagging is the Qualcomm sdm845 driver that
now implements support for wake/sleep sets. This allows consumer drivers
to express their bandwidth needs for the different CPU power states.
- New interconnect driver for the qcs404 platforms and a driver that
communicates bandwidth requests with remote processor over shared memory.
- Cleanups and fixes.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJdX/5XAAoJEIDQzArG2BZjK88QAKqqfxwnvGwRGxRuDM2k2nnw
B41wgEkrOg0ArIDIBEyiI/QVV8u7kch6d8oJQpy27xTmXNKH4hTUVA6GUlzVLd5e
Kdr9COUNjXrxUZ834cEonE3bJYosudgLH3qWOJ2nM3nEHipeJcFB1Z/+QmVwZPs4
P7RM6T04VqMlXxq1TIeqQs7T+nt6m+Bo+gJ/EfTUtK7EtP9np5cY1ufSnSJahJLX
IfFJsya8e22xaQKV6Z3tR4LhR8u7q32mgaj2EVC1qL3H33M73UBcov/bGGpTrlqC
dpElzdexML0iFxL/YxLkYmMoqx6fxCA2+in0Jy9/OBs7S82qWmejdRerEvHKvnWY
J5g7NwL6sBvCn0To3W6FGXfvlC+4cFsT+GMQWD9q5EakkH1bzFBmn/k2QdAynOYn
9bjVw1i9Y+AsdK9eBxj+4DUZCGBPgSEwKpPdwYsPg2dt6Cwdk6AURLdWTZGI/UtD
YzKe0n/ilrwHCF/lTaSuQpMaZTbbjw0mgKVbD0G4GVtT6JhF/AOhvmE0vD7SBs6h
sqnjwfFOnzjOjYhbHLPXD8FhR33siyzrB7pAioMhsDxGkprdJD9QTKjNT0Hv+0MW
GPNOxvRtlzDiGhFfvQQ+gbyJ+t3NXbQzS5XzMhu+39c6iRclr7Tp5R7nwN5tNc3D
XSrY2BkLuspsnV2iCO76
=TVC/
-----END PGP SIGNATURE-----
Merge tag 'icc-5.4-rc1' of https://git.linaro.org/people/georgi.djakov/linux into char-misc-next
Georgi writes:
interconnect patches for 5.4
Here are the interconnect driver updates for the 5.4-rc1 merge window.
- New feature is the path tagging support that helps with grouping and
aggregating the bandwidth requests into separate buckets based on a tag.
- The first user of the path tagging is the Qualcomm sdm845 driver that
now implements support for wake/sleep sets. This allows consumer drivers
to express their bandwidth needs for the different CPU power states.
- New interconnect driver for the qcs404 platforms and a driver that
communicates bandwidth requests with remote processor over shared memory.
- Cleanups and fixes.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
* tag 'icc-5.4-rc1' of https://git.linaro.org/people/georgi.djakov/linux:
drivers: qcom: Add BCM vote macro to header
interconnect: qcom: remove COMPILE_TEST from CONFIG_INTERCONNECT_QCOM_QCS404
interconnect: qcom: Add QCS404 interconnect provider driver
interconnect: qcom: Add interconnect RPM over SMD driver
dt-bindings: interconnect: Add Qualcomm QCS404 DT bindings
interconnect: qcom: Add tagging and wake/sleep support for sdm845
interconnect: Add pre_aggregate() callback
interconnect: Add support for path tags
The ipsps1 is an Inspur Power System power supply unit
Signed-off-by: John Wang <wangzqbj@inspur.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Add the driver to monitor Inspur Power System power supplies
with hwmon over pmbus.
This driver adds sysfs attributes for additional power supply data,
including vendor, model, part_number, serial number,
firmware revision, hardware revision, and psu mode(active/standby).
Signed-off-by: John Wang <wangzqbj@inspur.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20190819091509.29276-1-wangzqbj@inspur.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
A driver for ADS1015 with more functionality is available in the iio
subsystem.
Remove the hwmon driver as duplicate. If the chip is used for hardware
monitoring, the iio->hwmon bridge should be used.
Cc: Dirk Eibach <eibach@gdsys.de>
Link: https://lore.kernel.org/r/1562004758-13025-1-git-send-email-linux@roeck-us.net
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Detailed description for this pull request:
1. Clean up the and fix the minor issue of extcon provider driver
- extcon-arizona/max77843 replace the helper function
with more correct helper function without operation changes.
- extcon-fsa9480 supports the FSA880 variant by adding the compatible name.
- extcon-arizona updates the dt-binding file for the readability.
- extcon-gpio initializes the interrupt flags according to active-low state.
- Clean up extcon-sm5502/axp288/adc-jack
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJdY0eTAAoJEJzN3yze689TFcMQAKh3876lhzg6r49exvBS7XQb
16YQRKqyWqlR44EbBBy2OrOUVeZjng8o2ZJhAOzFo01RFUx2242ds45Ithn8oZ5H
UDgNh3OW/INT6Ey+QKt7uu3yjzEuOekab79SdOgazpUUH39Jbjsb20NRKvWR/zRv
7SNROcgyEK0En5z3ts0HJf+6ySiKxzejXrohHprmh2VPCduLGxWlb2PccwCxufFy
tHbGkSuwgqidL+yjR9s+CaV9M7aKqZzUYcBsNlG6CBau/RKI35nyAryakfav6q1x
ZRznS559fCJCgUi+W2mx8tcfQ5j3Gkp33CgVSXahkughtBxDmzfPFHV7J3CV3mU8
zGeRL9zQUWjEEv6F42NsRM8MmW9+tQtrKn/emPtsbsSxAuDG5S5flFlipUErOdRd
FMDm8VaSmWHhxKUS1rcbSazG6kXFZ+d/3TFn3fSQERx+Q/i+EDeRG+Wa4lHJtgt4
SHCma0IrPtmKl7raN+XkuvsIzOMfB05nMmlq5YO7QKUAUZZtj2lNzpKhL6t6aNTX
4xcvBUtH/pvZTXSZanTTqaQG+XVLvi3hsT5ECKFOyKNCmrgaxbcWhnh0fnax2h6K
SXPLK19vLj8ofaBDanlWPdw3QCqGGtne9qo4bQyTbjdTL1FZfg+yiqNEQp0NeSgP
qbA3oV1chw/l7sAME9Ht
=4VMi
-----END PGP SIGNATURE-----
Merge tag 'extcon-next-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next
Chanwoo writes:
Update extcon for 5.4
Detailed description for this pull request:
1. Clean up the and fix the minor issue of extcon provider driver
- extcon-arizona/max77843 replace the helper function
with more correct helper function without operation changes.
- extcon-fsa9480 supports the FSA880 variant by adding the compatible name.
- extcon-arizona updates the dt-binding file for the readability.
- extcon-gpio initializes the interrupt flags according to active-low state.
- Clean up extcon-sm5502/axp288/adc-jack
* tag 'extcon-next-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon:
extcon: adc-jack: Remove dev_err() usage after platform_get_irq()
extcon: axp288: Use for_each_set_bit() in axp288_extcon_log_rsi()
extcon: axp288: Add missed error check
extcon: sm5502: Add IRQ_ONESHOT
extcon: gpio: Request reasonable interrupts
extcon: arizona: Update binding example to use available defines
extcon: fsa9480: Support the FSA880 variant
extcon: extcon-max77843: convert to i2c_new_dummy_device
extcon: arizona: Switch to use device_property_count_u32()
Note the binding is st,lsm9ds1-imu. This device is effectively
two separate devices in the same package. (separate addreses,
chip selects etc) The magnetometer is already supported
as lsm9ds1-mag. imu may not be the best name but it's the best
that anyone has yet come up with for a gyro and accel part.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
- A series from Anson Huang to add i.MX8MN SoC and DDR4 EVK board
device tree support.
- Add DSP device tree support for i.MX8QXP SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJdYom7AAoJEFBXWFqHsHzOVG8H/RTfCTmRCBaClVZ031GWl/Q2
2NP+AY1l8UE0NKsvEuoMf/VY1atvFNgDvbm4gV1PW5KOBbgZmB3M32lHvXfqbLOu
vACCc8b7JY/8scWUgQBNbE5xAiZjPkLPuIYNJTLmrgVrYkYhtkB/4pwAk9YjVlYt
eHF3SWizKmam8vV3yp6KUNKvEYPBiMBfjSHDUvgT0GHUB4SHpPm/ERruTdKxP0Zm
c730yvV320XiKvxuErdvNfsw6FWs8Bhp8xCIhvF4Wbm0w4c5ucuqHKSV1v63lbbj
GVfdi0cH/eKlugNhfhIH7RsYL5TYjCDwzEyBSnqGCaBW+gnTpRnFkEricgvB+yY=
=3nO3
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-clkdep-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree update with new clocks:
- A series from Anson Huang to add i.MX8MN SoC and DDR4 EVK board
device tree support.
- Add DSP device tree support for i.MX8QXP SoC.
* tag 'imx-dt-clkdep-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8qxp: Add DSP DT node
arm64: dts: imx8mn: Add cpu-freq support
arm64: dts: imx8mn-ddr4-evk: Add rohm,bd71847 PMIC support
arm64: dts: imx8mn-ddr4-evk: Add i2c1 support
arm64: dts: freescale: Add i.MX8MN DDR4 EVK board support
arm64: dts: imx8mn: Add gpio-ranges property
arm64: dts: freescale: Add i.MX8MN dtsi support
clk: imx8: Add DSP related clocks
clk: imx: Add support for i.MX8MN clock driver
clk: imx: Add API for clk unregister when driver probe fail
clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage
dt-bindings: imx: Add clock binding doc for i.MX8MN
Link: https://lore.kernel.org/r/20190825153237.28829-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
