If for some reason a beacon with a new NoA is
not sent out, then reset the mgd_prepare_tx flag.
Not doing this will result in a situation where
a GO will send a new NoA when it shouldn't.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch makes sure that pending roc/scan
operations are cancelled properly when a new
context is assigned/unassigned.
The flush_work() call to flush out any scheduled
channel context work is removed, instead, sc->mutex
is dropped to allow any pending work to get a chance
to complete by the channel scheduler. Also, increase
the timeout to allow a switch to an active GO.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
When a pending roc or scan operation is cancelled,
the offchannel operation is cleared, but the offchannel
state in the main scheduler is not cleared. This causes
problems since an active GO will try to process a stale
offchannel request that was deferred earlier. Fix this
by clearing the state when there is no pending offchannel
(roc/scan) operation.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The registers that control the on-chip thermometer
need to be programmed based on the chainmask that
the solution supports, not the chainmask that is
present in the eeprom.
Cc: Miaoqing Pan <miaoqing@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Cc: Miaoqing Pan <miaoqing@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The base TSF is used for HW timers 0..7, but chips
in the AR9003 family and above can support more generic
timers. To use them, however, a second HW TSF needs to
be enabled. This patch allows usage of the extra
timers by starting the second TSF properly.
The extra set of HW timers is apparently also present
in AR9287, but we enable it only for the AR9003 family.
Cc: Kobi Cohen-Arazi <kobic@qti.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
On some x86 platforms, the LED gpio is active high
instead of active low. Identify such cards and modify
the GPIO usage to make sure LED works properly.
Cc: Russell Hu <rhu@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch updates the initvals for QCA953x v1.1 and v2.0
Signed-off-by: Miaoqing Pan <miaoqing@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* Duplicates have been marked.
* New initvals for 1.1 and 2.0 versions.
* xPA support.
* Fix for low power issue.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
In secured mesh, the unicast mgmt frame is encrypted using
the same key that used for encrypting the unicast data frame.
This patch "ath9k_htc_firmware: fix the offset of CCMP header
for mesh data frame" applied to open-ath9k-htc-firmware allows
the ath9k_htc to be loaded without "nohwcrypt=1". Unfortunately,
this is not working and we still need CCMP encryption of
transmitted management frames to be done in software.
So this patch allows the software encryption for transmitted
management frame to be done in software but remain the hardware
decryption for received management frame.
This patch is tested with the following hardwares:
- TP-Link TL-WN821N v3 802.11n [Atheros AR7010+AR9287]
- AR9271 802.11n
and managed to work with peer mesh STA equipped with ath9k.
Signed-off-by: Chun-Yeow Yeoh <yeohchunyeow@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Use the sw_mgmt_crypto_tx flag to trigger the CCMP encryption
for transmitted management frames to be done in software while
the sw_mgmt_crypto_rx flag is used to trigger the CCMP decryption
for received management frames to be done in software.
Signed-off-by: Chun-Yeow Yeoh <yeohchunyeow@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Auto TDLS support is enabled per device. As of now add this
feature only for SD8887.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds support for parsing TDLS discovery
frames. After parsing, we update peer RSSI information.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds auto TDLS support to mwifiex.
Auto TDLS functionality works as follows:
1. Whenever userspace application has triggered TDLS connection with
any peer, driver would store this peer mac address details in its database.
2. After this driver whenever driver receives packet on direct link,
it would store rssi and timestamp in peer information.
3. Whenever a packet is to be transmitted to non-AP peer in station mode,
driver would check if TDLS link can be established by looking at peer RSSI
information. Driver would initiate TDLS setup in such cases.
4. Periodic timer is used for updating peer information.
5. Auto TDLS peer list & timer are cleared during disconnection or driver unload.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds WMM support for TDLS link. Patch
add WMM info IE for TDLS setup request/response frames
while WMM parameter for TDLS confirm frame.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
When Teardown event from FW is indicated to userspace, userspace
would trigger tdls_oper handler to disable TDLS link.
We need not do this explicitly here.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
RX packet descriptor structure has recently changed in FW.
This patch updates rxpd accordingly.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
We need to assign the hw queues for mesh interface. Otherwise,
we are not able to bring up the mesh interface due to the
IEEE80211_INVAL_HW_QUEUE error.
Signed-off-by: Chun-Yeow Yeoh <yeohchunyeow@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
we can have here two variants. Add
ATH9K_CMN_DEBUGFS y if ATH9K_CMN_DEBUGFS || ATH9K_HTC_DEBUGFS
wich will add more configurations and testcases. Or remove ATH9K_HTC_DEBUGFS
which need more time to be done.
So, make common-spectral ignore ATH9K_DEBUGFS option for now.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/htc_drv_init.c:56:6: sparse: symbol 'ath9k_htc_op_ps_wakeup' was not declared. Should it be static?
drivers/net/wireless/ath/ath9k/htc_drv_init.c:61:6: sparse: symbol 'ath9k_htc_op_ps_restore' was not declared. Should it be static?
drivers/net/wireless/ath/ath9k/htc_drv_init.c:66:19: sparse: symbol 'ath9k_htc_ps_ops' was not declared. Should it be static?
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/init.c:91:6: sparse: symbol 'ath9k_op_ps_wakeup' was not declared. Should it be static?
drivers/net/wireless/ath/ath9k/init.c:96:6: sparse: symbol 'ath9k_op_ps_restore' was not declared. Should it be static?
drivers/net/wireless/ath/ath9k/init.c:101:19: sparse: symbol 'ath9k_ps_ops' was not declared. Should it be static?
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds module load parameter driver_mode for mwifiex
which would enable driver to create AP or P2P client interface while loading
module. driver_mode is bitmap of interface modes for station, AP and
P2P client.
Station interface is created by default and is unaffected by driver_mode
parameter.
Signed-off-by: Avinash Patil <patila@marvell.com>
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
When channel-context is not enabled, all vifs belong to
the first context, but it is not configured as 'assigned'.
Fix misc debugfs file to print out info for non-assigned
contexts, and also print whether ctx is assigned or not.
Signed-off-by: Ben Greear <greearb@candelatech.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Kalle Valo <kvalo@qca.qualcomm.com> says:
"One ath6kl patch and rest for ath10k, but nothing really major which
stands out. Most notable:
o fix resume (Bartosz)
o firmware restart is now faster and more reliable (Michal)
o it's now possible to test hardware restart functionality without
crashing the firmware using hw-restart parameter with
simulate_fw_crash debugfs file (Michal)"
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This patch adds runtime PM support to pl330 DMA engine driver.
The runtime power management for pl330 DMA driver allows gating of AMBA
clock (PDMA) in FSYS clock domain, when the device is not processing any
requests. This is necessary to enter low power modes on Exynos SoCs
(e.g. LPA on Exynos4x12 or W-AFTR on Exynos3250).
Runtime PM resuming of the device may happen in atomic context (during
call device_issue_pending()) so pm_runtime_irq_safe() is used. This will
lead only to disabling/enabling of the clock but this is sufficient for
gating the clock and for reducing energy usage.
Driver uses runtime PM callbacks from amba/bus.c driver only.
Suggested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The AMBA bus driver defines runtime Power Management functions which
disable and unprepare AMBA bus clock. This is problematic for runtime PM
because unpreparing a clock might sleep so it is not interrupt safe.
However some drivers may want to implement runtime PM functions in
interrupt-safe way (see pm_runtime_irq_safe()). In such case the AMBA
bus driver should only disable/enable the clock in runtime suspend and
resume callbacks.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add amba_pclk_prepare() and amba_pclk_unprepare() inline functions for
handling the AMBA bus clock by device drivers.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a simple getter pm_runtime_is_irq_safe() for querying whether runtime
PM IRQ safe was set or not.
Various bus drivers implementing runtime PM may use choose to suspend
differently based on IRQ safeness status of child driver (e.g. do not
unprepare the clock if IRQ safe is not set).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rafael J. Wysocki <rjw@rjwysocki.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When invalid cloning configurations were detected during modeset, we
never copied the error code into the return value variable, leading us
to return 0 (success) to userspace.
This regression has been introduced in
commit 50f5275698
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Fri Nov 7 13:11:00 2014 -0800
drm/i915: use compute_config in set_config v4
Testcase: igt/kms_setmode
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86226
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Return value of irq_of_parse_and_map() is unsigned int, with 0
indicating failure, so testing for negative result never works.
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Cc: stable@vger.kernel.org # v3.17
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Kill the submitted URB in brcmf_usb_dl_cmd if the request timed out. This
assures the URB is never submitted twice. It also prevents a possible
use-after-free of the URB transfer buffer if a timeout occurs.
Signed-off-by: Mathy Vanhoef <vanhoefm@gmail.com>
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
The commit that went into 3.17:
ath9k: Summarize hw state per channel context
Group and set hw state (opmode, primary_sta, beacon conf) per
channel context instead of whole list of vifs. This would allow
each channel context to run in different mode (STA/AP).
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
broke multi-vif configuration due to not properly calculating
the bssid mask.
The test case that caught this was:
create wlan0 and sta0-4 (6 total), not sure how much that matters.
associate all 6 (works fine)
disconnect 5 of them, leaving sta0 up
Start trying to bring up the other 5 one at a time. It will
fail, with iw events looking like this (in these logs, several
sta are trying to come up, but symptom is the same with just one)
The patch causing the regression made quite a few changes, but
the part I think caused this particular problem was not
recalculating the bssid mask when adding and removing interfaces.
Re-adding those calls fixes my test case. Fix bad comment
as well.
Signed-off-by: Ben Greear <greearb@candelatech.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Have each pxa variant (pxa25x, pxa27x, pxa3xx) have its own device-tree
clock initializing function, to be able to register its own specific
core clocks.
Apply that change specifically to pxa27x.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
As the clock descriptions are constant and only usefull at init time,
mark them as such by :
- spliting clock description (desc) and clock private data (dynamic)
- mark __initdata clock descriptions
This makes all the register and descriptions of the clocks to go after
kernel init phase.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Trivial fix to check the A bit of CCCR for memory frequency
calculations, where the shift of the bit index was missing, triggering a
wrong calculation of memory frequency.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Move pxa25x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
This is the preliminary step in the conversion. The remaining steps are
:
- pxa3xx
- once PXA is fully converted to device tree, if that happens,
clk-pxa2* and clk-pxa3* should only hold the core clocks which cannot
be described in devicetree.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Commit 79c6ab5095 (clk: divider: add CLK_DIVIDER_READ_ONLY flag) in
v3.16 introduced the CLK_DIVIDER_READ_ONLY flag which caused the
recalc_rate() and round_rate() clock callbacks to be omitted.
However using this flag has the unfortunate side effect of causing the
clock recalculation code when a clock rate change is attempted to always
treat it as a pass-through clock, i.e. with a fixed divide of 1, which
may not be the case. Child clock rates are then recalculated using the
wrong parent rate.
Therefore instead of dropping the recalc_rate() and round_rate()
callbacks, alter clk_divider_bestdiv() to always report the current
divider as the best divider so that it is never altered.
For me the read only clock was the system clock, which divided the PLL
rate by 2, from which both the UART and the SPI clocks were divided.
Initial setting of the UART rate set it correctly, but when the SPI
clock was set, the other child clocks were miscalculated. The UART clock
was recalculated using the PLL rate as the parent rate, resulting in a
UART new_rate of double what it should be, and a UART which spewed forth
garbage when the rate changes were propagated.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Max Schwarz <max.schwarz@online.de>
Cc: <stable@vger.kernel.org> # v3.16+
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Since commit 2fd36c5526 ("i2c: core: Map OF IRQ at probe time"),
i2c slaves without interrupts (e.g. da9210 and at24 on r8a7791/koelsch)
fail to probe:
at24: probe of 2-0050 failed with error -22
da9210: probe of 6-0068 failed with error -22
This happens because the call to of_irq_get() in i2c_device_probe()
returns -EINVAL.
If a device node does not have an "interrupts" property,
of_irq_parse_one() fails. Unlike irq_of_parse_and_map(), of_irq_get()
does not ignore errors from of_irq_parse_one(), but forwards them.
Make i2c_device_probe() ignore all errors but -EPROBE_DEFER to fix this,
just like platform_get_irq() and platform_get_irq_byname() already do.
Fixes: 2fd36c5526 ("i2c: core: Map OF IRQ at probe time")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add support for the IMG I2C Serial Control Bus (SCB) found on the
Pistachio and TZ1090 SoCs.
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
[Ezequiel: code cleaning and rebasing]
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The driver tried to access device registers with the (little-endian)
iowrite/ioread functions. While this worked on little-endian machines
(e.g. Microblaze with AXI bus), it made the driver unusable on
big-endian machines (e.g. PPC405 with PLB).
During the probe function, the driver tried to write a 32-bit reset mask
into the reset register. This caused an error interrupt on big-endian
systems, because the device detected an invalid (byte-swapped) reset
mask. The result was an Oops.
The patch implements an endianness detection similar to the one used in
other Xilinx drivers like drivers/spi/spi-xilinx.c. It was tested on a
PPC405/PLB system.
Signed-off-by: Thomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
I have a at24 EEPROM connected via i2c bus provided by ISCH i2c
bus driver. This bus driver does not support
I2C_FUNC_SMBUS_WRITE_I2C_BLOCK and so I was looking for a way
to be able to write the eeprom. This patch adds support for
I2C_SMBUS_BYTE_DATA writing via i2c_smbus_write_byte_data.
It is quite slow, but it works.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
[wsa: s/use_smbuse_write/use_smbus_write/]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
There is a duplication in a clock name for apq8084 platform that causes
the following warning: "RBCPR_CLK_SRC" redefined
Resolve this by adding a MMSS_ prefix to this clock and making its name
coherent with msm8974 platform.
Fixes: 2b46cd23a5 ("clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support")
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
First check for rate == 0 in set_rate and round_rate to avoid div by zero.
Then, in order to get the closest rate, round all divisions to the closest
result instead of rounding them down.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
at91rm9200_clk_usb_set_rate might fail depending on the requested rate,
because the parent_rate / rate remainder is not necessarily zero.
Moreover, when rounding down the calculated rate we might alter the
divisor calculation and end up with an invalid divisor.
To solve those problems, accept a non zero remainder, and always round
division to the closest result.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reported-by: Andreas Henriksson <andreas.henriksson@endian.se>
Tested-by: Andreas Henriksson <andreas.henriksson@endian.se>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
When building without CONFIG_PRINTK, we need to provide a stub
check_syslog_permissions. As there is no way to turn on the
dmesg_restrict sysctl without CONFIG_PRINTK, return success.
Reported-by: Jim Davis <jim.epost@gmail.com>
Signed-off-by: Sebastian Schmidt <yath@yath.de>
Acked-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Tony Luck <tony.luck@intel.com>
On SKL DPLL0 is used to derive CDCLK but can also be used to drive an
eDP port (as long as we don't want SSC). DPLL0 is special enough to not
be handled by the shared DPLL framework (drives CDCLK, not supposed to
enable the HDMI mode), So we need to compute the configuration
separately from the other DPLLs.
Note that we don't need to reprogram DPLL0 (which would mean bringing
down CDCLK) to support the various eDP 1.3 link rates as they all share
the same VCO (8100).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Let's document PSR a bit. No functional changes.
v2: Add actual DocBook entry and accept Daniel's improvements.
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
No functional changes. Just cleaning and reorganizing it.
v2: Rebase it puting it to begin of psr rework. This helps to blame easily
at least latest changes.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
