Commit graph

534127 commits

Author SHA1 Message Date
Emmanuel Grumbach
47dbab263d iwlwifi: pcie: simplify return value
This was spot by Coccinelle.

Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-05-28 13:35:13 +03:00
Emmanuel Grumbach
1899e11482 iwlwifi: bump API to 14
The iwlmvm driver is now able to handle -14.ucode.

Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-05-28 13:35:04 +03:00
John Fastabend
7aac842596 ixgbe: Allow flow director to use entire queue space
Flow director is exported to user space using the ethtool ntuple
support. However, currently it only supports steering traffic to a
subset of the queues in use by the hardware. This change allows
flow director to specify queues that have been assigned to virtual
functions by partitioning the ring_cookie into a 8bit VF specifier
followed by 32bit queue index. At the moment we don't have any
ethernet drivers with more than 2^32 queues on a single function
as best I can tell and nor do I expect this to happen anytime
soon. This way the ring_cookie's normal use for specifying a queue
on a specific PCI function continues to work as expected.

CC: Alex Duyck <alexander.h.duyck@redhat.com>
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Krishneil Singh <krishneil.k.singh@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-05-28 03:34:49 -07:00
Johannes Berg
7b501d10b1 iwlwifi: refactor common transport alloc/init code
The transport modules all need to allocate memory and set up
certain values. Refactor that code into a new common function
to share it and to simplify the error handling.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-05-28 13:32:34 +03:00
Luciano Coelho
a54cb6411b iwlwifi: mvm: small fix in a comment about UMAC scan schedules
The UMAC API supports multiple scan schedules, but now we use only a
single one.  Change the comment to make this clear and avoid
confusion.

Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>
Reviewed-by: David Spinadel <david.spinadel@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-05-28 13:32:34 +03:00
Nicholas Krause
b8c474d9c5 iwlwifi: Remove use of the deprecacted PTR_RET
This removes the use of the two deprecated calls to the
macro PTR_RET in iwl_mvm_get_regdomain and replaces them
both to PTR_ERR_OR_ZERO.

Signed-off-by: Nicholas Krause <xerofoify@gmail.com>
[Commit message editing]
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-05-28 13:32:33 +03:00
John Fastabend
8cf6f497de ethtool: Add helper routines to pass vf to rx_flow_spec
The ring_cookie is 64 bits wide which is much larger than can be used
for actual queue index values. So provide some helper routines to
pack a VF index into the cookie. This is useful to steer packets to
a VF ring without having to know the queue layout of the device.

CC: Alex Duyck <alexander.h.duyck@redhat.com>
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2015-05-28 03:31:12 -07:00
Liad Kaufman
f115fdfd61 iwlwifi: nvm: fix otp parsing in 8000 hw family
The radio cfg DWORD was taken from the wrong place in the
8000 HW family, after a line in the code was wrongly changed
by mistake. This broke several 8260 devices.

Fixes: 5dd9c68a85 ("iwlwifi: drop support for early versions of 8000")
Signed-off-by: Liad Kaufman <liad.kaufman@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-05-28 13:28:00 +03:00
Ilan Peer
fc8a350d0b iwlwifi: pcie: fix tracking of cmd_in_flight
The cmd_in_flight tracking was introduced to workaround faulty
power management hardware, by having the driver keep the NIC
awake as long as there are commands in flight. However, some of
the code handling this workaround was unconditionally executed,
which resulted with an inconsistent state where the driver assumed
that the NIC was awake although it wasn't.

Fix this by renaming 'cmd_in_flight' to 'cmd_hold_nic_awake' and
handling the NIC requested awake state only for hardwares for
which the workaround is needed.

Signed-off-by: Ilan Peer <ilan.peer@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-05-28 13:27:51 +03:00
Thomas Petazzoni
bfa1ce5f38 bus: mvebu-mbus: add mv_mbus_dram_info_nooverlap()
This commit introduces a variant of the mv_mbus_dram_info() function
called mv_mbus_dram_info_nooverlap(). Both functions are used by
Marvell drivers supporting devices doing DMA, and provide them a
description the DRAM ranges that they need to configure their DRAM
windows.

The ranges provided by the mv_mbus_dram_info() function may overlap
with the I/O windows if there is a lot (>= 4 GB) of RAM
installed. This is not a problem for most of the DMA masters, except
for the upcoming new CESA crypto driver because it does DMA to the
SRAM, which is mapped through an I/O window. For this unit, we need to
have DRAM ranges that do not overlap with the I/O windows.

A first implementation done in commit 1737cac693 ("bus: mvebu-mbus:
make sure SDRAM CS for DMA don't overlap the MBus bridge window"),
changed the information returned by mv_mbus_dram_info() to match this
requirement. However, it broke the requirement of the other DMA
masters than the DRAM ranges should have power of two sizes.

To solve this situation, this commit introduces a new
mv_mbus_dram_info_nooverlap() function, which returns the same
information as mv_mbus_dram_info(), but guaranteed to not overlap with
the I/O windows.

In the end, it gives us two variants of the mv_mbus_dram_info*()
functions:

 - The normal one, mv_mbus_dram_info(), which has been around for many
   years. This function returns the raw DRAM ranges, which are
   guaranteed to use power of two sizes, but will overlap with I/O
   windows. This function will therefore be used by all DMA masters
   (SATA, XOR, Ethernet, etc.) except the CESA crypto driver.

 - The new 'nooverlap' variant, mv_mbus_dram_info_nooverlap(). This
   function returns DRAM ranges after they have been "tweaked" to make
   sure they don't overlap with I/O windows. By doing this tweaking,
   we remove the power of two size guarantee. This variant will be
   used by the new CESA crypto driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-05-28 12:21:08 +02:00
Thomas Petazzoni
885dbd154b Revert "bus: mvebu-mbus: make sure SDRAM CS for DMA don't overlap the MBus bridge window"
This reverts commit 1737cac693 ("bus: mvebu-mbus: make sure SDRAM CS
for DMA don't overlap the MBus bridge window"), because it breaks DMA
on platforms having more than 2 GB of RAM.

This commit changed the information reported to DMA masters device
drivers through the mv_mbus_dram_info() function so that the returned
DRAM ranges do not overlap with I/O windows.

This was necessary as a preparation to support the new CESA Crypto
Engine driver, which will use DMA for cryptographic operations. But
since it does DMA with the SRAM which is mapped as an I/O window,
having DRAM ranges overlapping with I/O windows was problematic.

To solve this, the above mentioned commit changed the mvebu-mbus to
adjust the DRAM ranges so that they don't overlap with the I/O
windows. However, by doing this, we re-adjust the DRAM ranges in a way
that makes them have a size that is no longer a power of two. While
this is perfectly fine for the Crypto Engine, which supports DRAM
ranges with a granularity of 64 KB, it breaks basically all other DMA
masters, which expect power of two sizes for the DRAM ranges.

Due to this, if the installed system memory is 4 GB, in two
chip-selects of 2 GB, the second DRAM range will be reduced from 2 GB
to a little bit less than 2 GB to not overlap with the I/O windows, in
a way that results in a DRAM range that doesn't have a power of two
size. This means that whenever you do a DMA transfer with an address
located in the [ 2 GB ; 4 GB ] area, it will freeze the system. Any
serious DMA activity like simply running:

  for i in $(seq 1 64) ; do dd if=/dev/urandom of=file$i bs=1M count=16 ; done

in an ext3 partition mounted over a SATA drive will freeze the system.

Since the new CESA crypto driver that uses DMA has not been merged
yet, the easiest fix is to simply revert this commit. A follow-up
commit will introduce a different solution for the CESA crypto driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fixes: 1737cac693 ("bus: mvebu-mbus: make sure SDRAM CS for DMA don't overlap the MBus bridge window")
Cc: <stable@vger.kernel.org> # v4.0+
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-05-28 11:14:31 +02:00
Nicolas Schichan
8c9e06e647 bus: mvebu-mbus: do not set WIN_CTRL_SYNCBARRIER on non io-coherent platforms.
Commit a0b5cd4ac2 ("bus: mvebu-mbus: use automatic I/O
synchronization barriers") enabled the usage of automatic I/O
synchronization barriers by enabling bit WIN_CTRL_SYNCBARRIER in the
control registers of MBus windows, but on non io-coherent platforms
(orion5x, kirkwood and dove) the WIN_CTRL_SYNCBARRIER bit in
the window control register is either reserved (all windows except 6
and 7) or enables read-only protection (windows 6 and 7).

Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v4.0+
Fixes: a0b5cd4ac2 ("bus: mvebu-mbus: use automatic I/O synchronization barriers")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-05-28 11:14:19 +02:00
Paulo Zanoni
4373f0f24e drm/i915: disable IPS while getting the sink CRCs
This commit is the "sink CRC" version of:

commit 8c740dcea2
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Fri Oct 17 18:42:03 2014 -0300
    drm/i915: disable IPS while getting the pipe CRCs.

For some unknown reason, when IPS gets enabled, the sink CRC changes.
Since hsw_enable_ips() doesn't really guarantee to enable IPS (it
depends on package C-states), we can't really predict if IPS is
enabled or disabled while running our CRC tests, so let's just
completely disable IPS while sink CRCs are being used.

If we find a way to make IPS not change the pipe CRC result, we may
want to fix IPS and then revert this patch (and 8c740dcea too). While
this doesn't happen, let's merge this patch, so the IGT tests relying
on sink CRCs can work properly.

This was discovered while developing a new IGT test, which will
probably be called kms_frontbuffer_tracking.

Testcase: igt/kms_frontbuffer_tracking (not on upstream IGT yet)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:53 +02:00
Daniel Vetter
5e3daaca09 drm/i915: Disable 12bpc hdmi for now
It's totally broken, and since

commit d328c9d78d
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Apr 10 16:22:37 2015 +0200

    drm/i915: Select starting pipe bpp irrespective or the primary plane

the kernel will try to use it even for the common rgb888 framebuffers.
Ville has patches to fix it all up properly, but unfortunately they're
stuck in review limbo. And since the 4.2 feature cutoff has passed we
need to somehow  handle this regression.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-05-28 11:13:52 +02:00
Ville Syrjälä
54433e91a6 drm/i915: Adjust sideband locking a bit for CHV/VLV
chv_enable_pll() doesn't need to hold sb_lock for the entire duration of
the function. Drop the lock as soon as possible.

valleyview_set_cdclk() does a potential lock+unlock+lock+unlock cycle
with sb_lock. Grab the lock a few lines earlier so we can make do
with a single lock+unlock cycle always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:52 +02:00
Ville Syrjälä
a580516d9f drm/i915: s/dpio_lock/sb_lock/
Rename dpio_lock to sb_lock to inform the reader that its primary
purpose is to protect the sideband mailbox rather than some DPIO
state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:51 +02:00
Ville Syrjälä
b12ce1d84f drm/i915: Kill intel_flush_primary_plane()
The primary plane frobbing was removed from the sprite code in
 commit ecce87ea3a
 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
 Date:   Tue Apr 21 17:12:50 2015 +0300

    drm/i915: Remove implicitly disabling primary plane for now

but the intel_flush_primary_plane() calls were left behind. Replace them
with straight forward POSTING_READ() of the sprite surface address
register.

The other user of intel_flush_primary_plane() is g4x_disable_trickle_feed()
where we can just inline the steps directly.

This allows intel_flush_primary_plane() to be killed off.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:51 +02:00
Ville Syrjälä
fde61e4b80 drm/i915: Throw out WIP CHV power well definitions
Expecting CHV power wells to be just an extended versions of the VLV
power wells, a bunch of commented out power wells were added in
anticipation when Punit folks would implement it all. Turns out they
never did, and instead CHV has fewer power wells than VLV. Rip out all
the #if 0'ed junk that's not needed.

v2: Rename the "pipe-a" well to "display" to match VLV
    Clarify the pipe A power well relationship to pipes B and C (Deepak)

Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:50 +02:00
Ville Syrjälä
bc284542da drm/i915: Use the default 600ns LDO programming sequence delay
Not sure which LDO programming sequence delay should be used for the CHV
PHY, but the spec says that 600ns is "Used by default for initial
bringup", and the BIOS seems to use that, so let's do the same.

Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-05-28 11:13:50 +02:00
Imre Kaloz
2ff9ab4c7b ARM: mvebu: armada-xp-linksys-mamba: Disable internal RTC
The Mamba (like the OpenBlocks AX3) doesn't have a crystal
connected to the internal RTC - let's prevent the kernel from
probing it.

Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: <stable@vger.kernel.org> # v4.0 +
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-05-28 11:13:44 +02:00
Ingo Molnar
f1942b96b4 perf/core refactorings and improvements:
User visible:
 
 - Add hint for 'Too many events are opened.' error message (Jiri Olsa)
 
 Infrastructure:
 
 - Protect accesses to map rbtrees with a lock and refcount struct map,
   reducing memory usage as maps not used get freed. The 'dso' struct is
   next in line. (Arnaldo Carvalho de Melo)
 
 - Annotation and branch related option parsing refactorings to
   share code with upcoming patches (Andi Kleen)
 
 Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVZltKAAoJENZQFvNTUqpA/74P/iFNSUPeXdSgecQCDXTlulgz
 5rkTglaOlgJxlR19llYstCw+vCByJOFeUiNMJ67xve7+Stpvi8BpclbHoShKjT7O
 FxxBZZh2iOm+5NWz+2KyXBk/pMCXaqgR1cuhItXZELuSklFdZS+U1dZ7L8Zmiw+p
 r3KWOqzmvgiNjtJiS4nToYr8dW68D5CbjV0jQBW+Xg4FDI6eys+o0bSfZWWepKbw
 It27WJp0aosF+UA1cX6l9d8jmOzjFN1ZGSi6o5TGfDsXtG++jIiXNDluarr3BnSV
 HEyn/MzuqhsE0IEG2xARUOKzI/wZGo1NnSBLea9Qg6j42GJpPQpJ2zI/hfSWoFLH
 uDWuwOwTM6Bu0+s5Mg23MxuXyrPZbfwIXG8M7o6pancReejOk9d7gPGye1oBtP7j
 hhSTdvrt1Cwu4AUkT8on7tWbu8L3VGqxBG09zjJYbMG2YniF8wlwbYXUkLOsW+K1
 HPnx0s2Y7wDi2nqBc6MEzIM/LuY+py11xs4luNbKfzlT/F/2XahW7E/aoPbd4p6+
 7xiFsdTbMMreNj/45C4l4SZURttZticfjnxI8F9csNy2uswo6xEuHW08bl5mU5MB
 fUAefAiW1vJLwBY8uauAiJgUQm2cvnfClgPikyafYkAv8S9iuNpBn9xEem4BA7IE
 Dx3kk205uayTPSx5wGrr
 =pcWU
 -----END PGP SIGNATURE-----

Merge tag 'perf-core-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core

Pull perf/core refactorings and improvements from Arnaldo Carvalho de Melo:

User visible changes:

  - Add hint for 'Too many events are opened.' error message (Jiri Olsa)

Infrastructure changes:

  - Protect accesses to map rbtrees with a lock and refcount struct map,
    reducing memory usage as maps not used get freed. The 'dso' struct is
    next in line. (Arnaldo Carvalho de Melo)

  - Annotation and branch related option parsing refactorings to
    share code with upcoming patches (Andi Kleen)

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-05-28 11:09:22 +02:00
Jan Beulich
1e6277de3a x86/mm: Mark arch_ioremap_p{m,u}d_supported() __init
... as their only caller is.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/5566EE07020000780007E683@mail.emea.novell.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-05-28 11:08:38 +02:00
Rafał Miłecki
fc23e81eb8 brcmfmac: allow NVRAM values to contain spaces
Platform NVRAMs often contain values with spaces. Even if right now most
firmware-supported entries are simple values, we shouldn't reject these
with spaces. It was semi-confirmed by Broadcom in the early patch adding
support for platform NVRAMs.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-28 11:53:04 +03:00
Rafał Miłecki
279b4cb7bc brcmfmac: treat \0 as end of comment when parsing NVRAM
This fixes brcmfmac dealing with NVRAM coming from platform e.g. from a
flash MTD partition. In such cases entries are separated by \0 instead
of \n which caused ignoring whole content after the first "comment".
While platform NVRAM doesn't usually contain comments, we switch to
COMMENT state after e.g. finding an unexpected char in key name.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-28 11:51:20 +03:00
Rafał Miłecki
5d08408b6f brcmfmac: simplify check finding NVRAM v1 device path
With a simple use of snprintf and small buffer we can compare NVRAM
entry value with a full string. This way we avoid checking random chars
at magic offsets.
Tested on BCM43602 with NVRAM hacked to use v1 format.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-28 11:49:44 +03:00
Rafał Miłecki
ae8c2366d7 brcmfmac: simplify check stripping v2 NVRAM
Comparing NVRAM entry with a full filtering string is simpler than
comparing it with a short prefix and then checking random chars at magic
offsets. The cost of snprintf relatively low, we execute it just once.
Tested on BCM43602 with NVRAM hacked to use V2 format.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-28 11:49:07 +03:00
Andrew Morton
4141259b56 arch/x86/kvm/mmu.c: work around gcc-4.4.4 bug
arch/x86/kvm/mmu.c: In function 'kvm_mmu_pte_write':
arch/x86/kvm/mmu.c:4256: error: unknown field 'cr0_wp' specified in initializer
arch/x86/kvm/mmu.c:4257: error: unknown field 'cr4_pae' specified in initializer
arch/x86/kvm/mmu.c:4257: warning: excess elements in union initializer
...

gcc-4.4.4 (at least) has issues when using anonymous unions in
initializers.

Fixes: edc90b7dc4 ("KVM: MMU: fix SMAP virtualization")
Cc: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:38 +02:00
Paolo Bonzini
bc009e4330 KVM: remove unused argument from mark_page_dirty_in_slot
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:37 +02:00
Jan Kiszka
e453aa0f7e KVM: x86: Allow ARAT CPU feature
There is no reason to deny this feature to guests. We are emulating the
APIC timer, thus are exposing it without stops in power-saving states.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:37 +02:00
Radim Krčmář
c028dd6bb6 KVM: x86: preserve x2APIC LDR on INIT
Logical x2APIC stops working if we rewrite it with zeros.
The best references are SDM April 2015: 10.12.10.1 Logical Destination
Mode in x2APIC Mode

  [...], the LDR are initialized by hardware based on the value of
  x2APIC ID upon x2APIC state transitions.

and SDM April 2015: 10.12.10.2 Deriving Logical x2APIC ID from the Local
x2APIC ID

  The LDR initialization occurs whenever the x2APIC mode is enabled

Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:36 +02:00
Radim Krčmář
257b9a5faa KVM: x86: use correct APIC ID on x2APIC transition
SDM April 2015, 10.12.5 State Changes From xAPIC Mode to x2APIC Mode
• Any APIC ID value written to the memory-mapped local APIC ID register
  is not preserved.

Fix it by sourcing vcpu_id (= initial APIC ID) instead of memory-mapped
APIC ID.  Proper use of apic functions would result in two calls to
recalculate_apic_map(), so this patch makes a new helper.

Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:35 +02:00
Marcelo Tosatti
630994b3c7 KVM: x86: add module parameter to disable periodic kvmclock sync
The periodic kvmclock sync can be an undesired source of latencies.

When running cyclictest on a guest, a latency spike is visible.
With kvmclock periodic sync disabled, the spike is gone.

Guests should use ntp which means the propagations of ntp corrections
from the host clock are unnecessary.

v2:
-> Make parameter read-only (Radim)
-> Return early on kvmclock_sync_fn (Andrew)

Reported-and-tested-by: Luiz Capitulino <lcapitulino@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:35 +02:00
Paolo Bonzini
3ed1a47876 KVM: x86: pass struct kvm_mmu_page to account/unaccount_shadowed
Prepare for multiple address spaces this way, since a VCPU is not available
where unaccount_shadowed is called.  We will get to the right kvm_memslots
struct through the role field in struct kvm_mmu_page.

Reviewed-by: Takuya Yoshikawa <yoshikawa_takuya_b1@lab.ntt.co.jp>
Reviewed-by: Radim Krcmar <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:34 +02:00
Paolo Bonzini
e37afc6ee5 KVM: remove __gfn_to_pfn
Most of the function that wrap it can be rewritten without it, except
for gfn_to_pfn_prot.  Just inline it into gfn_to_pfn_prot, and rewrite
the other function on top of gfn_to_pfn_memslot*.

Reviewed-by: Radim Krcmar <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:34 +02:00
Paolo Bonzini
d9ef13c2b3 KVM: pass kvm_memory_slot to gfn_to_page_many_atomic
The memory slot is already available from gfn_to_memslot_dirty_bitmap.
Isn't it a shame to look it up again?  Plus, it makes gfn_to_page_many_atomic
agnostic of multiple VCPU address spaces.

Reviewed-by: Radim Krcmar <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:43:33 +02:00
Paul Mackerras
09a216ea5c perf: Remove myself from MAINTAINERS entry
I haven't been working on perf for a while, so remove my name
from the MAINTAINERS entry for it.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20150528061757.GB27903@iris.ozlabs.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-05-28 10:43:03 +02:00
Paolo Bonzini
f36f3f2846 KVM: add "new" argument to kvm_arch_commit_memory_region
This lets the function access the new memory slot without going through
kvm_memslots and id_to_memslot.  It will simplify the code when more
than one address space will be supported.

Unfortunately, the "const"ness of the new argument must be casted
away in two places.  Fixing KVM to accept const struct kvm_memory_slot
pointers would require modifications in pretty much all architectures,
and is left for later.

Reviewed-by: Radim Krcmar <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-05-28 10:42:58 +02:00
James C Boyd
323ddaa84f HID: hid-input: Fix coding style issue
This line is too long; split it up.

Signed-off-by: James C Boyd <jcboyd.dev@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2015-05-28 10:41:45 +02:00
James C Boyd
2c54c86a67 HID: hid-input: Simplify conditional expression
There are too many bangs in this conditional; therefore
remove them while still maintaining the same logic.

Signed-off-by: James C Boyd <jcboyd.dev@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2015-05-28 10:41:45 +02:00
James C Boyd
09a5c34e8d HID: hid-input: Add parentheses to quell gcc warning
GCC reports a -Wlogical-not-parentheses warning here; therefore
add parentheses to shut it up and to express our intent more.

Signed-off-by: James C Boyd <jcboyd.dev@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2015-05-28 10:41:44 +02:00
Jakub Kicinski
c869f77d6a add mt7601u driver
Add support for the simplest of MediaTek Wi-Fi devices - MT7601U.
It is a single stream bgn chip with no bells or whistles.
This driver is partially based on Felix's mt76 but IMHO it doesn't
make sense to merge the two right now because MT7601U is a design
somewhere between old Ralink devices and new Mediatek chips.  There
wouldn't be all that much code sharing with the devices mt76 supports.
Situation may obviously change when someone decides to extend m76 with
support for the more recent USB dongles.

The driver supports only station mode.  I'm hoping to add AP support
when time allows.

This driver sat on GitHub for quite a while and got some testing there:
http://github.com/kuba-moo/mt7601u

Signed-off-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-28 11:33:20 +03:00
Arend van Spriel
00e27eeb75 brcmfmac: fix invalid access to struct acpi_device fields
The fields of struct acpi_device are only known when CONFIG_ACPI is
defined. Fix this by using a helper function. This will resolve the
issue found in linux-next:

 ../brcmfmac/bcmsdh.c: In function 'brcmf_ops_sdio_probe':
 ../brcmfmac/bcmsdh.c:1139:7: error: dereferencing pointer to incomplete type
   adev->flags.power_manageable = 0;
       ^

Fixes: f0992ace68 ("brcmfmac: prohibit ACPI power management ...")
Cc: Fu, Zhonghui <zhonghui.fu@linux.intel.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-28 11:28:41 +03:00
Diego Viola
092373c2b8 scripts/kconfig/Makefile: Fix spelling of Qt
Signed-off-by: Diego Viola <diego.viola@gmail.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
2015-05-28 16:27:02 +08:00
Linus Walleij
8150885503 pinctrl: improve debugfs for strict controllers
If we know we are using a strict pin controller (one that cannot
mix device functions+group use and GPIO) we can be a bit more
specific in debugfs, just print either device-function-group
or GPIO consumer for the pin. Let's do that to be helpful.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-05-28 10:14:21 +02:00
David Henningsson
b40eda6408 ALSA: hda - Disable Headphone Mic boost for ALC662
When headphone mic boost is above zero, some 10 - 20 second delay
might occur before the headphone mic is operational.
Therefore disable the headphone mic boost control (recording gain is
sufficient even without it).

(Note: this patch is not about the headset mic, it's about the less
common mic-in only mode.)

BugLink: https://bugs.launchpad.net/bugs/1454235
Suggested-by: Kailang Yang <kailang@realtek.com>
Signed-off-by: David Henningsson <david.henningsson@canonical.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-05-28 10:06:29 +02:00
NeilBrown
56ccc1125b md: fix race when unfreezing sync_action
A recent change removed the need for locking around writing
to "sync_action" (and various other places), but introduced a
subtle race.
When e.g. setting 'reshape' on a 'frozen' array, the 'frozen'
flag is cleared before 'reshape' is set, so the md thread can
get in and start trying recovery - which isn't wanted.

So instead of clearing MD_RECOVERY_FROZEN for any command
except 'frozen', only clear it when each specific command
is parsed.  This allows the handling of 'reshape' to clear
the bit while a lock is held.

Also remove some places where we set MD_RECOVERY_NEEDED,
as it is always set on non-error exit of the function.


Signed-off-by: NeilBrown <neilb@suse.de>
Fixes: 6791875e2e ("md: make reconfig_mutex optional for writes to md sysfs files.")
2015-05-28 18:04:45 +10:00
Nathan Sullivan
4481b18b7c ARM: zynq: DT: Use the zynq binding with macb
Use the new zynq binding for macb ethernet, since it will disable half
duplex gigabit like the Zynq TRM says to do. Also allow the compatible
cadence gem binding that won't disable half duplex but works otherwise.

Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-28 08:47:28 +02:00
Michal Simek
f8266389c8 of: Add vendor prefix for Ceva
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-28 08:47:21 +02:00
Michal Simek
a6e86403d1 PCI: xilinx: Trivial fix in DT example
Good to have it properly describe for c&p cases.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
2015-05-28 08:45:45 +02:00
Peter Crosthwaite
0385d44640 devicetree: cadence_ttc: Document binding for timer width
Modern TTC implementations can extend the timer width to 32 bit. This
feature is not self identifying so the driver needs to be made aware
via device tree.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-28 08:45:24 +02:00