This commit adds a header providing definitions for handling
Status messages. Currently the header only focuses on handling
incoming Status messages.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit adds a header providing definitions for handling Alert
messages. Currently the header only focuses on handling incoming
alerts.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit adds definitions for PD Rev 3.0 messages, including
APDO PPS and extended message support for TCPM.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
After commit fc72d1d54d ("tuntap: XDP transmission"), we can
actually queueing XDP pointers in the pointer ring, so we should
examine the pointer type before freeing the pointer.
Fixes: fc72d1d54d ("tuntap: XDP transmission")
Reported-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
fallback tunnels (like tunl0, gre0, gretap0, erspan0, sit0,
ip6tnl0, ip6gre0) are automatically created when the corresponding
module is loaded.
These tunnels are also automatically created when a new network
namespace is created, at a great cost.
In many cases, netns are used for isolation purposes, and these
extra network devices are a waste of resources. We are using
thousands of netns per host, and hit the netns creation/delete
bottleneck a lot. (Many thanks to Kirill for recent work on this)
Add a new sysctl so that we can opt-out from this automatic creation.
Note that these tunnels are still created for the initial namespace,
to be the least intrusive for typical setups.
Tested:
lpk43:~# cat add_del_unshare.sh
for i in `seq 1 40`
do
(for j in `seq 1 100` ; do unshare -n /bin/true >/dev/null ; done) &
done
wait
lpk43:~# echo 0 >/proc/sys/net/core/fb_tunnels_only_for_init_net
lpk43:~# time ./add_del_unshare.sh
real 0m37.521s
user 0m0.886s
sys 7m7.084s
lpk43:~# echo 1 >/proc/sys/net/core/fb_tunnels_only_for_init_net
lpk43:~# time ./add_del_unshare.sh
real 0m4.761s
user 0m0.851s
sys 1m8.343s
lpk43:~#
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This new security level works so that it creates one PCIe tunnel to the
connected Thunderbolt dock, removing PCIe links downstream of the dock.
This leaves only the internal USB controller visible.
Display Port tunnels are created normally.
While there make sure security sysfs attribute returns "unknown" for any
future security level.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Preboot ACL is a mechanism that allows connecting Thunderbolt devices
boot time in more secure way than the legacy Thunderbolt boot support.
As with the legacy boot option, this also needs to be enabled from the
BIOS before booting is allowed. Difference to the legacy mode is that
the userspace software explicitly adds device UUIDs by sending a special
message to the ICM firmware. Only the devices listed in the boot ACL are
connected automatically during the boot. This works in both "user" and
"secure" security levels.
We implement this in Linux by exposing a new sysfs attribute (boot_acl)
below each Thunderbolt domain. The userspace software can then update
the full list as needed.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
This is needed by the new ICM interface to find xdomains by route string
instead of link and depth.
While there update existing tb_xdomain_find_* functions to use
tb_xdomain_get() instead of open-coding the same.
Signed-off-by: Radion Mirchevsky <radion.mirchevsky@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
It was suggested that a migration hint might be usefull for the
CPU-freq governors.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Juri Lelli <juri.lelli@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The primary observation is that nohz enter/exit is always from the
current CPU, therefore NOHZ_TICK_STOPPED does not in fact need to be
an atomic.
Secondary is that we appear to have 2 nearly identical hooks in the
nohz enter code, set_cpu_sd_state_idle() and
nohz_balance_enter_idle(). Fold the whole set_cpu_sd_state thing into
nohz_balance_{enter,exit}_idle.
Removes an atomic op from both enter and exit paths.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Instead of trying to duplicate scheduler state to track if an RT task
is running, directly use the scheduler runqueue state for it.
This vastly simplifies things and fixes a number of bugs related to
sugov and the scheduler getting out of sync wrt this state.
As a consequence we not also update the remove cfs/dl state when
iterating the shared mask.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Juri Lelli <juri.lelli@arm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
We use a two-step process to configure a filter with RSS spreading. First,
the RSS context is allocated and configured using ETHTOOL_SRSSH; this
returns an identifier (rss_context) which can then be passed to subsequent
invocations of ETHTOOL_SRXCLSRLINS to specify that the offset from the RSS
indirection table lookup should be added to the queue number (ring_cookie)
when delivering the packet. Drivers for devices which can only use the
indirection table entry directly (not add it to a base queue number)
should reject rule insertions combining RSS with a nonzero ring_cookie.
Signed-off-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch helps to avoid that new code gets introduced in block drivers
that manipulates queue flags without holding the queue lock when that
lock should be held.
Cc: Christoph Hellwig <hch@lst.de>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Since it is not safe to use queue_flag_(set|clear)_unlocked()
without holding the queue lock after the sysfs entries for a
queue have been created, complain if this happens.
Cc: Mike Snitzer <snitzer@redhat.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Introduce functions that modify the queue flags and that protect
these modifications with the request queue lock. Except for moving
one wake_up_all() call from inside to outside a critical section,
this patch does not change any functionality.
Cc: Christoph Hellwig <hch@lst.de>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Move the definition of queue_flag_clear_unlocked() up and move the
definition of queue_in_flight() down such that all queue flag
manipulation function definitions become contiguous.
This patch does not change any functionality.
Cc: Christoph Hellwig <hch@lst.de>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Ming Lei <ming.lei@redhat.com>
Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Bart Van Assche <bart.vanassche@wdc.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
This series follows our previous one to lay out the foundations for IPSec
in user-space and extend current kernel netdev IPSec support. As noted in
our previous pull request cover letter "mlx5-updates-2018-02-28-1 (IPSec-1)",
the IPSec mechanism will be supported through our flow steering mechanism.
Therefore, we need to change the initialization order. Furthermore, IPsec
is also supported in both egress and ingress. Since our current flow
steering is egress only, we add an empty (only implemented through FPGA
steering ops) egress namespace to handle that case. We also implement
the required flow steering callbacks and logic in our FPGA driver.
We extend the FPGA support for ESN and modifying a xfrm too. Therefore, we
add support for some new FPGA command interface that supports them. The
other required bits are added too. The new features and requirements are
advertised via cap bits.
Last but not least, we revise our driver's accel_esp API. This API will be
shared between our netdev and IB driver, so we need to have all the required
functionality from both worlds.
Regards,
Aviad and Matan
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJaoH8zAAoJEEg/ir3gV/o+h00H/RyM1xoGCzJtvQAYEhNcEfvY
YJfaJSPvuuvS2Fvs8meUzjqQvKcmkMjmViD3Ujuzyh6Y36IcoPWlBojRDE2fpz2b
yRaK5CotcLpfDXchlLnH5ZZbOgO374866viCVoM4i2ls19Ml730piDs8CDcA6+T7
3W4vvr977xl9bFqDMMbeldijZ3+H36Exnq6Xj+o2j6Sc1/om9Mvgw7XJhcpiBTW5
ZFfA7djz7TdSyBJDQsLteL/wLbLsLeqXmKCKX9BsqRo+rpoUWmskKFNC1Dj0bzX3
XbrdR8GoHVMS1PZAPJIbc1bubhqBznxrbh/g95PInSkGZzKKWw1dhS/3fkkAndM=
=Fodq
-----END PGP SIGNATURE-----
Merge tag 'mlx5-updates-2018-02-28-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux
Saeed Mahameed says:
====================
mlx5-updates-2018-02-28-2 (IPSec-2)
This series follows our previous one to lay out the foundations for IPSec
in user-space and extend current kernel netdev IPSec support. As noted in
our previous pull request cover letter "mlx5-updates-2018-02-28-1 (IPSec-1)",
the IPSec mechanism will be supported through our flow steering mechanism.
Therefore, we need to change the initialization order. Furthermore, IPsec
is also supported in both egress and ingress. Since our current flow
steering is egress only, we add an empty (only implemented through FPGA
steering ops) egress namespace to handle that case. We also implement
the required flow steering callbacks and logic in our FPGA driver.
We extend the FPGA support for ESN and modifying a xfrm too. Therefore, we
add support for some new FPGA command interface that supports them. The
other required bits are added too. The new features and requirements are
advertised via cap bits.
Last but not least, we revise our driver's accel_esp API. This API will be
shared between our netdev and IB driver, so we need to have all the required
functionality from both worlds.
Regards,
Aviad and Matan
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Tegra210 has a hw bug which can cause IP blocks to lock up when ungating a
domain. The reason is that the logic responsible for resetting the memory
built-in self test mode can come up in an undefined state because its
clock is gated by a second level clock gate (SLCG). Work around this by
making sure the logic will get some clock edges by ensuring the relevant
clock is enabled and temporarily override the relevant SLCGs.
Unfortunately for some IP blocks, the control bits for overriding the
SLCGs are not in CAR, but in the IP block itself. This means we need to
map a few extra register banks in the clock code.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Hector Martin <marcan@marcan.st>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
fixup mbist
We currently have to rely on the GCC large code model for KASLR for
two distinct but related reasons:
- if we enable full randomization, modules will be loaded very far away
from the core kernel, where they are out of range for ADRP instructions,
- even without full randomization, the fact that the 128 MB module region
is now no longer fully reserved for kernel modules means that there is
a very low likelihood that the normal bottom-up allocation of other
vmalloc regions may collide, and use up the range for other things.
Large model code is suboptimal, given that each symbol reference involves
a literal load that goes through the D-cache, reducing cache utilization.
But more importantly, literals are not instructions but part of .text
nonetheless, and hence mapped with executable permissions.
So let's get rid of our dependency on the large model for KASLR, by:
- reducing the full randomization range to 4 GB, thereby ensuring that
ADRP references between modules and the kernel are always in range,
- reduce the spillover range to 4 GB as well, so that we fallback to a
region that is still guaranteed to be in range
- move the randomization window of the core kernel to the middle of the
VMALLOC space
Note that KASAN always uses the module region outside of the vmalloc space,
so keep the kernel close to that if KASAN is enabled.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
When handling an OS descriptor request, one of the first operations is
to zero out the request buffer using the wLength from the setup packet.
There is no bounds checking, so a wLength > 4096 would clobber memory
adjacent to the request buffer. Fix this by taking the min of wLength
and the request buffer length prior to the memset. While at it, define
the buffer length in a header file so that magic numbers don't appear
throughout the code.
When returning data to the host, the data length should be the min of
the wLength and the valid data we have to return. Currently we are
returning wLength, thus requests for a wLength greater than the amount
of data in the OS descriptor buffer would return invalid (albeit zero'd)
data following the valid descriptor data. Fix this by counting the
number of bytes when constructing the data and using this when
determining the length of the request.
Signed-off-by: Chris Dickens <christopher.a.dickens@gmail.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Useful for changing few bits on a register, this makes sure for example
that the operation is done atomically in case of syscon.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Add missing documentation of structure members and
modify the order of documentation to match that of
the structure declaration.
Signed-off-by: Dov Levenglick <dov.levenglick@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add following USB speed related PHY modes:
LS (Low Speed), FS (Full Speed), HS (High Speed), SS (Super Speed)
Speed related information is required by some QCOM PHY drivers
to program PHY monitor resume/remote-wakeup events in suspended
state. Speed is needed in order to set correct polarity of wakeup
events for detection. E.g. QUSB2 PHY monitors DP/DM line state
depending on whether speed is LS or FS/HS to detect resume.
Similarly QMP USB3 PHY in SS mode should monitor RX terminations
attach/detach and LFPS events depending on SSPHY is active or not.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Since extcon property is not allowed in DT, extcon subsystem requires
another way to get extcon device. Lets try the simplest approach - get
edev by of_node.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Daniel Borkmann says:
====================
pull-request: bpf 2018-03-08
The following pull-request contains BPF updates for your *net* tree.
The main changes are:
1) Fix various BPF helpers which adjust the skb and its GSO information
with regards to SCTP GSO. The latter is a special case where gso_size
is of value GSO_BY_FRAGS, so mangling that will end up corrupting
the skb, thus bail out when seeing SCTP GSO packets, from Daniel(s).
2) Fix a compilation error in bpftool where BPF_FS_MAGIC is not defined
due to too old kernel headers in the system, from Jiri.
3) Increase the number of x64 JIT passes in order to allow larger images
to converge instead of punting them to interpreter or having them
rejected when the interpreter is not built into the kernel, from Daniel.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently ESN is not supported with IPSec device offload.
This patch adds ESN support to IPsec device offload.
Implementing new xfrm device operation to synchronize offloading device
ESN with xfrm received SN. New QP command to update SA state at the
following:
ESN 1 ESN 2 ESN 3
|-----------*-----------|-----------*-----------|-----------*
^ ^ ^ ^ ^ ^
^ - marks where QP command invoked to update the SA ESN state
machine.
| - marks the start of the ESN scope (0-2^32-1). At this point move SA
ESN overlap bit to zero and increment ESN.
* - marks the middle of the ESN scope (2^31). At this point move SA
ESN overlap bit to one.
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Yossef Efraim <yossefe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
In order to add a context to the FPGA, we need to get both the software
transform context (which includes the keys, etc) and the
source/destination IPs (which are included in the steering
rule). Therefore, we register new set of firmware like commands for
the FPGA. Each time a rule is added, the steering core infrastructure
calls the FPGA command layer. If the rule is intended for the FPGA,
it combines the IPs information with the software transformation
context and creates the respective hardware transform.
Afterwards, it calls the standard steering command layer.
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
The current code has one layer that executed FPGA commands and
the Ethernet part directly used this code. Since downstream patches
introduces support for IPSec in mlx5_ib, we need to provide some
abstractions. This patch refactors the accel code into one layer
that creates a software IPSec transformation and another one which
creates the actual hardware context.
The internal command implementation is now hidden in the FPGA
core layer. The code also adds the ability to share FPGA hardware
contexts. If two contexts are the same, only a reference count
is taken.
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This patch adds V2 command support.
New fpga devices support extended features (udp encap, esn etc...), this
features require new hardware sadb format therefore we have a new version
of commands to manipulate it.
Signed-off-by: Yossef Efraim <yossefe@mellanox.com>
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Current hardware decrypts and authenticates incoming ESP packets.
Subsequently, the software extracts the nexthdr field, truncates the
trailer and adjusts csum accordingly.
With this patch and a capable device, the trailer is being removed
by the hardware and the nexthdr field is conveyed via PET. This way
we avoid both the need to access the trailer (cache miss) and to
compute its relative checksum, which significantly improve
the performance.
Experiment shows that trailer removal improves the performance by
2Gbps, (netperf). Both forwarding and host-to-host configurations.
Signed-off-by: Yossi Kuperman <yossiku@mellanox.com>
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
The current code assume only SA QP commands.
Refactor in order to pave the way for new QP commands:
1. Generic cmd response format.
2. SA cmd checks are in dedicated functions.
3. Aligned debug prints.
Signed-off-by: Yossi Kuperman <yossiku@mellanox.com>
Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
These patches remove the metag architecture and tightly dependent
drivers from the kernel. With the 4.16 kernel the ancient gcc 4.2.4
based metag toolchain we have been using is hitting compiler bugs, so
now seems a good time to drop it altogether.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEd80NauSabkiESfLYbAtpk944dnoFAlqdcgQACgkQbAtpk944
dno/1BAAvaiRcKcNxMrYkxG+Wn4r68odu7+E1dy99AaUnvPFT42R5XLMOv4BCu/Y
bhMQ14lMJ9ZBKdYg9E97ulTV0YFhCBHuEWDyDnk/G3CVAEvdPuAQ6ktHDZxRQBFK
JoTUKky53OZbWU9KhLeWpFg4F4E64FBm1kyAkqhs8pPM/LwmrxwIG2sxdTTqkhkc
b+6ABf2NKtmQwHXWmKWCB8rmXMzulYth2ePC/r9MVj92xGKxADsiFArZk4kmoIUb
H5eZ8FkemtUEfZp600dsGR/ffaTBwZJ3SULSkAklUnrcvdIRM+Fu8osG8O8yQKTd
H7xnmtTJ2kCnhhuUMxt6v8WrDbKB8JdFxFOpXW93YKpKAkiGMvoUEZjlwPYIqWxL
xtnDb9Rv+uZ4RpqZf9AtE4Td8lHTH7OZ78RDs9eMo6n1ZIr5CwcLaM2k5skAeyPr
yt1lXePhXFqSS+OpOV6hn95ROqlkuZgvPfkcdNpCJPfM4SpfRLlUjIVqiVK0LDRk
FAkk0VIfzjjNuyV9yr2XXuw90DerhFUgUl6ZYggkgf6umOHhZQdDTFr8gsfvaLm1
1k1banUEF1tpDcUeShylDvqNmVSZZC6siTQMA7T0zjbjYJD25hJWLpFEcPkx/Anp
4oGQNNoe4WgJIrJAoTJTiBVwC/xLDeZV6b5t2pOXBlH+v2eKgMg=
=zDIl
-----END PGP SIGNATURE-----
Merge tag 'metag_remove_2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jhogan/metag into asm-generic
Remove metag architecture
These patches remove the metag architecture and tightly dependent
drivers from the kernel. With the 4.16 kernel the ancient gcc 4.2.4
based metag toolchain we have been using is hitting compiler bugs, so
now seems a good time to drop it altogether.
* tag 'metag_remove_2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jhogan/metag:
i2c: img-scb: Drop METAG dependency
media: img-ir: Drop METAG dependency
watchdog: imgpdc: Drop METAG dependency
MAINTAINERS/CREDITS: Drop METAG ARCHITECTURE
tty: Remove metag DA TTY and console driver
clocksource: Remove metag generic timer driver
irqchip: Remove metag irqchip drivers
Drop a bunch of metag references
docs: Remove remaining references to metag
docs: Remove metag docs
metag: Remove arch/metag/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Instead of using a stack VLA for the parity workspace, preallocate a
memory region. The preallocation is done to keep from needing to perform
allocations during crash dump writing, etc. This also fixes a missed
release of librs on free.
Signed-off-by: Kees Cook <keescook@chromium.org>
This series consists of some fixes and refactors for the mlx5 drivers,
especially around the FPGA and flow steering. Most of them are trivial
fixes and are the foundation of allowing IPSec acceleration from user-space.
We use flow steering abstraction in order to accelerate IPSec packets.
When a user creates a steering rule, [s]he states that we'll carry an
encrypt/decrypt flow action (using a specific configuration) for every
packet which conforms to a certain match. Since currently offloading these
packets is done via FPGA, we'll add another set of flow steering ops.
These ops will execute the required FPGA commands and then call the
standard steering ops.
In order to achieve this, we need that the commands will get all the
required information. Therefore, we pass the fte object and embed the
flow_action struct inside the fte. In addition, we add the shim layer
that will later be used for alternating between the standard and the
FPGA steering commands.
Some fixes, like " net/mlx5e: Wait for FPGA command responses with a timeout"
are very relevant for user-space applications, as these applications could
be killed, but we still want to wait for the FPGA and update the kernel's
database.
Regards,
Aviad and Matan
-----BEGIN PGP SIGNATURE-----
iQEcBAABAgAGBQJan4UmAAoJEEg/ir3gV/o+cZwH/1xBpdLsmeqEimwQ41bAc9Rj
UmPZXXMyQVUYfGOiE1aLTH7YNi38XWSnTFMN7HklMeX/9YKxUZNG8YuiO9iQhE1B
rUqRKfYFz9oFrUh95SzeclaunTpKrhYKHjQ9/u9nBMfI3H2Fy+y2NUBjIqJ6nysz
op3EwRcX5kD4+MjRum24XLUnMSYbg05mHCZKTDj5/2T4x+/j0XQqvvmWWinIt8BO
R4d7XGGywGjbhtcG1j+XBcFeLsEZnS/w70hoN38TdcmNWvokl1pGk8DVDii9i7GX
c5jQj2h5WG/bdsS26y8MFfWpoAn3Qzzm4W4OYwp/vmL7n/Llvq0GRCEKCi8AlA0=
=LeYV
-----END PGP SIGNATURE-----
Merge tag 'mlx5-updates-2018-02-28-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux
Saeed Mahameed says:
====================
mlx5-updates-2018-02-28-1 (IPSec-1)
This series consists of some fixes and refactors for the mlx5 drivers,
especially around the FPGA and flow steering. Most of them are trivial
fixes and are the foundation of allowing IPSec acceleration from user-space.
We use flow steering abstraction in order to accelerate IPSec packets.
When a user creates a steering rule, [s]he states that we'll carry an
encrypt/decrypt flow action (using a specific configuration) for every
packet which conforms to a certain match. Since currently offloading these
packets is done via FPGA, we'll add another set of flow steering ops.
These ops will execute the required FPGA commands and then call the
standard steering ops.
In order to achieve this, we need that the commands will get all the
required information. Therefore, we pass the fte object and embed the
flow_action struct inside the fte. In addition, we add the shim layer
that will later be used for alternating between the standard and the
FPGA steering commands.
Some fixes, like " net/mlx5e: Wait for FPGA command responses with a timeout"
are very relevant for user-space applications, as these applications could
be killed, but we still want to wait for the FPGA and update the kernel's
database.
Regards,
Aviad and Matan
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
the ipvlan device driver defines and uses 2 bits inside the priv_flags
net_device field. Such bits and the related helper are used only
inside the ipvlan device driver, and the core networking does not
need to be aware of them.
This change moves netif_is_ipvlan* helper in the ipvlan driver and
re-implement them looking for ipvlan specific symbols instead of
using priv_flags.
Overall this frees two bits inside priv_flags - and move the following
ones to avoid gaps - without any intended functional change.
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(FDT) into the overlay application code. To accomplish this,
of_overlay_apply() is replaced by of_overlay_fdt_apply().
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJam68pAAoJEKFvmrgMstOVJEkQAIkYv+041F1RE8pezo8FvO7k
GJnyiVVhiWEdddOfNofaR05im7QnrVLamKjmVgCZL/5ScF3pB0bkfxgbPn8oyjQ5
PCDriQOZ+6DFjCWNtib8K2ZW150QMMI5V4YLSooIKRoH/Opm4VEP1k94sKWmrELt
ja2WwI9+Wc6oiQe8n7okBgg6pKJ9dakeYlWdCAvDXPcgEdwrqgsQVj+gYRAqDuN7
MKQLF9uKNP5XrIksKFBprIDadXHVa7AmxYN9nTWQvK2b1NGssNcr3jxG0JSwxPUN
z+ov828nU/M68o1n6d6ADwRN2XFLWWFd1pZyMUErPWREIE8mqlvwux+Z8SpjLPd3
T4fMs8vtURf/GlH3ENiulKOs3/KHmvEDBcmAQc7jI/JQQeCvvom20iLd042oUaKP
3HKstI6nIPkKhEJ7MaCSzRjHN2HfXFAEcZGwSxYCsozOrWsf+lSkk4coK7777lJL
6avpU6CX4t/Kd2jIM1zddFS+hnWtnmS8eiUHqsj1ps6p8NzkAehwq6JRQ/oZo3sJ
lQvtmip53VQYO1DbsnbGHeYjfsqfnaTY635asB27gzux1baqxy0liY6I4TvqsEr6
VW9HUvbtlFFzRqP08tkpOPOPeaH7fsygiBzKtk9Ezpoz/A5KhtAXifFbAe4yHkaF
4Hm3vYwJ7xJ7OpjxGrD0
=f/Se
-----END PGP SIGNATURE-----
Merge tag 'overlay_apply_fdt_v7-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/frowand/linux into drm/next/du
- DT overlay applying rework (Frank Rowand)
Move duplicating and unflattening of an overlay flattened devicetree
(FDT) into the overlay application code. To accomplish this,
of_overlay_apply() is replaced by of_overlay_fdt_apply().
1. Add SPDX license identifiers.
2. Populate children syscon nodes in PMU driver to properly model HW in
DeviceTree.
-----BEGIN PGP SIGNATURE-----
iQItBAABCAAXBQJansqTEBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9f6kQ//
Wjkcsmj/mqaVaE6QphO0ZMXHXKZKQwY3jRkr8ofQWhAYNKuF9Jq/vLK8G9YDAAs7
yxK+R7wXXACq2p/a5w7FWdZhQ1F7WZFxF2/cdXjhLH9zEUlkcv05cSQaj7M3pCjQ
CU3ps6nvdtVIDwAgZT/4lSDQdIzZdkhhOdTK1iVR2PK8fLHNB88gPr+aSXLwkN18
SLULwONNTSfgNH4BniXqypGdvqo/yWFa3CChw80CBKV0I6ubYfvGhIg0hlVCoA+7
KibF8CCbHZiblExeDIQWTDNko4e6piNkLyHoQdTvTQ00f4fWxPmIIdzKn0q0JuPP
BK9VKEO4lX8vXXEH6RYGNnwxYb0C+Jz56ffuyRnSv9XiU2khjWOPx60u4Osx5hMX
UtMvpj/Ty8WKd7XWJcU/BdXH7j3gz9Q5lX/ZSRh2YEROzE+G2PMzMC7eNW3+NSGx
3lIuScPHWkYVeg1TCtwwg4Dy/lSKfNTVFbqfzKRUtKvQygLsCTVmUdtRM8BG6mYf
xybCwZOAUf6a9u5ZeItzINZT03R46vuGjKi6jZYwA3Loe/LDf5CLUeN/+yW2kIDY
h8WpwSel97h2d6j4fqHVLKK45PFjh37DisRIWN6J4gdPhS7Jd0bIkmxQIoP+bccn
DPWDJ65N7ubZuoUjuZcC4DuyZHOnJjXUqZbPJy2MzEQ=
=N7M0
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Pull "Samsung soc drivers changes for v4.17" from Krzysztof Kozłowski:
1. Add SPDX license identifiers.
2. Populate children syscon nodes in PMU driver to properly model HW in
DeviceTree.
* tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pmu: Populate children syscon nodes
soc: samsung: Add SPDX license identifiers to headers
memory: samsung: Add SPDX license identifiers
ARM System Control and Management Interface(SCMI)[1] is more flexible and
easily extensible than any of the existing interfaces.
Few existing as well as future ARM platforms provide micro-controllers
to abstract various power and other system management tasks which have
similar interfaces, both in terms of the functions that are provided by
them, and in terms of how requests are communicated to them.
There are quite a few protocols like ARM SCPI, TI SCI, QCOM RPM, Nvidia Tegra
BPMP, and so on already. This specification is to standardize and avoid any
further fragmentation in the design of such interface by various vendors.
The current SCMI driver implementation is very basic and initial support.
It lacks support for notifications, asynchronous/delayed response, perf/power
statistics region and sensor register region.
Mailbox is the only form of transport supported currently in the driver.
SCMI supports interrupt based mailbox communication, where, on completion
of the processing of a message, the caller receives an interrupt as well as
polling for completion.
SCMI is designed to minimize the dependency on the mailbox/transport
hardware. So in terms of SCMI, each channel in the mailbox includes
memory area, doorbell and completion interrupt.
However the doorbell and completion interrupt is highly mailbox dependent
which was bit of controversial as part of SCMI/mailbox discussions.
Arnd and me discussed about the few aspects of SCMI and the mailbox framework:
1. Use of mailbox framework for doorbell type mailbox controller:
- Such hardware may not require any data to be sent to signal the remote
about the presence of a message. The channel will have in-built
information on how to trigger the signal to the remote.
There are few mailbox controller drivers which are purely doorbell based.
e.g.QCOM IPC, STM, Tegra, ACPI PCC,..etc
2. Supporting other mailbox controller:
- SCMI just needs a mechanism to signal the remote firmware. Such
controller may need fixed message to be sent to trigger a doorbell.
In such case we may need to get that data from DT and pass the same
to the controller. It's not covered in the current DT binding, but
can be extended as optional property in future.
However handling notifications may be interesting on such mailbox, but
again there is no way to interpret what the data field(remote message)
means, it could be a bit mask or a number or don't-care.
Arnd mentioned that he doesn't like the way the mailbox binding deals
with doorbell-type hardware, but we do have quite a few precedent drivers
already and changing the binding to add a data field would not make it any
better, but could cause other problems. So he is happy with the status quo
of SCMI implementation.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0056a/index.html
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJalvXJAAoJEABBurwxfuKYUHoQANi5gm0vGgRhb8/Cc6BHF9ij
WVge3E2O+Ygg2qTKJJxWvwG3w09Pu9Pugwoa7vuisDNz4ihF+3WEYCZiwrbQhMOQ
8ZyxXwdBu4Kp0fnNAGGq0MWllwspVgdC2Be5jviDTMw7H8ZIQEiKjxPkdSFY1xFj
YAtTzuUeDcuztUb3IliOpLscxNUqGEQr4p/xj0VFu+1XSwtYo/9bDU7haiYNj0MD
zbNv9WhyjUHTTsdQjDW4YGywQpFPu/oI8oSR5q+Q3mudccaZYbvvTwKDRACLVkr4
rpeymFdGSEU8OI23pKql4eEZ2DC1VKuVnG9peTr9UhhuRL8jQKqFLeCYH0fGcY89
VGWDIFBjyUg1NK7giCriqCq4m68UM49ChITXY6zRrIvyONgUZj6p6kTmCHC3TULH
LWfu9lf7XqI5/AqZaXhHsDPL2Arf0u5K7rP6yaU0BgdQ2HRKV8rIT3KadjsOioAw
bIDfpi4eInmq41CUy1gsWP6nIRg4qR4sZiWC2CW8ap0gbHq8a7PVuuRi4VDCZIkN
CfntuDAnE+FMq/cMpgLRGteNbl0MVAeAeJfEGNyk5ahhYZtvnAy142zDpBmvWZth
ZuZvb7mwiNPiZTC65B/DFDdSCKZtD+LVCodzcm2Pkx6zgW0SC6pje+mX0+zpDxZ9
A9Eguiun1hInKX3URD1D
=qOck
-----END PGP SIGNATURE-----
Merge tag 'scmi-updates-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers
Pull "ARM SCMI support for v4.17" from Sudeep Holla:
ARM System Control and Management Interface(SCMI)[1] is more flexible and
easily extensible than any of the existing interfaces.
Few existing as well as future ARM platforms provide micro-controllers
to abstract various power and other system management tasks which have
similar interfaces, both in terms of the functions that are provided by
them, and in terms of how requests are communicated to them.
There are quite a few protocols like ARM SCPI, TI SCI, QCOM RPM, Nvidia Tegra
BPMP, and so on already. This specification is to standardize and avoid any
further fragmentation in the design of such interface by various vendors.
The current SCMI driver implementation is very basic and initial support.
It lacks support for notifications, asynchronous/delayed response, perf/power
statistics region and sensor register region.
Mailbox is the only form of transport supported currently in the driver.
SCMI supports interrupt based mailbox communication, where, on completion
of the processing of a message, the caller receives an interrupt as well as
polling for completion.
SCMI is designed to minimize the dependency on the mailbox/transport
hardware. So in terms of SCMI, each channel in the mailbox includes
memory area, doorbell and completion interrupt.
However the doorbell and completion interrupt is highly mailbox dependent
which was bit of controversial as part of SCMI/mailbox discussions.
Arnd and me discussed about the few aspects of SCMI and the mailbox framework:
1. Use of mailbox framework for doorbell type mailbox controller:
- Such hardware may not require any data to be sent to signal the remote
about the presence of a message. The channel will have in-built
information on how to trigger the signal to the remote.
There are few mailbox controller drivers which are purely doorbell based.
e.g.QCOM IPC, STM, Tegra, ACPI PCC,..etc
2. Supporting other mailbox controller:
- SCMI just needs a mechanism to signal the remote firmware. Such
controller may need fixed message to be sent to trigger a doorbell.
In such case we may need to get that data from DT and pass the same
to the controller. It's not covered in the current DT binding, but
can be extended as optional property in future.
However handling notifications may be interesting on such mailbox, but
again there is no way to interpret what the data field(remote message)
means, it could be a bit mask or a number or don't-care.
Arnd mentioned that he doesn't like the way the mailbox binding deals
with doorbell-type hardware, but we do have quite a few precedent drivers
already and changing the binding to add a data field would not make it any
better, but could cause other problems. So he is happy with the status quo
of SCMI implementation.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0056a/index.html
* tag 'scmi-updates-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
cpufreq: scmi: add support for fast frequency switching
cpufreq: add support for CPU DVFS based on SCMI message protocol
hwmon: add support for sensors exported via ARM SCMI
hwmon: (core) Add hwmon_max to hwmon_sensor_types enumeration
clk: add support for clocks provided by SCMI
firmware: arm_scmi: add device power domain support using genpd
firmware: arm_scmi: add per-protocol channels support using idr objects
firmware: arm_scmi: refactor in preparation to support per-protocol channels
firmware: arm_scmi: add option for polling based performance domain operations
firmware: arm_scmi: add support for polling based SCMI transfers
firmware: arm_scmi: probe and initialise all the supported protocols
firmware: arm_scmi: add initial support for sensor protocol
firmware: arm_scmi: add initial support for power protocol
firmware: arm_scmi: add initial support for clock protocol
firmware: arm_scmi: add initial support for performance protocol
firmware: arm_scmi: add scmi protocol bus to enumerate protocol devices
firmware: arm_scmi: add common infrastructure and support for base protocol
firmware: arm_scmi: add basic driver infrastructure for SCMI
dt-bindings: arm: add support for ARM System Control and Management Interface(SCMI) protocol
dt-bindings: mailbox: add support for mailbox client shared memory
When inserting duplicate objects (those with the same key),
current rhlist implementation messes up the chain pointers by
updating the bucket pointer instead of prev next pointer to the
newly inserted node. This causes missing elements on removal and
travesal.
Fix that by properly updating pprev pointer to point to
the correct rhash_head next pointer.
Issue: 1241076
Change-Id: I86b2c140bcb4aeb10b70a72a267ff590bb2b17e7
Fixes: ca26893f05 ('rhashtable: Add rhlist interface')
Signed-off-by: Paul Blakey <paulb@mellanox.com>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: David S. Miller <davem@davemloft.net>
1. Add few remaining SPDX license identifiers.
2. Add cpuidle support to all Midas-based boards (including new
GT-I9300/GT-I9305/GT-N7100/GT-N7105).
-----BEGIN PGP SIGNATURE-----
iQItBAABCAAXBQJantXhEBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9dwzw//
bxG9xzeZT83sxBk6QhgvDH2w5E0jtOtEvh//vHPyFt+CQNpOuauLULmqbEoVKhEd
XFWNima/eJtY69DzJ5pjJwm5vfE6EAqLb3XNjMc90aIGKJOhEX9q16IOHoSrdeqX
kjDXGGYmbpwSUVXgYq6noutr3S5U/t5A7zs+Rz+2OZo2NZY31PwmYs06VWHZ7ygL
uISte/Rhcq5i02iGHLEJ9lmyoLlUS9RAWR+Wujd5WY3xKNm0lMPEjIs80pSJXZDz
VADGMQJVHYok8O7DI30+SuHnIjIk6pyjl/SAmxKgPV9N8GJ4UueuQRijC4R2dPLY
jBD4ZboSjsc2vN3ioxvLTmmaSsLKHBIfv7LZW69olKVLgqYPubEcGJcdOTzUursp
7qKSB5Q1eEuiFkWB+M+aowKKuu3wy4gZNlC69hPKxEJtaBQ2AT5ltoiE58qa8IaE
jOCeHOVw6Q/NSEOEyFcRLBvH4+JLZYGYTCmxFlfjVGOYOKV0pAXXeMX0BabfRaLn
lc0Tc5x1MyDBnByXomJzd33H3mg8axPg5Cik3YlNskm5qbWTckf6uEqkg4H7kumQ
7GR3qfWsZdafFxINBHbVHM+sij8aY1Yl4w2sNW/HsWIk/VdCIyK8ahdKhMPevU3A
xWNnh0fJwxELZTv9GO3dlWqSAdUBs2Hxn4/V38XuAo4=
=sUWr
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Pull "Samsung mach/soc changes for v4.17" from Krzysztof Kozłowski:
1. Add few remaining SPDX license identifiers.
2. Add cpuidle support to all Midas-based boards (including new
GT-I9300/GT-I9305/GT-N7100/GT-N7105).
* tag 'samsung-soc-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: EXYNOS: Extend cpuidle support to Midas boards
ARM: EXYNOS: Add SPDX license identifiers
This series of changes enables the use device tree based sysconfig
data for ti-sysc driver. As we already have SmartReflex data configured,
we use that as the first driver to enable. To do that in a way where
SmartReflex is not probed twice, we need to prepare the SmartReflex
driver before flipping dts data on for it in the last patch of the
series.
To avoid regressions, we are checking the passed dts data against
existing platform data since we still have it available. Then after the
dts files are converted, we can simply drop the related platform data
at some point in the future.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdehERHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMRihAA2jlmAf4dePwe0K5V1VlQINbAU/FV+tXN
1oasvGwNBxaJMqJeZAdBd/veuXgrsprIbmlMmF+zP/wQDYiMccr0+ZvzMsUKJ9aA
mgzpW/pkpZEbi0ncci4UhQVOuZLja1xxtQ+ZGx82Vo7MXyU2jU9/Wzk67B4BZLws
1MGTsy5VZZh+wicq46eW9AspvFhKCMIw6Ylor3lfmm08H3V/cq9A8dHQeWX2jjsC
hSw9RzglGMi58FQ8cqNkxbD38r1VZh74OOqzOOlcJ5CwLWzIJwanWfwDesVb4ZTL
bdrn/Aps5b223LTAFN97vwUmyux/ja17YyCC5fU6C6wskgN+9jhPSslzFbFbU0kT
4chc5OYcdq5Lhm+vLCe2H5rB14KQxy6Ugb6aT+XAUOq0hw6tRSG17kqlXk/KtwrG
cDzPJzPjG/PDb8hW0Bd7JcjLqadmh7w1180KtT+9IayQM50XxcwwAOPT0XdUEUeP
aKIp5cRfOm/75KUIiNomhmoAd1pxX1G6y2qo49p3fbY0nJx09MgtQvWlbDrbhL8+
ACp2adGAlLqsW26E44cqNwMPPhyVcQXlVD9bc2D04nVhXapvRHtlrW4cRkkbQzfw
dAiQHDaBn4geSBUqGayQaIvX1WWqeZ6nzpI0JlyHPMiQdkdDvtyUqhJuK2uaY39n
vyRPw2H09ZM=
=/hJY
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.17/ti-sysc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Driver changes for ti-sysc for v4.17" from Tony Lindgren:
This series of changes enables the use device tree based sysconfig
data for ti-sysc driver. As we already have SmartReflex data configured,
we use that as the first driver to enable. To do that in a way where
SmartReflex is not probed twice, we need to prepare the SmartReflex
driver before flipping dts data on for it in the last patch of the
series.
To avoid regressions, we are checking the passed dts data against
existing platform data since we still have it available. Then after the
dts files are converted, we can simply drop the related platform data
at some point in the future.
* tag 'omap-for-v4.17/ti-sysc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Enable ti-sysc to use device tree data for smartreflex
PM / AVS: SmartReflex: Prepare to use device tree based probing
ARM: OMAP2+: Try to parse earlycon from parent too
ARM: OMAP2+: Add checks for device tree based sysconfig data
ARM: OMAP2+: Add functions to allocate module data from device tree
bus: ti-sysc: Handle some devices in omap_device compatible way
bus: ti-sysc: Add support for platform data callbacks
bus: ti-sysc: Remove unnecessary debugging statements
bus: ti-sysc: Improve handling for no-reset-on-init and no-idle-on-init
bus: ti-sysc: Handle stdout-path for debug console
bus: ti-sysc: Add suspend and resume handling
bus: ti-sysc: Add fck clock alias for children with notifier_block
ARM: OMAP2+: Prepare to pass auxdata for smartreflex
This series of changes from Dave Gerlach adds the PM related
code to allow low-power suspend states. The code consists of
the SoC specific assembly code and a related PM driver.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdeI4RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPRoxAA3M1qhApgnJBrvCoVbOQbDsL/Jst5geJz
eQIQMjqzLTJQDd6+0SJVggjRhDYW2mKk+SYbpbzjVfmdJeKAIX3IZj9MUMstbRSD
g8YCzSpW9C2EuOHlDhDDd4U6pc7/pMmWHH87PMaj05Qfct+hcSpI7OB5RfntX0Os
mhQ6e3SxlM9EZikiW2BXXjjKmQHYmqkfSZHhjbiGtpEXTa/zq/fVM67NEjdez7/F
1Uy3Hefv895H0TU+P3TtzLmvcQQn4JrIXNqi4wWM7ATf6MN9d9cPMxZ9mdTweCgd
B0nSYgwwzXS2bNd7KhtghAXckGqLRL+0CifB0xw+jCExwL+aOQPwKdvbfnF2JVqe
R8MochWgDBUAVX8hYpYD+IJ6qeoWFfu4ZEwFeMaQ0M2T7I417SSRwtNF2P9YSYOj
b6dv8Fe54m8QhPJo2OPD/bbzo2wwNuLqJ9bqI3oy9yrMe5EEAzuhtqGBeg1B4WKB
zWB2TQYLLl4FVJsfxV7wgsO2fk9xzs1cn70JWqdWMQ1kUl7k0NorZhSVlXt5x+oH
gPfkWO2S7+Il/FKsOAdb+HeCklDyy/xh/B0VFErHvqXOK78j1IpcUh6I9lgg1GFs
OXioMaGE13p+yOKQHDGqeK42Qjw2F6cPdkCGm67Mte66IqBV0khLpwK8WwzlcEio
C5jhVOor2u8=
=hBzh
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "Add am335x and am437x PM code for v4.17" from Tony Lindgren:
This series of changes from Dave Gerlach adds the PM related
code to allow low-power suspend states. The code consists of
the SoC specific assembly code and a related PM driver.
* tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
soc: ti: Add pm33xx driver for basic suspend support
ARM: OMAP2+: pm33xx-core: Add platform code needed for PM
ARM: OMAP2+: Introduce low-level suspend code for AM43XX
ARM: OMAP2+: Introduce low-level suspend code for AM33XX
