kybaaz/linux-xiaomi-chiron
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
996159 commits 15 branches 2 tags 2.2 GiB
Commit graph

996159 commits

This branch
This branch
All branches
Author SHA1 Message Date
Sean Wang
1c099ab447 mt76: mt7921: add MCU support 
MT7921 contains a microprocessor with which the host can use command/event
to communicate to implement offload features such as establish connection,
hardware scan and so on. The host has to download the ROM patch, RAM
firmware and finally activate the MCU to complete the MT7921
initialization.

Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Co-developed-by: Soul Huang <Soul.Huang@mediatek.com>
Signed-off-by: Soul Huang <Soul.Huang@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
 2021-01-29 18:09:56 +01:00
Sean Wang
163f4d22c1 mt76: mt7921: add MAC support 
Add Rx packet description parsing, Tx packet description compositon, handle
packet recycling and provide MAC information mt76 core needs to support
mac80211.

Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Co-developed-by: Soul Huang <Soul.Huang@mediatek.com>
Signed-off-by: Soul Huang <Soul.Huang@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
 2021-01-29 18:09:55 +01:00
Ville Syrjälä
6ede6b0616 drm/i915: Implement async flips for vlv/chv 
Add support for async flips on vlv/chv. Unlike all the other
platforms vlv/chv do not use the async flip bit in DSPCNTR and
instead we select between async vs. sync flips based on the
surface address register. The normal DSPSURF generates sync
flips DSPADDR_VLV generates async flips. And as usual the
interrupt bits are different from the other platforms.

Cc: Karthik B S <karthik.b.s@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111163711.12913-12-ville.syrjala@linux.intel.com
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
 2021-01-29 19:05:02 +02:00
Ville Syrjälä
4bb18054ad drm/i915: Implement async flip for ilk/snb 
Add support for async flips on ivb/hsw. Again no need for any
workarounds and just have to deal with the interrupt bits being
shuffled around a bit.

Cc: Karthik B S <karthik.b.s@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111163711.12913-11-ville.syrjala@linux.intel.com
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
 2021-01-29 19:04:28 +02:00
Ville Syrjälä
2a636e240c drm/i915: Implement async flip for ivb/hsw 
Add support for async flips on ivb/hsw. Unlike bdw+ we don't need
any workarounds to disable async flips. Apart from that the only
real difference from the bdw implementation is the location of the
flip_done interrupt bits.

Cc: Karthik B S <karthik.b.s@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111163711.12913-10-ville.syrjala@linux.intel.com
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
 2021-01-29 19:03:56 +02:00
Ville Syrjälä
cda195f13a drm/i915: Implement async flips for bdw 
Implement async flip support for BDW. The implementation is
similar to the skl+ code. And just like skl/bxt/glk bdw also
needs the disable w/a, thus we need to plumb the desired state
of the async flip all the way down to i9xx_plane_ctl_crtc().

According to the spec we do need to bump the surface alignment
to 256KiB for this. Async flips require an X-tiled buffer so
we don't have to worry about linear.

Cc: Karthik B S <karthik.b.s@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111163711.12913-9-ville.syrjala@linux.intel.com
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
 2021-01-29 19:00:34 +02:00
Chris Packham
2241ed9205 bus: mvebu-mbus: make iounmap() symmetric with ioremap() 
make coccicheck complains:

  ./drivers/bus/mvebu-mbus.c:1113:2-8: ERROR: missing iounmap; ioremap on line 1106 and execution via conditional on line 1111

It took some staring but I don't think there is a problem because the
file global `mbus_state` is passed mvebu_mbus_common_init() as the
`mbus` parameter so `mbus_state.mbuswins_base` and `mbus->mbuswins_base`
are the same thing. But this is confusing for anyone reading the code
and one less complaint from coccicheck would be nice so lets fix it.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
 2021-01-29 17:57:07 +01:00
Ville Syrjälä
cb80705549 drm/i915: Limit plane stride to below TILEOFF.x limit 
Limit pre-skl plane stride to below 4k or 8k pixels (depending on
the platform). We do this in order guarantee that TILEOFF/OFFSET.x
does not get too big.

Currently this is not a problem as we align SURF to 4k, and so
TILEOFF/OFFSET only have to deal with a single tile's worth of
pixels. But for async flips we're going to have to bump SURF
alignment to 256k, and thus we can no longer guarantee
TILEOFF/OFFSET.x will stay within acceptable bounds. We can avoid
this by borrowing a trick from the skl+ code and limit the max
plane stride to whatever value we can fit into TILEOFF/OFFSET.x.

The slight downside is that we may end up doing GTT remapping in
a few more cases where previously we did not have to. But since
that will only happen with huge buffers I'm not really concerned
about it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210111163711.12913-3-ville.syrjala@linux.intel.com
Reviewed-by: Karthik B S <karthik.b.s@intel.com>
 2021-01-29 18:51:01 +02:00
Sameer Pujar
5b4f632309 arm64: tegra: Audio graph sound card for Jetson AGX Xavier 
Enable support for audio-graph based sound card on Jetson AGX Xavier.
Following I/O interfaces are enabled.
  * I2S1, I2S2, I2S4 and I2S6
  * DMIC3

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-01-29 17:35:37 +01:00
Sameer Pujar
e471037635 arm64: tegra: Audio graph sound card for Jetson TX2 
Enable support for audio-graph based sound card on Jetson TX2. Based
on the board design following I/O modules are enabled.
  * All I2S instances (I2S1 ... I2S6)
  * All DSPK instances (DSPK1, DSPK2)
  * DMIC1, DMIC2 and DMIC3

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-01-29 17:34:38 +01:00
Sameer Pujar
5d25c476f2 Revert "arm64: tegra: Disable the ACONNECT for Jetson TX2" 
This reverts commit fb31949693 ("arm64: tegra: Disable the
ACONNECT for Jetson TX2").

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-01-29 17:34:37 +01:00
Sameer Pujar
3032985a01 arm64: tegra: Add RT5658 device entry 
Jetson AGX Xavier has an on-board audio codec whicn is connected to
Tegra I2S1 interface. Hence add corresponding device node for the
audio codec.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-01-29 17:34:32 +01:00
Bjorn Helgaas
2a0c106a67 MAINTAINERS: Fix 'ARM/TEXAS INSTRUMENT KEYSTONE CLOCKSOURCE' capitalization 
Fix capitalization typo in 'ARM/TEXAS INSTRUMENT KEYSTONE CLOCKSOURCE'.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
 2021-01-29 10:14:23 -06:00
Bjorn Helgaas
87525610b4 Fix "ordering" comment typos 
Fix comment typos in "ordering".

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Kalle Valo <kvalo@codeaurora.org>
Acked-by: Vasily Gorbik <gor@linux.ibm.com>	# s390
 2021-01-29 10:12:33 -06:00
Fabien Parent
06ec50ec0e arm64: dts: mediatek: mt8183-evb: add PWM support 
Enable the pwm driver and set the pinctrl for PWM A line.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20201209120322.137610-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
 2021-01-29 17:11:19 +01:00
Fabien Parent
afca1c66fb arm64: dts: mediatek: mt8183: add pwm node 
MT8183 SoC has 4 PWMs. Add the pwm node in order to support them.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20201209120322.137610-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
 2021-01-29 17:11:19 +01:00
Peter Geis
3029a563ac ARM: tegra: ouya: Fix eMMC on specific bootloaders 
Ouya fails to detect the eMMC module when booted via certain bootloaders.
Fastboot and hard-kexec bootloaders fail while u-boot does not. It was
discovered that the issue manifests if the sdmmc4 alternate configuration
clock pin is input disabled.

Ouya uses sdmmc4 in the primary pin configuration. It is unknown why this
occurs, though it is likely related to other eMMC limitations experienced
on Ouya.

For now, fix it by enabling input on cam_mclk_pcc0.

Fixes: d7195ac5c9 ("ARM: tegra: Add device-tree for Ouya")
Reported-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-01-29 17:08:03 +01:00
Alexander Usyskin
930c922a98 mei: me: add adler lake point LP DID 
Add Adler Lake LP device id.

Cc: <stable@vger.kernel.org>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20210129120752.850325-7-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:59:12 +01:00
Alexander Usyskin
f7545efaf7 mei: me: add adler lake point S DID 
Add Adler Lake S device id.

Cc: <stable@vger.kernel.org>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20210129120752.850325-6-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:59:12 +01:00
Tomas Winkler
372726cb39 mei: me: emmitsburg workstation DID 
Add Emmitsburg workstation DID.

Cc: <stable@vger.kernel.org>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20210129120752.850325-5-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:59:11 +01:00
Alexander Usyskin
da3eb47c90 mei: hbm: drop hbm responses on shutdown 
Ignore and drop HBM responses from init phase in shutdown phase.
Fixes stall if driver starting to stop in the middle of link init.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20210129120752.850325-4-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:59:11 +01:00
Alexander Usyskin
3a77df62de mei: hbm: call mei_set_devstate() on hbm stop response 
Use mei_set_devstate() wrapper upon hbm stop command response,
to trigger sysfs event.

Fixes: 43b8a7ed47 ("mei: expose device state in sysfs")
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20210129120752.850325-3-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:59:11 +01:00
Tomas Winkler
7615da2be0 mei: document that mei_msg_hdr_init returns ERR_PTR 
Document that mei_msg_hdr_init returns ERR_PTR.

Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20210129120752.850325-2-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:59:11 +01:00
Alexander Usyskin
1309ecc90f mei: fix transfer over dma with extended header 
The size in header field for packet transferred over DMA
includes size of the extended header.
Include extended header in size check.
Add size and sanity checks on extended header.

Cc: <stable@vger.kernel.org> # v5.10+
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20210129120752.850325-1-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:59:11 +01:00
Desmond Yan
d71277dc9b misc: bcm-vk: fix set_q_num API precedence issue 
Change set_q_num API to use if-else to make it more explicit,
and avoid a precedence rule issue.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Desmond Yan <desmond.yan@broadcom.com>
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Link: https://lore.kernel.org/r/20210129060403.14801-1-scott.branden@broadcom.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:57:38 +01:00
Thierry Reding
6c50321fd6 dt-bindings: arm: tegra: Document Jetson Xavier NX eMMC SKU 
Two different SKUs exist for the Jetson Xavier NX module, so document
the compatible strings for both, as well as the developer kits that come
with each of the SKUs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
 2021-01-29 16:56:47 +01:00
Baruch Siach
35db5e32eb arm64: dts: armada: add pwm offsets for ap/cp gpios 
The 'marvell,pwm-offset' property of both GPIO blocks (per CP component)
point to the same counter registers offset. The driver will decide how
to use counters A/B.

This is different from the convention of pwm on earlier Armada series
(370/38x). On those systems the assignment of A/B counters to GPIO
blocks is coded in both DT and the driver. The actual behaviour of the
current driver on Armada 8K/7K is the same as earlier systems.

Add also clock properties for base pwm frequency reference.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
 2021-01-29 16:54:48 +01:00
Coiby Xu
02bd88b483 staging: qlge: add documentation for debugging qlge 
Instructions and examples on kernel data structures dumping and
coredump.

Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-9-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:21 +01:00
Coiby Xu
a7c3ddf29a staging: qlge: clean up debugging code in the QL_ALL_DUMP ifdef land 
The debugging code in the following ifdef land
 - QL_ALL_DUMP
 - QL_REG_DUMP
 - QL_DEV_DUMP
 - QL_CB_DUMP
 - QL_IB_DUMP
 - QL_OB_DUMP

becomes unnecessary because,
 - Device status and general registers can be obtained by ethtool.
 - Coredump can be done via devlink health reporter.
 - Structure related to the hardware (struct ql_adapter) can be obtained
   by crash or drgn.

Link: https://lkml.org/lkml/2020/6/30/19
Suggested-by: Benjamin Poirier <benjamin.poirier@gmail.com>
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-8-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:21 +01:00
Coiby Xu
02988c36aa staging: qlge: remove mpi_core_to_log which sends coredump to the kernel ring buffer 
devlink health could be used to get coredump. No need to send so much
data to the kernel ring buffer.

Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-7-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:20 +01:00
Coiby Xu
2352cf40fb staging: qlge: support force_coredump option for devlink health dump 
With force_coredump module parameter set, devlink health dump will
reset the MPI RISC first which takes 5 secs to be finished.

Note that only NIC function that owns the firmware can do the
force_dumping. Otherwise devlink will receive an EPERM error.

Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-6-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:20 +01:00
Coiby Xu
1053c27804 staging: qlge: coredump via devlink health reporter 
$ devlink health dump show DEVICE reporter coredump -p -j
    {
        "Core Registers": {
            "segment": 1,
            "values": [ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 ]
        },
        "Test Logic Regs": {
            "segment": 2,
            "values": [ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 ]
        },
        "RMII Registers": {
            "segment": 3,
            "values": [ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 ]
        },
        ...
        "Sem Registers": {
            "segment": 50,
            "values": [ 0,0,0,0 ]
        }
    }

Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-5-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:20 +01:00
Coiby Xu
b9ccc256d4 staging: qlge: re-write qlge_init_device 
Stop calling ql_release_all in qlge_init_device and free things one step
at a time.

struct qlge_adapter *qdev is now a private structure of struct devlink
and memset is not necessary.

Link: https://lore.kernel.org/patchwork/patch/1321092/#1516928
Suggested-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-4-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:20 +01:00
Coiby Xu
953b940093 staging: qlge: Initialize devlink health dump framework 
Initialize devlink health dump framework for the qlge driver so the
coredump could be done via devlink.

struct qlge_adapter is now used as the private data structure of
struct devlink so it could exist independently of struct net_device
and devlink reload could be supported in the future. The private data
of PCIe driver now points to qlge_adapter.

Since devlink_alloc will zero out struct qlge_adapter, memset in
qlge_init_device is not necessary.

Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-3-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:20 +01:00
Coiby Xu
f8c047be54 staging: qlge: use qlge_* prefix to avoid namespace clashes with other qlogic drivers 
To avoid namespace clashes with other qlogic drivers and also for the
sake of naming consistency, use the "qlge_" prefix as suggested in
drivers/staging/qlge/TODO,
 - For existing ql_ prefix,
   sed -i "s/ql_/qlge_/g" *.{c,h}
 - for structs not having a prefix
   1. get a list of structs
      grep "struct.*{" qlge.
   2. add qlge_ for each struct, e.g.,
      sed -i "s/ib_ae_iocb_rsp/qlge_ib_ae_iocb_rsp/g" *.{c,h}

Link: https://lore.kernel.org/patchwork/patch/1318503/#1516131
Suggested-by: Benjamin Poirier <benjamin.poirier@gmail.com>
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-2-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:54:20 +01:00
Tomoyuki Matsushita
b8ddc3b14c Bluetooth: fix indentation and alignment reported by checkpatch 
Signed-off-by: Tomoyuki Matsushita <xorphitus@fastmail.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
 2021-01-29 16:51:45 +01:00
Max Chou
9ab9235fe5 Bluetooth: btrtl: Enable WBS for the specific Realtek devices 
By this change, it will enable WBS supported on the specific Realtek BT
devices, such as RTL8822C and RTL8852A.
In the future, it's able to maintain what the Realtek devices support WBS
here.

Tested-by: Hilda Wu <hildawu@realtek.com>
Reviewed-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
Signed-off-by: Max Chou <max.chou@realtek.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
 2021-01-29 16:51:35 +01:00
Jiapeng Zhong
231ee8bd83 Bluetooth: fix coccicheck warnings debugfs 
Use DEFINE_DEBUGFS_ATTRIBUTE rather than DEFINE_SIMPLE_ATTRIBUTE
for debugfs files.

Reported-by: Abaci Robot<abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Zhong <abaci-bugfix@linux.alibaba.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
 2021-01-29 16:51:35 +01:00
Dylan Van Assche
684ceb81dc staging: vc4_services: bcm2835-audio: Add SNDRV_PCM_INFO_BATCH flag 
Playing audio with PulseAudio and the bcm2835-pcm driver results
in distorted sound. Timer-based scheduling does not properly work
with bcm2835-pcm since configuring PulseAudio with tsched=0
avoids this problem.

Setting the SNDRV_PCM_INFO_BATCH flag prevents PulseAudio to use
timer-based scheduling by default. Settings this flag makes audio
works out of the box.

Based on: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7f2430cda819a9ecb1df5a0f3ef4f1c20db3f811

Signed-off-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20210127174348.10192-1-me@dylanvanassche.be
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:50:56 +01:00
Pali Rohár
6ece0f7dbd arm64: dts: marvell: armada-37xx: Add SATA comphy into main armada-37xx.dtsi file 
SATA on A3720 SOC can use only comphy2, so move this definition from board
specific DTS file armada-3720-espressobin.dtsi into main A3720 SOC file
armada-37xx.dtsi.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
 2021-01-29 16:50:28 +01:00
Colin Ian King
d730b1e1c3 staging: net: wimax: i2400m: fw: remove redundant initialization of variable result 
The variable result is being initialized with a value that is never
read and it is being updated later with a new value.  The initialization
is redundant and can be removed.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Addresses-Coverity: ("Unused value")
Link: https://lore.kernel.org/r/20210128173703.645328-1-colin.king@canonical.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 2021-01-29 16:45:57 +01:00
Marcin Wojtas
e8ff9d5996 arm64: dts: cn913x-db: enable MMC HS400 
This patch adds necessary flags in the device tree
which enable HS400 mode on AP807 MMC controller
on the CN913x-DB board.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
 2021-01-29 16:44:47 +01:00
Konstantin Porotchkin
6c55091335 arm64: dts: change AP807 SDHCI compatibility string 
This patch adds new compatible string to AP807 DTSI to avoid
its SDHCI controller to run in "slow mode" with disabled UHS.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
 2021-01-29 16:44:34 +01:00
Marek Behún
a9d9bfcadf arm64: dts: armada-3720-turris-mox: rename u-boot mtd partition to a53-firmware 
The partition called "u-boot" in reality contains TF-A and U-Boot, and
TF-A is before U-Boot.

Rename this parition to "a53-firmware" to avoid confusion for users,
since they cannot simply build U-Boot from U-Boot repository and flash
the resulting image there. Instead they have to build the firmware with
the sources from the mox-boot-builder repository [1] and flash the
a53-firmware.bin binary there.

[1] https://gitlab.nic.cz/turris/mox-boot-builder

Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
 2021-01-29 16:40:29 +01:00
Hans de Goede
219991e6be Bluetooth: Add new HCI_QUIRK_NO_SUSPEND_NOTIFIER quirk 
Some devices, e.g. the RTL8723BS bluetooth part, some USB attached devices,
completely drop from the bus on a system-suspend. These devices will
have their driver unbound and rebound on resume (when the dropping of
the bus gets detected) and will show up as a new HCI after resume.

These devices do not benefit from the suspend / resume handling work done
by the hci_suspend_notifier. At best this unnecessarily adds some time to
the suspend/resume time. But this may also actually cause problems, if the
code doing the driver unbinding runs after the pm-notifier then the
hci_suspend_notifier code will try to talk to a device which is now in
an uninitialized state.

This commit adds a new HCI_QUIRK_NO_SUSPEND_NOTIFIER quirk which allows
drivers to opt-out of the hci_suspend_notifier when they know beforehand
that their device will be fully re-initialized / reprobed on resume.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
 2021-01-29 16:37:00 +01:00
Arnd Bergmann
ed8878041a SoC changes for omaps for v5.12 merge window 
Update email address for Roger and fix a typo
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmAScJIRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXNHRw//W+0WzIbx/1dEGwUfjZvZm7vJ0SiCCKsf
 gEzwmUFlKY7yQohnZ2Qp2Fy7aOOOa7MqGpv/pg5aa4FNoCO2ajAGy7K7gCo5kiFq
 KGmn6v8NNdILra0LaUjfogiSmbgnYZossK1lyi4nNKn5Ed0jT+a79SUAqTiKTaLi
 x39YOSllWIRVVki4rfoPHP/CnZQpWk4J9UOV69Bdd5mlPNPhzbPYs0VW1+6Q4W2m
 rViiLRF3amxkAwmnOdXdxK/6u3s+9pe/8sD3X4HZI6bUE+VSmUUGIBGZhTyp3j41
 zwS/tgG9GqAhQ9dvh9VBQC6ZrVOb4nHd6NKINr6osX4BEDnjt83Cpu4crCgD9ECh
 ox8lZwnCLt5VtokARcAgwrVX2vbPiPHF4BY8zVR2qBazj0489nb2sU9FwKM1hLx5
 HJ8O0+9dNMd0qthBz0JktLOFBodGUMVsY6XNue6yAWT8/6g0rJA5eOIqcE6a5/JM
 4ttwmVCQ009Rv33drkPPf2IdYHLxRsckHOwt1wqthZCGNgtzl/YhkjbLtaEmo93L
 AXpeZghJXjXALijWskpVE412ogZ5ueM7P7LEC3Tl2aIYvDowM527i8RZFT7jtS4y
 r7GFr4EQWy1+jcBt6EBWPJwWmy1xwYF2WDoRsVS8SVbYapk/SBAbFe/PjIFTImHo
 BX+NAsSNE9E=
 =QsAV
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.12/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

SoC changes for omaps for v5.12 merge window

Update email address for Roger and fix a typo

* tag 'omap-for-v5.12/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: fix spellint typo
  MAINTAINERS: Update address for OMAP GPMC driver

Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2021-01-29 16:33:06 +01:00
Arnd Bergmann
2226c89413 Devicetree changes for omaps for v5.12 merge window 
This includes the following earlier patches that were considered too
 late for v5.11 as discussed between Arnd and me on freenode #armlinux
 in December:
 
 - More updates to use cpsw switchdev driver
 
 - Enable gta04 PMIC power management
 
 - Updates for dra7 for ECC support, 1.8GHz speed and keep the
   ldo0 regulator always on as specified in the data manual
 
 And then we have the new devicetree changes:
 
 - Configure the original Amazon Echo to for audio
 
 - Configure missing thermal interrupt for omap4430
 
 - Configure mapphone devices for passive thermal cooling, and add
   1.2GHz mode.
 
 - Correct omap4430 sgx clock rate to use the runtime Android kernel
   value, the earlier value was for a lower power operating point
 
 - Drop turbo mode for 1GHz omap3 variants as we now have passive
   cooling configured
 
 - Update email address for Javier
 
 - Add new MYIR Tech Limited board support
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmASaj4RHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXO7mBAAj/5zpwT9PS565m+GQZ9Ng8M/xYrIHMDw
 lQDwzCAHMab4ZMN1fw3PhXUl9Wvnwm4UIlnqELx9BLFtCaFUOFulgj62wkeb9VLT
 hqvOTCEXeK3CvLzcT1RxOnw9YedUOm+E0p8hWujM6PhqaN93LvlqMiS+ZotbQ7LT
 sjB/2GYoHJ1+xZlS13+Gylf5MlHN0iisSMFMAX6hMoLxX2FXsDTuef45cTe9Jy3/
 tH8O/W5CHe61dspPFft4L7W4rjkRDNztv/35TRIqb1qq7a8s7Lk1LJLjlMXCTk+Z
 Y6lPTsUv8+HGldpEEPM+I9P26l9+LZcsCv39veM2YpamnJ4Ln5KzOSjX5I3J3UK+
 BOADh8Va/04g/+JsJrVxBUs3Z7Edxz//cXnaMPZfp8OW1g2vgAJkjwWcukYVArmL
 /OmscZpuKELpflvdZa+puLXNUgVqSKlvR3Rq49MAeji1RhyEUMHdCQVibd/urnJr
 ngwg319JE2mgOtQqmZgsp0xyYE6sh141xhZRdK2X1kvvsjMjNirrbQ6JLCGZLoYv
 rWL7Psh4n+DvpzBk/Y+fow1/8A/lg3XK7Pd1XhB5Kes+EIQSFFSGnD7ZIrSJitGj
 aem+uqIijOE2egN5nBDHM6sbYgTQEIr41Y2fE3LbvjdBZBQfZA0NqIGiobgRt4mv
 MnLRfJ/+ZtY=
 =HqBS
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.12 merge window

This includes the following earlier patches that were considered too
late for v5.11 as discussed between Arnd and me on freenode #armlinux
in December:

- More updates to use cpsw switchdev driver

- Enable gta04 PMIC power management

- Updates for dra7 for ECC support, 1.8GHz speed and keep the
  ldo0 regulator always on as specified in the data manual

And then we have the new devicetree changes:

- Configure the original Amazon Echo to for audio

- Configure missing thermal interrupt for omap4430

- Configure mapphone devices for passive thermal cooling, and add
  1.2GHz mode.

- Correct omap4430 sgx clock rate to use the runtime Android kernel
  value, the earlier value was for a lower power operating point

- Drop turbo mode for 1GHz omap3 variants as we now have passive
  cooling configured

- Update email address for Javier

- Add new MYIR Tech Limited board support

* tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board
  ARM: dts: omap3-igep: Change email address in copyright notice
  ARM: dts: omap36xx: Remove turbo mode for 1GHz variants
  ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel
  ARM: dts: motorola-mapphone: Add 1.2GHz OPP
  ARM: dts: motorola-mapphone: Configure lower temperature passive cooling
  ARM: dts: Configure missing thermal interrupt for 4430
  ARM: dts: omap3-echo: Add speaker sound card support
  ARM: dts: dra71-evm: mark ldo0 regulator as always on
  ARM: dts: dra76x: add support for OPP_PLUS
  ARM: dts: am574x-idk: add support for EMIF1 ECC
  ARM: dts: omap3-gta04: fix twl4030-power settings
  ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv
  ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver

Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2021-01-29 16:31:25 +01:00
Arnd Bergmann
86a24899c2 STM32 DT updates for v5.12, round 1 
Highlights:
 ----------
 
 MCU part:
  -Rename mmc nodes to match with yaml validation.
 
 MPU part:
  -Rename mmc nodes to match with yaml validation.
  -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files
   to SoC dtsi file.
 
  -LXA:
   -Fix leds schema for yaml validation.
 
  -DH:
   -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock
    on DHCOM.
   -Add SDMMC1 init state inorder to use some gpios during probing phase.
   -Disable KS8851 and FMC on PicoITX board.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmATyQUdHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX84BAAlVkBo4MqpaSDUVTS
 TGdwGoZMWmY848xb5x5RSMhXoDPgqOCWNF+iprhUii7QT6jgZMxy5JkwXFFpaK7K
 aIGYyegx/7BoUiyhEnzLHDO2brqzbwy6bRwVpVeqPFgPrOW7Tv6lfN9kpA06EQJ8
 nQNpGlXrcmeiCmD/iGX50JGC5X2ldqcLjAIEdgvGzRd/pGkyFkh6WIAvTf1wkgvi
 BqM5swKNWVeB3PloSxqfU5YE4ZBNkdjyjPCaIqB47or3WztyBaqH3KlEYTwwcJcw
 EaARNkl2sLvuu5p2CEpYwjW0TPG/RivQFpAYDTOGEjAOzZ4C2tWnQQzDTdlAIsCp
 FgrpWF9R/k43ea11Wr9A/vgh2kimQbBJtr5OoohxsxzxM/RqvFXBPzmm+sAGCgJ6
 YH8AEeKYECDLr4Xw1F05sAibWJsUWX8dktbtG2ZRa7JT5AshzaISDbQmt1qUiRG4
 duxDmaW3Gh0AYBXVVA0bH1hmIADVn2OjfryNHM3LFIELiowZwYY6VxksYVD2VF8l
 uqkSxoYp041luJDXJEAWCKcGzlBprVoqpjzNiasKKPlTFmgh9qMLI6f5zM7tHNCM
 0Bvt4kCGT9yJAJMJV/UvYwYuiCHan8ZMkbEjJCx4FQcTQnJ8NMKVTdASsZT6917A
 aFkwN46HsDoAWL/3GOeUPhKnazo=
 =j5vm
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.12, round 1

Highlights:
----------

MCU part:
 -Rename mmc nodes to match with yaml validation.

MPU part:
 -Rename mmc nodes to match with yaml validation.
 -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files
  to SoC dtsi file.

 -LXA:
  -Fix leds schema for yaml validation.

 -DH:
  -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock
   on DHCOM.
  -Add SDMMC1 init state inorder to use some gpios during probing phase.
  -Disable KS8851 and FMC on PicoITX board.

* tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
  ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards
  ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151
  ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
  ARM: dts: stm32: Rename mmc controller nodes to mmc@
  ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM
  ARM: dts: stm32: Add additional init state for SDMMC1 pins
  ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board
  ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1
  ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
  ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect

Link: https://lore.kernel.org/r/5e8897a0-8f68-5e41-bfa0-ccdf1e23a3c1@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2021-01-29 16:29:20 +01:00
Rafael J. Wysocki
b584b7e963 Merge branch 'acpi-sysfs' 
* acpi-sysfs:
  ACPI: sysfs: Prefer "compatible" modalias
 2021-01-29 16:28:48 +01:00
Yannick Fertre
f1f9580527 ARM: multi_v7_defconfig: add STM32 CEC support 
Enable CEC support for STMicroelectronics as loadable module.

Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link: https://lore.kernel.org/r/20210129084842.29123-1-alexandre.torgue@foss.st.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2021-01-29 16:28:33 +01:00