Huazhong Tan says:
====================
net: hns3: add some misc update about reset issue
This series includes some misc update relating to reset issue.
[patch 1/7] & [patch 2/7] splits hclge_reset()/hclgevf_reset()
into two parts: preparing and rebuilding. Since the procedure
of FLR should be separated out from the reset task([patch 3/7 &
patch 3/7]), then the FLR's processing can reuse these codes.
pci_error_handlers.reset_prepare() is void type function, so
[patch 6/7] & [patch 7/7] factor some codes related to PF
function reset to make the preparing done before .reset_prepare()
return.
BTW, [patch 5/7] enlarges the waiting time of reset for matching
the hardware's.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
hclge_reset_prepare_down() is only used to inform VF that PF is
going to do function reset, then using hclge_func_reset_sync_vf()
in hclge_reset_prepare_wait() to query whether VF is ready before
asserting PF function reset. To make the code more readable,
this patch uses a new function hclge_function_reset_notify_vf()
to do this job.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When synchronizes with VFs fail before PF function reset,
PF driver should go on its function reset, otherwise it
can not run normally anymore. So, hclge_func_reset_sync_vf()
should not affect the processing of PF reset, this patch
modifies its return type to void.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When the load of firmware is high, its reset task may takes
more time(which will be as long as 35 seconds). So this
patch modifies HCLGE_RESET_WAIT_CNT to match the firmware's.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently, the actual work of VF FLR is handled in the reset task,
which is asynchronous. So in some case, if the preparing and
rebuilding are not done, then the VF FLR will trigger some problems,
for example, makes hardware go into chaos.
So this patch separates the process of VF FLR from reset task, and
adds a semaphore to serialize this reset and others.
When FLR's preparing fails, if there has other higher level reset
pending or failing times less than the HCLGE_FLR_RETRY_CNT, this
preparing should be retried, otherwise it will get into a wrong state.
BTW, while the hardware reports misc interrupt during pcie_flr(),
the driver can not receive this interrupt anymore, so disable it
when hclgevf_flr_prepare() return, and re-enable it when enter
hclgevf_flr_done().
Avoid declaring internal function hclgevf_enable_vector(), this patch
also moves its definition forward, and removes unused enum
hnae3_flr_state.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently, the actual work of PF FLR is handled in the reset task,
which is asynchronous. So in some case, if the preparing and
rebuilding are not done, then the PF FLR will trigger some problems,
for example, makes hardware go into chaos.
So this patch separates the process of PF FLR from reset task, and
adds a semaphore to serialize this reset and others.
When FLR's preparing fails, if there has other higher level reset
pending or failing times less than the HCLGE_FLR_RETRY_CNT, this
preparing should be retried, otherwise PF and its VF may get into
wrong state.
BTW, while the hardware reports misc interrupt during pcie_flr(),
the driver can not receive this interrupt anymore, so disable it
when hclge_flr_prepare() return, and re-enable it when enter
hclge_flr_done().
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
hclgevf_reset() is a little bloated, and the process of VF FLR will
be separated from the reset task later. So this patch splits
hclgevf_reset() into hclgevf_reset_prepare() and hclge_reset_rebuild(),
then FLR can also reuse these two functions. Also moves HNAE3_UP_CLIENT
into hclgevf_reset_stack().
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
hclge_reset() is a little bloated, and the process of PF FLR will
be separated from the reset task later. So this patch splits
hclge_reset() into hclge_reset_prepare() and hclge_reset_rebuild(),
then FLR can also reuse these two functions.
BTW, since hclge_clear_reset_cause() and hclge_reset_prepare_up()
will not affect the device, so in hclge_reset_rebuild(), these
functions are called without rtnl_lock.
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
My Netronome email address may become inactive soon.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
A couple of locations accidentally misspelled snapshot as shapshot.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The function to obtain a unique snapshot id was mistakenly typo'd as
devlink_region_shapshot_id_get. Fix this typo by renaming the function
and all of its users.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
First, printk() is NMI-context safe now since the safe printk() has been
implemented and it already has an irq_work to make NMI-context safe.
Second, this NMI irq_work actually does not work if a NMI handler causes
panic by watchdog timeout. It has no chance to run in such case, while
the safe printk() will flush its per-cpu buffers before panicking.
While at it, repurpose the irq_work callback into a function which
concentrates the NMI duration checking and makes the code easier to
follow.
[ bp: Massage. ]
Signed-off-by: Changbin Du <changbin.du@gmail.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20200111125427.15662-1-changbin.du@gmail.com
rq->out[1] should be valid before accessing. Otherwise,
in very rare cases, out-of-bound dirty onstack rq->out[1]
can equal to *in and lead to unintended memmove behavior.
Link: https://lore.kernel.org/r/20200107022546.19432-1-gaoxiang25@huawei.com
Fixes: 7fc45dbc93 ("staging: erofs: introduce generic decompression backend")
Cc: <stable@vger.kernel.org> # 5.3+
Reviewed-by: Chao Yu <yuchao0@huawei.com>
Signed-off-by: Gao Xiang <gaoxiang25@huawei.com>
uC sanitization is only meaningful if we are running with uC present
or enabled. Make this function part of the uc_ops.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-5-michal.wajdeczko@intel.com
uC preparation and cleanup steps are only meaningful if we are
running with uC enabled. Make these functions part of the uc_ops.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-4-michal.wajdeczko@intel.com
Firmware fetching and cleanup steps are only meaningful if we are
running with uC enabled. Make these functions part of the uc_ops.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-3-michal.wajdeczko@intel.com
Instead of spreading multiple conditionals across the uC code
to find out current mode of uC operation, start using predefined
set of function pointers that reflect that mode.
Begin with pair of init_hw/fini_hw functions that are responsible
for uC hardware initialization and cleanup.
v2: drop ops_none, use macro to generate ops helpers
v3: reuse __uc_check_hw to avoid redundant comment
v4: forward declare ops struct vs functions
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200110222723.14724-2-michal.wajdeczko@intel.com
We've got quite a few bug reports showing the SOF driver being loaded
unintentionally recently, and the reason seems to be that users didn't
know the module option change: with the recent kernel, a new option
dsp_driver=1 has to be passed to a new module snd-intel-dspcfg
instead of snd_hda_intel.dmic_detect=0 option.
That is, actually there are two tricky things here:
- We changed the whole detection in another module and another
option semantics.
- The existing option for skipping the DSP probe was also renamed.
For avoiding the confusion and giving user more hint, this patch
reverts the renamed option dsp_driver back to dmic_detect for
snd-hda-intel module, and show the warning about the module option
change when the non-default value is passed.
Fixes: 82d9d54a6c ("ALSA: hda: add Intel DSP configuration / probe code")
Link: https://lore.kernel.org/r/20200109082000.26729-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Dan Murphy says:
====================
DP83822 and DP83TC811 Fixes
Two fixes on net/phy/Kconfig for the TI ethernet PHYs.
First fixed the typo in the Kconfig for the DP83TC811 where it incorretly stated
that the support was for a DP83TC822 which does not exist.
Second fix was to update the DP83822 Kconfig entry to indicate support for the
DP83825 devices in the description and the prompt.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Update the Kconfig description to indicate support for the DP83825I
device as well.
Fixes: 32b12dc8fde1 ("net: phy: Add DP83825I to the DP83822 driver")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix typo in the Kconfig for the DP83TC811 as it indicates support for
the DP83TC822 which is incorrect.
Fixes: 6d749428788b {"net: phy: DP83TC811: Introduce support for the DP83TC811 phy")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/net/ethernet/sfc/mcdi_functions.c: In function 'efx_mcdi_ev_init':
drivers/net/ethernet/sfc/mcdi_functions.c:79:28: warning:
variable 'nic_data' set but not used [-Wunused-but-set-variable]
commit 4438b587fe ("sfc: move MCDI event queue management code")
introduces this unused variable.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Remove duplicated include.
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: Edward Cree <ecree@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When running in XDP mode, pages come from the page pool, and should
be freed back to the same pool or specifically detached. Currently,
when the driver re-initializes, the page pool destruction is delayed
forever since it thinks there are oustanding pages.
Fixes: 322b87ca55 ("bnxt_en: add page_pool support")
Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Cleanups (Samsung and Exynos names, Kconfig help text correction).
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl4YsHAQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1wKGD/9IdB5FLNEAoJ0hqn+JifCP77fAXpjuJu8A
XK/ruLhqJAFsmpynLmN8Mbno+48mewlQq9hRgl0vx9UN8wSzQh5vWqyTQl0PjqwV
4DdEJhxSueOxm7oxaBKV3k+QZX498sJxucdgCG53gRkxwvQj6TQn7PXDBwZYlOo8
6b40qwZ2lY/T/T8kUuKrMZs1SPoRa55y5Yc3Sj2B0S343grR6fdZ73AcSr44LN5v
GBCajYM8jyNXrfDcNaM54eeCDT/ExaF2QoqOS77C2dBb+pii41/Fz1w4jmj36X1E
izzqSbMlcZR0nMzywdy34l7XyWDgz2l7siUnhVCzbVcb9WtceEwnwLbASSzgQj6Z
XAZKBk1X618Oq8aFznzGIPx8CTxsUpjw/9vgpCsgx+v69L/xr6/pPTQveXiGVySo
0uevBI/6zbhr7kmarn3+0S2ly2DsVh2rTHC/T8P4wmD1rJSszjCXlXloUGnc7sNH
9z3I7zIzT9KmHFtN7wSb7olJYgnlWu32WWmvD8WsXkWGIDkX08J1qv7UIO00OL3H
rzG0hKJ3P2fA0EI/sLAbXLkrDwm/lOIINQpSdeqoBNRPKlPJ4njnRqHZtH5r29pu
Qsy+fCh+lj3M1RHLecnlq1DwWqJgSflFmd7j9zWoSw57XHTdW+zm+mZo1VY4brdr
UvaQruhzhw==
=NDK3
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc
Samsung mach/soc changes for v5.6
Cleanups (Samsung and Exynos names, Kconfig help text correction).
* tag 'samsung-soc-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: samsung: Rename Samsung and Exynos to lowercase
ARM: exynos: Correct the help text for platform Kconfig option
Link: https://lore.kernel.org/r/20200110172334.4767-4-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This tag adds support for the Nuvoton NPCM, Intel Gatway SoC, and
Broadcom BCM7216 RESCAL reset controllers, adds missing SCSSI reset
controls for newer Uniphier SoCs, aligns the program flow in the
devm_reset_controller_register, __devm_reset_control_get, and
devm_reset_control_array_get functions for better consistency,
and allows to build the Qcom AOSS reset driver as a module.
This is based on v5.5-rc3 because the core patch depends on commit
db23808615 ("reset: Do not register resource data for missing
resets").
-----BEGIN PGP SIGNATURE-----
iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXhg87xcccC56YWJlbEBw
ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwKgqAQDLy40/GkWMZe6pv3Q6P5i8FyQZ
pSMcIKLP9Ig1bLdeRQD/YDjBbFVt9UbD7yLNJTkoNn3jJeg0bQo520yQ14NBHgM=
=LMjX
-----END PGP SIGNATURE-----
Merge tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.6
This tag adds support for the Nuvoton NPCM, Intel Gatway SoC, and
Broadcom BCM7216 RESCAL reset controllers, adds missing SCSSI reset
controls for newer Uniphier SoCs, aligns the program flow in the
devm_reset_controller_register, __devm_reset_control_get, and
devm_reset_control_array_get functions for better consistency,
and allows to build the Qcom AOSS reset driver as a module.
This is based on v5.5-rc3 because the core patch depends on commit
db23808615 ("reset: Do not register resource data for missing
resets").
* tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux:
reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristate
reset: Add Broadcom STB RESCAL reset controller
dt-bindings: reset: Document BCM7216 RESCAL reset controller
reset: intel: Add system reset controller driver
dt-bindings: reset: Add YAML schemas for the Intel Reset controller
reset: uniphier: Add SCSSI reset control for each channel
reset: Align logic and flow in managed helpers
reset: npcm: add NPCM reset controller driver
dt-bindings: reset: Add binding constants for NPCM7xx reset controller
dt-bindings: reset: add NPCM reset controller documentation
Link: https://lore.kernel.org/r/dbbb2ca7490a0146d9ba632fd4d9f38063e03e9f.camel@pengutronix.de
Signed-off-by: Olof Johansson <olof@lixom.net>
We've created a vendor directory for sprd, so move the board bindings to
there.
Link: https://lore.kernel.org/r/20200110063755.19804-2-zhang.lyra@gmail.com
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.
The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.
Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl4Xm7MQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgXPbB/4/iuGhWfydiiB6Mrmeifzlt+Ch7Hm5IJBA
03f8FiHbGkW1Tlh1buw6t9BDKI0XKNqD94MU0pya4yDB7baFaH1GEk8S4/mbEAuE
OZnWM0jzQ40b/1JmwRCw0PL2NTFHwlE+SSHnBJ4EW/OnOsCYUSz8+Aq33fMwdsPA
Dm9gxAeeHsBJTxk26cxLrGePB5vYXltGwazklkKkU5scV75sfJu1xcRKcnVp71sH
4j33aWi19GWo2YkW6RGXzTgiXoFPR+PgzfU337KTqq6A5oSIybH9g2WUnYyAxi8R
tJKxiOBSBeGIrIRxMWtw8g9VxohJwzHfi9y4XO1VwzLpl/SQf3mb
=iCh7
-----END PGP SIGNATURE-----
Merge tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards are the Radxa Rock Pi N10 using the VMARC SOM and Dalang
carrier board, separate versions for the two rockpro64 hardware revisions
which switched a pin between revisions. The rockpro64 also got
bluetooth support now.
The px30 got a lot of attention with dsi, gpu and thermal support.
Similarly the rk3399-roc-pc board also got attention with mtd flash,
sdr104 mode, hdmi sound, gpu and a lot of other smaller improvements.
Other than that there is a new gpu-cooling device for rk3399 a cpu
idle-state for rk3328 and more small improvements across a number
of boards.
* tag 'v5.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (37 commits)
arm64: dts: rockchip: Enable mp8859 regulator on rk3399-roc-pc
arm64: dts: rockchip: rk3399-hugsun-x99: remove supports-sd and supports-emmc options
arm64: dts: rockchip: rk3399-firefly: remove num-slots from &sdio0 node
arm64: dts: rockchip: Add PX30 LVDS
arm64: dts: rockchip: add dsi controller for px30
arm64: dts: rockchip: Add PX30 DSI DPHY
arm64: dts: rockchip: Add RK3328 idle state
arm64: dts: rockchip: remove identical &uart0 node from rk3368-lion-haikou
arm64: dts: rockchip: Add Radxa Rock Pi N10 initial support
ARM: dts: rockchip: Add Radxa Dalang Carrier board
arm64: dts: rockchip: Add VMARC RK3399Pro SOM initial support
dt-bindings: arm: rockchip: Add Rock Pi N10 binding
arm64: dts: rockchip: hook up bluetooth at uart0 on rockpro64
arm64: dts: rockchip: enable wifi module at sdio0 on rockpro64
arm64: dts: rockchip: split rk3399-rockpro64 for v2 and v2.1 boards
arm64: dts: rockchip: enable the gpu on px30-evb
arm64: dts: rockchip: add the gpu for px30
dt-bindings: gpu: mali-bifrost: Add Rockchip PX30
arm64: dts: rockchip: Add GPU cooling device for RK3399
arm64: dts: rockchip: Add regulators for PCIe for Radxa Rock Pi 4 board
...
Link: https://lore.kernel.org/r/5115625.yBEeHQkg2z@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
additional operating points for rk3288-tinker.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl4Xk/0QHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgbR8B/9fX3OlIkdu19InRObH9COCjhgZNZQDTkcj
BDR2acJuVJlw409bxNJmWNp7/EvkNVv9y/8F5evqNTDx0qCWT7k05GaveXzwlVoE
FFoIlY1+6uuw/2zqCCI+PXDLSo7NKaNewUgmsdWMFfLPITK/Jh9QQgtq0Jw8xYjk
mpvv/BKWvwczj1Ms7Qx/jh9bKSxE8TyeLrLoEyUEYkqMvW+xf/5D4ahEPxwSWy9y
YumDskVBM+669aTLVSdCVKRZntZY8PdgGgo/l0uBTvIsS/GBvP0bdX8WZrwlvQeZ
02Mt/ef7xrA0QHjovypwkI7zZuBwTRSzUqbpTLnFy2HI4bKDiEh+
=+FbZ
-----END PGP SIGNATURE-----
Merge tag 'v5.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Pin-name corrections for Veyron-Fievel, bluetooth for a number of veyron boards and
additional operating points for rk3288-tinker.
* tag 'v5.6-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Use ABI name for recovery mode pin on veyron fievel/tiger
ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
ARM: dts: rockchip: Add missing cpu operating points for rk3288-tinker
ARM: dts: rockchip: Add brcm bluetooth for rk3288-veyron
Link: https://lore.kernel.org/r/8215452.dU6eVM2tAM@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
This enables the driver for STM32 PWR regulators found on stm32mp1.
Link: https://lore.kernel.org/r/20200109125531.13610-1-alexandre.torgue@st.com
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
----------
MPU part:
-Add PWM support on DK2 board.
-Add counter support to STM32 timers.
-Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is
connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO
extension connector on EV1 & DKx boards.
-Add ADC support on ED1 board.
-Update devicetree files split to better fit to STM32MP15 SOC & boards
diversity.
-Fix issues seen during YAML validation.
-Enable Ethernet (MAC) TX clock gating during low-power mode.
-Enable USB OTG HS support on DKx boards.
-Enable USB Host EHCI on DKx boards.
MCU part:
-Fix issues seen during YAML validation.
-----BEGIN PGP SIGNATURE-----
iQJMBAABCgA2FiEEctl9+nxzUSUqdELdf5rJavIecIUFAl4XFegYHGFsZXhhbmRy
ZS50b3JndWVAc3QuY29tAAoJEH+ayWryHnCFlvQP/RtwRkAPRWd5HHJraAzEj4gJ
vx5Hcm8TW4Fsu1oQnOPGHBNUJcoj5QvaCKhyqBP/gaffDnzJz4GZsaAGZ0FyQJd7
7IWqWOp2Ek2d5bklpLwmn4KU/5ZAqWTKOL1hYoEAvkXHdmxzcQi7pZOrvCG75GGs
lsqabxtx0S3NCCmVHy/CsmK2qkAxbASUG2oAn3pMIncUxdUyq2u97qhJB0zjM4TL
wE8nXNDPZk4P2ePi675PNo/nVP1WTbFHReHd+SCtjuKgQGFKIpnp3pNSP4jIrN+e
e2Wcb+5zQ10ZGntDDAwN+Ig+Nv7hOMLdbBB29kmRYoD4szFcYvjt+kdnXms/MWw8
vwBW6h6YLQ56zzhmcvD8vIwo5jI3l8jO7Gxk4OlK2tsyR+4HXpntkYuq2jOuVqoF
UuTrL4hMSoXrUOX+lfaGFC6x0NmblE+NWqbXEWfQ+mqb42z69O1d6Ws2vcl3CgWc
yUpCMOPkzb6ZIzc77+884COneZKqxRtpjNE7vaIUBEzVdxF6IIyaABBhBNbM3SE2
R/ibKOVh1OWpaYIi2qK7jhUMb5WjVt1jTCDVQmB1sYXzfbA2bzzc3iRVAwd1Oioc
W/wn7G3kh4PcwM8QHlbtuJwa5j/BBF4CNAk+pTXuVKX0eBgfgxGOE+PLTUowH1HA
iYXi2dMogCnXHxDvIBtX
=ch11
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.6, round 1
Highlights:
----------
MPU part:
-Add PWM support on DK2 board.
-Add counter support to STM32 timers.
-Add support of SDMMC 2&3 instances based on "arm,pl18x". SDMMC2 is
connected to eMMC on ED1 board. SDMMC3 is connected to the GPIO
extension connector on EV1 & DKx boards.
-Add ADC support on ED1 board.
-Update devicetree files split to better fit to STM32MP15 SOC & boards
diversity.
-Fix issues seen during YAML validation.
-Enable Ethernet (MAC) TX clock gating during low-power mode.
-Enable USB OTG HS support on DKx boards.
-Enable USB Host EHCI on DKx boards.
MCU part:
-Fix issues seen during YAML validation.
* tag 'stm32-dt-for-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (37 commits)
ARM: dts: stm32: Add power-supply for RGB panel on stm32429i-eval
ARM: dts: stm32: Add power-supply for DSI panel on stm32f469-disco
ARM: dts: stm32: change nvmem node name on stm32mp1
ARM: dts: stm32: change nvmem node name on stm32f429
ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15
ARM: dts: stm32: fix dma controller node name on stm32mp157c
ARM: dts: stm32: fix dma controller node name on stm32f743
ARM: dts: stm32: fix dma controller node name on stm32f746
ARM: dts: stm32: add phy-names to usbotg_hs on stm32mp157c-ev1
ARM: dts: stm32: enable USB OTG HS on stm32mp15 DKx boards
ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp15 DKx
ARM: dts: stm32: enable USBPHYC on stm32mp15 DKx boards
ARM: dts: stm32: remove useless clock-names from RTC node on stm32f746
ARM: dts: stm32: remove useless clock-names from RTC node on stm32f429
ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15
ARM: dts: stm32: adjust slew rate for Ethernet on stm32mp15
ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernet
ARM: dts: stm32: remove "@" and "_" from stm32f7 pinmux groups
ARM: dts: stm32: remove "@" and "_" from stm32f4 pinmux groups
ARM: dts: stm32: Adapt STM32MP157C ED1 board to STM32 DT diversity
...
Link: https://lore.kernel.org/r/39df1dee-3c9f-cd35-bc55-a71223e07100@st.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add remote control map name of the IR device for the hi3798cv200 poplar board
- Correct the PCIe bus range setting for the hi3798cv200
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJeFcMZAAoJEAvIV27ZiWZcDzQQAJw7D30WMPFlRhd8Ah8GYDdN
5FdmmAK65W7VOZHETBCgPyIXWIiiMUxWKzEgTdinqcaXa0pCfsmb/cUIeYw4cd1B
JjntX1j901sZwxd9BAam9WI1OuXBpSXFAALIdkvNCBln5I6L7JOEUxbG3YxVjHWo
q5mf/64ZOKmCuPYQrFKxQI5LnI8aHt05Nf67pzC5UM0fysCn2jetane+rX072LQ2
5EiGgz5b7eYi0VswKyjbnptJSrfTTGGMhRM/zdwLxcw9jtfh8Hqnmme94RrbArlu
K1Cr2sKimNbwkrwYhdElkaalDDx5BwDBJs0eiGZ9w1qNZP1SZ/eIK11LPDxt39Yh
W1kAL9gB9+Xaz0eU9NghP73bTQaYbiDWs6jdRcBtYV33mPjNifFQRwpWgFt2/zJ2
kNUZhTiV+HCtLJZFDAMDRRl2/zbmgKkoN0GL4Qkk+jx02QD+FLntKXoEDJ48xsHc
6TrfJ7uvPhON2NTHpRntfkD/o7sLXMTxAolldObS+owJ3uAp+Mi9p6GfzoPOfNsg
Sxrh/MyymPKqYdPwoR0zEAc8SXYObJRfrx7dIsU6S+wysLx9NzaPUhm/QKNAODqL
fEJxKGqDZ8BojzOsS49zfVvNcCFPRntL8f3KYKQidjPKg8pCKh9xZQb18N3U7yaP
z3cp3irAMvO0TnzmWgyO
=+4YO
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-5.6' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for 5.6
- Add remote control map name of the IR device for the hi3798cv200 poplar board
- Correct the PCIe bus range setting for the hi3798cv200
* tag 'hisi-arm64-dt-for-5.6' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi3798cv200: correct PCIe 'bus-range' setting
arm64: dts: hi3798cv200-poplar: add linux,rc-map-name for IR
Link: https://lore.kernel.org/r/5E169EDE.8020809@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
changes for 5.6, please pull the following:
- Justin adds an entry for BCM7216's debug UART to support DEBUG_LL
- Florian adds a select ARM_AMBA to support the ARM PL011 UART/console
which is required on BCM7211
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl4WKG8ACgkQh9CWnEQH
BwTZug/8CDl9acI49fAWuKRNfd2InZQnwtvmdb5+kwYAtedkY/hmUodyDPoTqr9C
vQ/uzjXPRqKsr9TysK+ubZQomeqBdb4madmGoxqPE9Fl2yZwjnon9PE5Evqvk1b9
DxCBvrnP3/YMEFlGxebL5MORf8TPq+IKzA8Klzcs0ED3E6F2c8xG4ODFjXK7GSzf
Oz9+MropwWw7+bTN/VlOjL2x90b5fZM7chztC9zwBJGym85oqZnY5HvwLOZuysYp
5AsENirqgMuisM7EIy4DXwJFC15W4YIDTK/B+iKyapgyeYcrJmpQmsGePYY2Rtrs
tFd91RX5Wsg5RqCmFKgb2qa8QwtVOqARFoSfAOBU4Gx+ezIyg0hchgfhT9Mk2jF8
luM9ts99sxyUrS1yXv1MunXBmuXl+rMho3Su3vuAJNcYTW0b3ebE+UTxUM+oBu20
vPVVwLzUglS4siSi/Q09ar+GB4U8pn2y0k0reZuFUo8VBxjFIyFEIF9PUqgaXgtn
RKJto4YpDcTByhODYnDkLdzlPMC3vyMG+efgEj3YpWrfXxIx3L3kRT8dAEtU6zs+
8pD+OBxdgGfgwGCHU4AtpaANriaLXlGx+kMZiqXQYidHGOUtDS3rKkVkcVrhoJCs
GB7RHFABQrUFq+F72TxprxaXJ1a7EYmIeK8SYm6DvBXBYee63u4=
=yt4p
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.6/soc' of https://github.com/Broadcom/stblinux into arm/soc
This pull request contains Broadcom ARM-based SoCs Kconfig/machine
changes for 5.6, please pull the following:
- Justin adds an entry for BCM7216's debug UART to support DEBUG_LL
- Florian adds a select ARM_AMBA to support the ARM PL011 UART/console
which is required on BCM7211
* tag 'arm-soc/for-5.6/soc' of https://github.com/Broadcom/stblinux:
ARM: bcm: Select ARM_AMBA for ARCH_BRCMSTB
ARM: brcmstb: Add debug UART entry for 7216
Link: https://lore.kernel.org/r/20200108191114.15987-3-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
changes for 5.6, please pull the following:
- Florian provides a set of updates to the Bus Interface Unit control to
tune it appropriately for the most recent chips: 7255, 7260, 7216, 7211
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl4WKL8ACgkQh9CWnEQH
BwTxPQ/6A565G6bLrlgZvOHd1NzJ/fPkt17F8UPaVwe9Msk+nK6TJjMSZUqCB8vL
RJiuAIAEdlAQSJzFOVLmaBtrFz/8CWiI1CYqSMhY5Slm81aZmBq9vkLtVQzb1i+G
HaRqGxql4hCI9Cj7gypF17axlF2ItvbOWvuaskS6ueM+uRa6AozjQ39rTekCQwdO
gz2E+T46gIajkXNjtv8mG7wLUgsoLrI1A6oTaCyHeOK6ggOUDEni+Nk3ZR7jwE66
j98984aG3DM7kD9LQIdGnO1HmYKwVc3c+DZKb7E1HkeaLqPy/c4JRM/sLqDRdRjV
7p7dBs5QCz6KB+dVPGGNyEHA3LmDo2v0dihmfFOIF4YhJIujIwBJFF68XMrBRhZb
UdZiUawe0Ri4j7GauXurcqGA7on/kz5eADZZgKK3JpkSHd3M6d3g84SWUKrMAcdT
QRDmV6hZAXALMTlcS49vu5iIAFhjCSabFXqtxa43mvccWbkjhVy/ApYBEsAxyEg2
hM+ECIcJ1MjHmSgNF5zEQyzDZnlAWDYOd1czeJOgJrPwpJECH5KS0QCE29q6JeBg
egBaV6kLATMiBfsihwBfX/7mSq0NXiRePxNb3O7VlKjUoeNFPtQxepAETGnxgOf9
/QIpj0XEFovVKOv4H83tHAMe3MXeqHKFf69nuKm8aZP9rB2N0bs=
=ZiDk
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.6/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom ARM/ARM64/MIPS-based SoCs drivers
changes for 5.6, please pull the following:
- Florian provides a set of updates to the Bus Interface Unit control to
tune it appropriately for the most recent chips: 7255, 7260, 7216, 7211
* tag 'arm-soc/for-5.6/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: brcmstb: biuctrl: Update programming for 7211
soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211
soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216
soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interface
Link: https://lore.kernel.org/r/20200108191114.15987-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
for 5.6, please pull the following:
- Stephan adds support for the HWRNG on 2711 (Raspberry Pi 4) which is
different than the previous Pi chips
- Florian switches the BCM956265HR board to use the hardware I2C
controllers for interfacing with the SFPs
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl4WKTUACgkQh9CWnEQH
BwQ/8Q//dU5IKccRirODFKEZwgjFd70a7tnf5GelqeBA8WqmN3sqGbPHtlJ8ycca
C0ueafIas6zeTheHvbbraRYyHetLOQys++eOBVzp3m9BtyemQPcb1wgbGe2lnwPe
F3eJSq/EvWavauOul/POzv4wJpvoX3D1mI5fIAfg7n4sIYe2UWtVvVIO2V6XaBFG
LCcIxPSxSLC5tVAVFNdvCoBLUv2QrrUQs5OHybZNTRmOabscPZW+wptsIu3Cyzw7
Z4DaBpPTJzhLZu0b88Y5hca7+el3hZ+aCJ3AzjXxrzJjG7gUgNEQXOg2ygXPWETO
vGjc3IrptriHGtHzby/+JWLW4GlGBPvP0+YBD6R+dR74ZFWZp9kPkJjbIzCd0/Tq
ajootPE+P6JlS2fKEWhBZcMpsBsBurBdlhP56DzwCgKkrzQn4CxW9BDcjHJTVE6x
FG8S5pil+PdMTVEm20ZV+ZjkAtdsQ/YakXeuT9l44C9L3jgWw6bz4lB4kgB4acOP
bi6xJpJ1XNxdjsqotLeg7DD5I56c7ZMvAdxo18zEBPxXmvitoUjEQPCYLomvWPhd
l6PGAeNNZAPKKWLP25qRFLTbihlMfBXujE489JbraNLsrSvgwzzxXGykV6cSNUf2
jqeLRghxtZTXnG+BRXXo+aPAfPUK3hHol8Bs1aRyUHV5fZAjly4=
=EguA
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.6/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.6, please pull the following:
- Stephan adds support for the HWRNG on 2711 (Raspberry Pi 4) which is
different than the previous Pi chips
- Florian switches the BCM956265HR board to use the hardware I2C
controllers for interfacing with the SFPs
* tag 'arm-soc/for-5.6/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2711: Enable HWRNG support
ARM: dts: bcm2835: Move rng definition to common location
ARM: dts: NSP: Use hardware I2C for BCM958625HR
Link: https://lore.kernel.org/r/20200108191114.15987-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl4XkqoQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgfPdCACArEwY6eMQspCf9akFXt1splXKKk6eygtZ
vKduoK0A0CGmYF3XGo0umk7KX5b2NZdvFbUiFzBv/zyrBL05yY86KIRUx+qCh8En
HIKDDL8grI4yyJftvcQeLo52B4Jw1SfP91MFSgowmOkTVlqlVwXDpn2cs/ShRD78
Z0fatPZ8XnHeiIpcAcsJLPlZXPDNORPkDv/ePBLepmT5CgQJWsZfeULNK8xP5Z4P
tJLyQPWM2Hz9tOlECVIGwNoIYlchN2erhy35UNstUIkew6MCOM2L4LfkV7jJ1b49
rZ1qlYlq+fVV+Ut+fNAusjK2Nn2Zh4zQ3bRd1qPxmeXS3SUstHJo
=mlvF
-----END PGP SIGNATURE-----
Merge tag 'v5.5-rockchip-dtsfixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
A fix for the Beelink A1 IR receiver setting the correct polarity.
* tag 'v5.5-rockchip-dtsfixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Fix IR on Beelink A1
Link: https://lore.kernel.org/r/2054603.JKFSmqfO19@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix i.MX8MM SDMA1 AHB clock setting to remove a "Timeout waiting for CH0"
error seen with UART1.
- Correct compatible of RV3029 RTC device on imx6q-dhcom board.
- Correct interrupt trigger type for magnetometer on board
imx8mq-librem5-devkit.
- A series from Anson Huang to fix vdd3p0 power supplier for a few NXP
development board.
- Fix imx6q-icore-mipi board to use 1.5 version of i.Core MX6DL, so
that Ethernet interface on the board works properly.
- Fix Toradex Colibri board to get NAND flash support back.
- Fix SGTL5000 VDDIO regulator connection for imx6q-dhcom, which
is connected to PMIC SW2 output rather than a fixed 3V3 rail.
- Fix 'reg' of CPU node on imx7ulp to get rid of a warning given by
kernel.
- Fix endian setting for DCFG on LS1028A SoC, so that register access
of DCFG becomes correct.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl4Xz5gUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM44xgf+J/WZaUY9S9tvl9w9kMdmmB71WSVY
qCgWTS6FUvw7AiJ+4mUzXXTP+Wwb0c1wBtvI4FRk6MhkHEc1nSkhJ5I9++bDD7BV
2ktAIJmC2uSHdazq/wjDMi4T6LGnmRv1xKkEvib2/CBVzET9PoGJY2stS8R0r2xf
WwCvMb0Lc7Twp0/nlY+h8ItHL50ZZuBSqW83P26zQdImHKMwRiAdlFa7eiZu82nV
sPadYbtf07yUfeLpUfYXo/nFZ+Q2c+tJGUNxm0hXGvc+FaWS4MM44luBTN2fpaVl
vAg2LKvdaWGbDZk0Q6WQdMsleDaHs3JdbaNrqBePbYyTnMll8N31ek3PWg==
=Hv2B
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.5, round 2:
- Fix i.MX8MM SDMA1 AHB clock setting to remove a "Timeout waiting for CH0"
error seen with UART1.
- Correct compatible of RV3029 RTC device on imx6q-dhcom board.
- Correct interrupt trigger type for magnetometer on board
imx8mq-librem5-devkit.
- A series from Anson Huang to fix vdd3p0 power supplier for a few NXP
development board.
- Fix imx6q-icore-mipi board to use 1.5 version of i.Core MX6DL, so
that Ethernet interface on the board works properly.
- Fix Toradex Colibri board to get NAND flash support back.
- Fix SGTL5000 VDDIO regulator connection for imx6q-dhcom, which
is connected to PMIC SW2 output rather than a fixed 3V3 rail.
- Fix 'reg' of CPU node on imx7ulp to get rid of a warning given by
kernel.
- Fix endian setting for DCFG on LS1028A SoC, so that register access
of DCFG becomes correct.
* tag 'imx-fixes-5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash support
ARM: dts: imx6sll-evk: Remove incorrect power supply assignment
ARM: dts: imx6sl-evk: Remove incorrect power supply assignment
ARM: dts: imx6sx-sdb: Remove incorrect power supply assignment
ARM: dts: imx6qdl-sabresd: Remove incorrect power supply assignment
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
arm64: dts: imx8mq-librem5-devkit: use correct interrupt for the magnetometer
ARM: dts: imx6q-dhcom: Fix SGTL5000 VDDIO regulator connection
ARM: dts: imx7ulp: fix reg of cpu node
arm64: dts: imx8mm: Change SDMA1 ahb clock for imx8mm
arm64: dts: ls1028a: fix endian setting for dcfg
ARM: dts: imx6q-dhcom: fix rtc compatible
Link: https://lore.kernel.org/r/20200110011836.GW4456@T480
Signed-off-by: Olof Johansson <olof@lixom.net>
Jacob Keller says:
====================
devlink documentation refactor
This series updates the devlink documentation, with a few primary goals
* move all of the devlink documentation into a dedicated subfolder
* convert that documentation to the reStructuredText format
* merge driver-specific documentations into a single file per driver
* add missing documentation, including per-driver and devlink generally
For each driver, I took the time to review the code and add further
documentation on the various features it currently supports. Additionally, I
added new documentation files for some of the features such as
devlink-dpipe, devlink-resource, and devlink-regions.
Note for the region snapshot triggering, I kept that as a separate patch as
that is based on work that has not yet been merged to net-next, and may
change.
I also improved the existing documentation for devlink-info and
devlink-param by adding a bit more of an introduction when converting it to
the rst format.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that devlink regions can be triggered via
DEVLINK_CMD_REGION_TRIGGER, document this in the devlink-region.rst
file.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Primarily based on the DPIPE netdev conference paper, introduce a new
file to document the dpipe interface.
This likely needs further improvement, but is at least a good overall
start.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Take the little bit of documentation for resources from various commit
messages and combine it into a new devlink-resource.rst file.
This could probably be expanded on even further by someone with more
knowledge of how the devlink resources work.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Rename the trap-specific netdevimsim.rst file, and expand it to include
documentation of all the devlink features currently implemented by the
netdevsim driver code.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Cc: Jakub Kicinski <jakub.kicinski@netronome.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The IONIC device driver allocates a devlink and reports versions. Add
documentation for this driver.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Cc: Shannon Nelson <snelson@pensando.io>
Acked-by: Shannon Nelson <snelson@pensandi.io>
Signed-off-by: David S. Miller <davem@davemloft.net>
Also document the regions created by the mlx4 driver. This is currently
the only in-tree driver that creates devlink region snapshots.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Cc: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
