Remove the conditionals and options that are not used by the MSM8996
PCIe PHY device. Hardcode has_lane_rst and has_phy_com_ctrl as this is
the case for this PHY.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-22-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Remove the conditionals and options that are not used by any of PCIe PHY
devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-21-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Remove the conditionals and options that are not used by any of combo
USB+DP PHY devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-20-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop remaining support for PHY types other than USB.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-19-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop remaining support for PHY types other than UFS.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-18-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop remaining support for PHY types other than PCIe.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-17-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop remaining support for PHY types other than PCIe.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-16-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
As we have switched to the new (split) QMP PHY driver, drop the old
monolithic QMP driver source.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-14-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Change all symbol names to start with qcom_qmp_phy_usb_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-12-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Change all symbol names to start with qcom_qmp_phy_ufs_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-11-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Change all symbol names to start with qcom_qmp_phy_pcie_msm8996_ rather
than old qcom_qmp_phy_.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-10-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Change all symbol names to start with qcom_qmp_phy_pcie_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-9-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Change all symbol names to start with qcom_qmp_phy_combo_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-8-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop support for all non-USB+DP compatibles from the new qmp-combo
driver. Currently this will result in duplication (both in terms of code
and in terms of config tables) with USB PHY support. This will be sorted
out later, after fixing the combo PHY init/reinit issues.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop support for all non-USB compatibles from the new qmp-usb driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop support for all non-UFS compatibles from the new qmp-ufs driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-5-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop support for all compatibles from the new qmp-pcie driver except the
qcom,msm8996-qmp-pcie-phy. This PHY differs from the rest of PCIe PHYs,
so it warrants a separate device driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Drop support for all non-PCIe compatibles from the new qmp-pcie driver.
The MSM8996 compat is also removed, it is going to be handled by a
separate driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
In order to split and cleanup the single monstrous QMP PHY driver,
create blind copies of the current file. They will be used for:
- PCIe (and a separate msm8996 PCIe PHY driver)
- UFS
- USB
- Combo DP + USB
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Make sure to disable the pipe clock also if ufs-reset deassertion fails
during power on.
Note that the ufs-reset is asserted in qcom_qmp_phy_com_exit().
Fixes: c9b589791f ("phy: qcom: Utilize UFS reset controller")
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220502133130.4125-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Switch to consistently using the explicit reset-controller API which
makes it clear that the reset controllers are used exclusively by the
PHY driver.
Note that the deprecated of_reset_control_get() and
devm_reset_control_get() are just transitional wrappers for the explicit
API so there's no functional change.
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220427063243.32576-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Make sure to release the lane reset controller in case of a late probe
error (e.g. probe deferral).
Note that due to the reset controller being defined in devicetree in
"lane" child nodes, devm_reset_control_get_exclusive() cannot be used
directly.
Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org # 4.12
Cc: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220427063243.32576-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Make sure to release the pipe clock reference in case of a late probe
error (e.g. probe deferral).
Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org # 4.12
Cc: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220427063243.32576-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Add support for USB3 QMP PHY found in SDX65 platform. SDX65 uses
version 5.0.0 of the QMP PHY IP.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1649740652-17515-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The Qualcomm sc8280xp platform comes with a 5nm femto USB PHY which, in
contrast to previously seen platforms, has the SIDDQ bit in the COMMON0
register default to high.
So make the driver match on the 5nm compatible and make sure to clear
the SIDDQ bit on phy_init.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220225034049.2294207-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Some legacy eDP sinks may not support SSC. The support for SSC is
indicated through an opts flag from the controller driver. This
change will enable SSC only if the sink supports it.
Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20220207161612.REPOST.v1.3.Ie81d594ec2327dae6410db359cc492484bab171f@changeid
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The sc7280 platform supports native eDP controller and PHY.
This change will add support for the eDP PHY on sc7280.
Signed-off-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20220207161612.REPOST.v1.2.Iff75c0ea8499f0baf2aa5800f2c45c4128e2415a@changeid
Signed-off-by: Vinod Koul <vkoul@kernel.org>
- New support:
- Qualcomm eDP PHY driver
- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
- Lan966x ethernet serdes PHY driver
- Support for uniphier NXI & Pro4 SoC
- Qualcomm SM6350 USB2 support
- Amlogic Meson8 HDMI TX PHY driver
- Rockchip rk3568 usb2 support
- Intel Thunder Bay eMMC PHY driver
- Freescale IMX8 PCIe phy driver
- Updates:
- Cadence Sierra driver updates for multilink configurations
- Bcm usb2 updates for Phy reg space
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Merge tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next
Vinod writes:
phy-for-5.17
- New support:
- Qualcomm eDP PHY driver
- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
- Lan966x ethernet serdes PHY driver
- Support for uniphier NXI & Pro4 SoC
- Qualcomm SM6350 USB2 support
- Amlogic Meson8 HDMI TX PHY driver
- Rockchip rk3568 usb2 support
- Intel Thunder Bay eMMC PHY driver
- Freescale IMX8 PCIe phy driver
- Updates:
- Cadence Sierra driver updates for multilink configurations
- Bcm usb2 updates for Phy reg space
* tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits)
phy: cadence: Sierra: Add support for derived reference clock output
dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock
phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
phy: cadence: Sierra: Add support for PHY multilink configurations
phy: cadence: Sierra: Fix to get correct parent for mux clocks
phy: cadence: Sierra: Update single link PCIe register configuration
phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
phy: cadence: Sierra: Add PHY PCS common register configurations
phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
phy: cadence: Sierra: Add support to get SSC type from device tree
dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names
phy: cadence: Sierra: Prepare driver to add support for multilink configurations
phy: cadence: Sierra: Use of_device_get_match_data() to get driver data
phy: mediatek: Fix missing check in mtk_mipi_tx_probe
phy: uniphier-usb3ss: fix unintended writing zeros to PHY register
phy: phy-mtk-tphy: use new io helpers to access register
phy: phy-mtk-xsphy: use new io helpers to access register
phy: mediatek: add helpers to update bits of registers
...
There are two different PCIe PHYs on SM8450, one having one lane (v5)
and another with two lanes (v5.20). This commit adds support for the
second PCIe phy.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211218141754.503661-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
There are two different PCIe PHYs on SM8450, one having one lane (v5)
and another with two lanes (v5.20). This commit adds support for the
first PCIe phy only, support for the second PCIe PHY is coming in next
commits.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211214225846.2043361-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Add support for the USB DP & UNI PHYs found on SM8450. This is same as
the phy version used on SM8350 and sequences turned out to be same, so
use the same table from SM8350 for this as well.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213131450.535775-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Use struct_size() to get the accurate size of `clk_hw_onecell_data`
with a variable size array, instead of sizeof(data) to get the size
of a pointer.
Suggested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com>
Fixes: f199223cb4 ("phy: qcom: Introduce new eDP PHY driver")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209032114.9416-1-guozhengkui@vivo.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
SM8450 UFS seems to use same sequence as SM8350, so reuse the sequence
from SM8450. Add the new clock list for this phy and the new compatible
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Co-developed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
Link: https://lore.kernel.org/r/20211201074456.3969849-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Many recent Qualcomm platforms comes with native DP and eDP support.
This consists of a controller in the MDSS and a QMP-like PHY.
While similar to the well known QMP block, the eDP PHY only has TX lanes
and the programming sequences are slightly different. Rather than
continuing the trend of parameterize the QMP driver to pieces, this
introduces the support as a new driver.
The registration of link and pixel clocks are borrowed from the QMP
driver. The non-DP link frequencies are omitted for now.
The eDP PHY is very similar to the dedicated (non-USB) DP PHY, but only
the prior is supported for now.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20211103234410.1352424-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The functions are documented but there were style issues, so fix
the style and add missing description for phy_dwc3
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:130:
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:174:
drivers/phy/qualcomm/phy-qcom-ipq806x-usb.c:212: warning:
This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel-doc.rst
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120061531.410771-1-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The comment is not kernel-doc one and starts with /**, so fix that.
drivers/phy/qualcomm/phy-qcom-usb-hsic.c:3: warning:
This comment starts with '/**', but isn't a kernel-doc comment.
Refer Documentation/doc-guide/kernel-doc.rst
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211116103951.34482-4-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
dp-* members were added to qmp_phy_combo_cfg but documentation was
missed, so add that.
drivers/phy/qualcomm/phy-qcom-qmp.c:2995: warning: Function parameter or member 'dp_aux_cfg' not described in 'qmp_phy'
drivers/phy/qualcomm/phy-qcom-qmp.c:2995: warning: Function parameter or member 'dp_opts' not described in 'qmp_phy'
drivers/phy/qualcomm/phy-qcom-qmp.c:2995: warning: Function parameter or member 'dp_clks' not described in 'qmp_phy'
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211116103951.34482-3-vkoul@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The FSEL_MASK which selects the refclock is defined incorrectly.
It should be [4:6] not [5:7]. Due to this incorrect definition, the BIT(7)
in USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0 is reset which keeps PHY analog
blocks ON during suspend.
Fix this issue by correctly defining the FSEL_MASK.
Fixes: 51e8114f80 ("phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs")
Signed-off-by: Sandeep Maheswaram <quic_c_sanm@quicinc.com>
Link: https://lore.kernel.org/r/1635135575-5668-1-git-send-email-quic_c_sanm@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Commit f839f14e24 ("phy: qcom-qmp: Add sc8180x PCIe support") added
SC8180X PCIe tables, but used sm8250_qmp_pcie_serdes_tbl as a serdes
table because of the copy paste error. Commit bfccd9a71a ("phy:
qcom-qmp: Fix sc8180x PCIe definition") corrected part of this mistake
by pointing serdes_tbl to sc8180x_qmp_pcie_serdes_tbl, however the
serdes_tbl_num field was not updated to use sc8180x table. So let's now
fix the serdes_tbl_num field too.
Fixes: bfccd9a71a ("phy: qcom-qmp: Fix sc8180x PCIe definition")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211020155604.1374530-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
