Commit graph

737516 commits

Author SHA1 Message Date
Daniel Borkmann
1d621674d9 bpf: xor of a/x in cbpf can be done in 32 bit alu
Very minor optimization; saves 1 byte per program in x86_64
JIT in cBPF prologue.

Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2018-01-26 16:42:05 -08:00
Stephen Boyd
0003046477 Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-next
* clk-iproc:
  clk: iproc: Minor tidy up of iproc pll data structures
  clk: iproc: Allow plls to do minor rate changes without reset
  clk: iproc: Fix error in the pll post divider rate calculation
  clk: iproc: Allow iproc pll to runtime calculate vco parameters

* clk-mvebu:
  clk: mvebu: armada-37xx-periph: Use PTR_ERR_OR_ZERO()

* clk-qcom-a53:
  clk: qcom: Add APCS clock controller support
  clk: qcom: Add regmap mux-div clocks support
  clk: qcom: Add A53 PLL support
2018-01-26 16:41:58 -08:00
Stephen Boyd
a2c09c12d4 Merge branches 'clk-at91', 'clk-imx7ulp', 'clk-axigen', 'clk-si5351' and 'clk-pxa' into clk-next
* clk-at91:
  clk: at91: pmc: Support backup for programmable clocks
  clk: at91: pmc: Save SCSR during suspend
  clk: at91: pmc: Wait for clocks when resuming

* clk-imx7ulp:
  clk: Don't touch hardware when reparenting during registration

* clk-axigen:
  clk: axi-clkgen: Round closest in round_rate() and recalc_rate()
  clk: axi-clkgen: Correctly handle nocount bit in recalc_rate()

* clk-si5351:
  clk: si5351: _si5351_clkout_reset_pll() can be static
  clk: si5351: Do not enable parent clocks on probe
  clk: si5351: Rename internal plls to avoid name collisions
  clk: si5351: Apply PLL soft reset before enabling the outputs
  clk: si5351: Add DT property to enable PLL reset
  clk: si5351: implement remove handler

* clk-pxa:
  clk: pxa: unbreak lookup of CLK_POUT
2018-01-26 16:41:52 -08:00
Stephen Boyd
21170e3bda Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next
* clk-spreadtrum:
  clk: sprd: add clocks support for SC9860
  clk: sprd: Add dt-bindings include file for SC9860
  dt-bindings: Add Spreadtrum clock binding documentation
  clk: sprd: add adjustable pll support
  clk: sprd: add composite clock support
  clk: sprd: add divider clock support
  clk: sprd: add mux clock support
  clk: sprd: add gate clock support
  clk: sprd: Add common infrastructure
  clk: move clock common macros out from vendor directories

* clk-mvebu-dvfs:
  clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks
  clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS
  clk: mvebu: armada-37xx-periph: cosmetic changes

* clk-qoriq:
  clk: qoriq: add more divider clocks support

* clk-imx:
  clk: imx51: uart4, uart5 gates only exist on imx50, imx53

* clk-qcom-ipq8074:
  clk: qcom: ipq8074: add misc resets for PCIE and NSS
  dt-bindings: clock: qcom: add misc resets for PCIE and NSS
  clk: qcom: ipq8074: add GP and Crypto clocks
  clk: qcom: ipq8074: add NSS ethernet port clocks
  clk: qcom: ipq8074: add NSS clocks
  clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
  clk: qcom: ipq8074: add remaining PLL’s
  dt-bindings: clock: qcom: add remaining clocks for IPQ8074
  clk: qcom: ipq8074: fix missing GPLL0 divider width
  clk: qcom: add parent map for regmap mux
  clk: qcom: add read-only divider operations
2018-01-26 16:41:47 -08:00
Stephen Boyd
74b48999b1 Merge branches 'clk-qcom-alpha-pll', 'clk-check-ops-ptr', 'clk-protect-rate' and 'clk-omap' into clk-next
* clk-qcom-alpha-pll:
  clk: qcom: add read-only alpha pll post divider operations
  clk: qcom: support for 2 bit PLL post divider
  clk: qcom: support Brammo type Alpha PLL
  clk: qcom: support Huayra type Alpha PLL
  clk: qcom: support for dynamic updating the PLL
  clk: qcom: support for alpha mode configuration
  clk: qcom: flag for 64 bit CONFIG_CTL
  clk: qcom: fix 16 bit alpha support calculation
  clk: qcom: support for alpha pll properties

* clk-check-ops-ptr:
  clk: check ops pointer on clock register

* clk-protect-rate:
  clk: fix set_rate_range when current rate is out of range
  clk: add clk_rate_exclusive api
  clk: cosmetic changes to clk_summary debugfs entry
  clk: add clock protection mechanism to clk core
  clk: use round rate to bail out early in set_rate
  clk: rework calls to round and determine rate callbacks
  clk: add clk_core_set_phase_nolock function
  clk: take the prepare lock out of clk_core_set_parent
  clk: fix incorrect usage of ENOSYS

* clk-omap:
  clk: ti: Drop legacy clk-3xxx-legacy code
2018-01-26 16:41:39 -08:00
Benjamin Herrenschmidt
6671507f0f clk: aspeed: Handle inverse polarity of USB port 1 clock gate
The USB port 1 clock gate control has an inversed polarity
from all the other clock gates in the chip. This makes the
aspeed_clk_{enable,disable} functions honor the flag
CLK_GATE_SET_TO_DISABLE and set that flag appropriately
so it's set for all clocks except USB port 1.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-26 16:22:48 -08:00
Wei Yongjun
accf475a5e clk: aspeed: Fix return value check in aspeed_cc_init()
In case of error, the function of_iomap() returns NULL pointer not
ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.

Fixes: a2e230c7b2ea ("clk: Add clock driver for ASPEED BMC SoCs")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-26 16:22:48 -08:00
Joel Stanley
f798983982 clk: aspeed: Add reset controller
There are some resets that are not associated with gates. These are
represented by a reset controller.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-26 16:22:46 -08:00
Joel Stanley
15ed8ce5f8 clk: aspeed: Register gated clocks
The majority of the clocks in the system are gates paired with a reset
controller that holds the IP in reset.

This borrows from clk_hw_register_gate, but registers two 'gates', one
to control the clock enable register and the other to control the reset
IP. This allows us to enforce the ordering:

 1. Place IP in reset
 2. Enable clock
 3. Delay
 4. Release reset

There are some gates that do not have an associated reset; these are
handled by using -1 as the index for the reset.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-26 16:22:45 -08:00
Joel Stanley
98f3118deb clk: aspeed: Add platform driver and register PLLs
This registers a platform driver to set up all of the non-core clocks.

The clocks that have configurable rates are now registered.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-26 16:22:43 -08:00
Joel Stanley
99d01e0ec3 clk: aspeed: Register core clocks
This registers the core clocks; those which are required to calculate
the rate of the timer peripheral so the system can load a clocksource
driver.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-26 16:22:41 -08:00
Joel Stanley
5eda5d79e4 clk: Add clock driver for ASPEED BMC SoCs
This adds the stub of a driver for the ASPEED SoCs. The clocks are
defined and the static registration is set up.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-26 16:22:37 -08:00
Alexander Abrosimov
fe48613878 platform/x86: dell-laptop: Add 2-in-1 devices to the DMI whitelist
SMBIOS 3.0.0 Specification introduced new Chassis Types field values for
2-in-1 devices like tablets, convertibles and detachables. Dell's
Inspiron 2-in-1 and XPS 2-in-1 fall into this category and they have to
be added to the DMI whitelist, so rfkill and backlight can be controlled
for them as for other laptops.

Signed-off-by: Alexander Abrosimov <alexander.n.abrosimov@gmail.com>
Reviewed-by: Mario Limonciello <mario.limonciello@dell.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
2018-01-26 15:41:58 -08:00
Linus Torvalds
c4e0ca7fa2 RISC-V: We have a new mailing list and git repo!
Sorry to send something essentially as late as possible (Friday after an
 rc9), but we managed to get a mailing list for the RISC-V Linux port.
 We've been using patches@groups.riscv.org for a while, but that list has
 some problems (it's Google Groups and it's shared over all RISC-V
 software projects).  The new infaread.org list is much better.   We just
 got it on Wednesday but I used it a bit on Thursday to shake out all the
 configuration problems and it appears to be in working order.
 
 When I updated the mailing list I noticed that the MAINTAINERS file was
 pointing to our github repo, but now that we have a kernel.org repo I'd
 like to point to that instead so I changed that as well.  We'll be
 centralizing all RISC-V Linux related development here as that seems to
 be the saner way to go about it.
 
 I can understand if it's too late to get this into 4.15, but given that
 it's not a code change I was hoping it'd still be OK.  It would be nice
 to have the new mailing list and git repo in the release tarballs so
 when people start to find bugs they'll get to the right place.
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Merge tag 'riscv-for-linus-4.15-maintainers' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux

Pull RISC-V update from Palmer Dabbelt:
 "RISC-V: We have a new mailing list and git repo!

  Sorry to send something essentially as late as possible (Friday after
  an rc9), but we managed to get a mailing list for the RISC-V Linux
  port. We've been using patches@groups.riscv.org for a while, but that
  list has some problems (it's Google Groups and it's shared over all
  RISC-V software projects). The new infaread.org list is much better.
  We just got it on Wednesday but I used it a bit on Thursday to shake
  out all the configuration problems and it appears to be in working
  order.

  When I updated the mailing list I noticed that the MAINTAINERS file
  was pointing to our github repo, but now that we have a kernel.org
  repo I'd like to point to that instead so I changed that as well.
  We'll be centralizing all RISC-V Linux related development here as
  that seems to be the saner way to go about it.

  I can understand if it's too late to get this into 4.15, but given
  that it's not a code change I was hoping it'd still be OK. It would be
  nice to have the new mailing list and git repo in the release tarballs
  so when people start to find bugs they'll get to the right place"

* tag 'riscv-for-linus-4.15-maintainers' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
  Update the RISC-V MAINTAINERS file
2018-01-26 15:10:50 -08:00
Steve French
ab2c643309 update internal version number for cifs.ko
To version 2.11

Signed-off-by: Steve French <smfrench@gmail.com>
2018-01-26 17:03:01 -06:00
Andrés Souto
cd1aca29fa cifs: add .splice_write
add splice_write support in cifs vfs using iter_file_splice_write

Signed-off-by: Andrés Souto <kai670@gmail.com>
Signed-off-by: Steve French <smfrench@gmail.com>
2018-01-26 17:03:01 -06:00
Aurelien Aptel
4a1360d01d CIFS: document tcon/ses/server refcount dance
Signed-off-by: Aurelien Aptel <aaptel@suse.com>
Signed-off-by: Steve French <smfrench@gmail.com>
Reviewed-by: Ronnie Sahlberg <lsahlber@redhat.com>
2018-01-26 17:03:00 -06:00
Steve French
6b314714ff move a few externs to smbdirect.h to eliminate warning
Quiet minor sparse warnings in new SMB3 rdma patch series
("symbol was not declared ...") by moving these externs to smbdirect.h

Signed-off-by: Steve French <smfrench@gmail.com>
Reviewed-by: Ronnie Sahlberg <lsahlber@redhat.com>
2018-01-26 17:03:00 -06:00
Aurelien Aptel
97f4b7276b CIFS: zero sensitive data when freeing
also replaces memset()+kfree() by kzfree().

Signed-off-by: Aurelien Aptel <aaptel@suse.com>
Signed-off-by: Steve French <smfrench@gmail.com>
Reviewed-by: Pavel Shilovsky <pshilov@microsoft.com>
Cc: <stable@vger.kernel.org>
2018-01-26 17:03:00 -06:00
Steve French
2026b06e9c Cleanup some minor endian issues in smb3 rdma
Minor cleanup of some sparse warnings (including a few misc
endian fixes for the new smb3 rdma code)

Signed-off-by: Steve French <smfrench@gmail.com>
Reviewed-by: Ronnie Sahlberg <lsahlber@redhat.com>
2018-01-26 17:03:00 -06:00
Aurelien Aptel
02cf5905e3 CIFS: dump IPC tcon in debug proc file
dump it as first share with an "IPC: " prefix.

Signed-off-by: Aurelien Aptel <aaptel@suse.com>
Signed-off-by: Steve French <smfrench@gmail.com>
Reviewed-by: Pavel Shilovsky <pshilov@microsoft.com>
2018-01-26 17:03:00 -06:00
Aurelien Aptel
63a83b861c CIFS: use tcon_ipc instead of use_ipc parameter of SMB2_ioctl
Since IPC now has a tcon object, the caller can just pass it. This
allows domain-based DFS requests to work with smb2+.

Link: https://bugzilla.samba.org/show_bug.cgi?id=12917
Fixes: 9d49640a21 ("CIFS: implement get_dfs_refer for SMB2+")
Signed-off-by: Aurelien Aptel <aaptel@suse.com>
Signed-off-by: Steve French <smfrench@gmail.com>
Reviewed-by: Pavel Shilovsky <pshilov@microsoft.com>
2018-01-26 17:03:00 -06:00
Aurelien Aptel
b327a717e5 CIFS: make IPC a regular tcon
* Remove ses->ipc_tid.
* Make IPC$ regular tcon.
* Add a direct pointer to it in ses->tcon_ipc.
* Distinguish PIPE tcon from IPC tcon by adding a tcon->pipe flag. All
  IPC tcons are pipes but not all pipes are IPC.
* All TreeConnect functions now cannot take a NULL tcon object.

The IPC tcon has the same lifetime as the session it belongs to. It is
created when the session is created and destroyed when the session is
destroyed.

Since no mounts directly refer to the IPC tcon, its refcount should
always be set to initialisation value (1). Thus we make sure
cifs_put_tcon() skips it.

If the mount request resulting in a new session being created requires
encryption, try to require it too for IPC.

* set SERVER_NAME_LENGTH to serverName actual size

The maximum length of an ipv6 string representation is defined in
INET6_ADDRSTRLEN as 45+1 for null but lets keep what we know works.

Signed-off-by: Aurelien Aptel <aaptel@suse.com>
Signed-off-by: Steve French <smfrench@gmail.com>
Reviewed-by: Pavel Shilovsky <pshilov@microsoft.com>
2018-01-26 17:03:00 -06:00
Mickaël Salaün
c25ef6a5e6 samples/bpf: Partially fixes the bpf.o build
Do not build lib/bpf/bpf.o with this Makefile but use the one from the
library directory.  This avoid making a buggy bpf.o file (e.g. missing
symbols).

This patch is useful if some code (e.g. Landlock tests) needs both the
bpf.o (from tools/lib/bpf) and the bpf_load.o (from samples/bpf).

Signed-off-by: Mickaël Salaün <mic@digikod.net>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2018-01-26 23:57:10 +01:00
Bjorn Helgaas
b604472d6f PCI/DPC: Rename interrupt_event_handler() to dpc_work()
Rename interrupt_event_handler() to dpc_work() so there's more useful
information in stack traces and similar situations.  No functional change
intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Keith Busch <keith.busch@intel.com>
Reviewed-by: Sinan Kaya <okaya@codeaurora.org>
2018-01-26 16:49:41 -06:00
Keith Busch
6b9045b34b PCI/DPC: Fix interrupt message number print
The interrupt message number is the first 5 bits, but the driver was
masking only the first 4 bits.  Fix that by using the existing
define.

Signed-off-by: Keith Busch <keith.busch@intel.com>
[bhelgaas: remove reformatting (done by another patch)]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-01-26 16:49:41 -06:00
Keith Busch
eed85ff4c0 PCI/DPC: Enable DPC only if AER is available
The "Determination of DPC Control" implementation note in PCIe r4.0, sec
6.1.10, recommends the operating system always link DPC control to the
control of AER, as the two functionalities are strongly connected.

To avoid conflicts over whether platform firmware or the OS controls DPC,
enable DPC only if AER is enabled in the OS, and the device's error
handling does not have firmware-first AER handling.

Signed-off-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
2018-01-26 16:49:40 -06:00
Lawrence Brakmo
771fc607e6 bpf: clean up from test_tcpbpf_kern.c
Removed commented lines from test_tcpbpf_kern.c

Fixes: d6d4f60c3a bpf: add selftest for tcpbpf
Signed-off-by: Lawrence Brakmo <brakmo@fb.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
2018-01-26 23:39:05 +01:00
Paweł Jabłoński
1563f2d2e0 i40e: Do not allow use more TC queue pairs than MSI-X vectors exist
This patch suppresses the message about invalid TC mapping and wrong
selected TX queue. The root cause of this bug was setting too many
TC queue pairs on huge multiprocessor machines. When quantity of the
TC queue pairs is exceeding MSI-X vectors count then TX queue number
can be selected beyond actual TX queues amount.

Signed-off-by: Paweł Jabłoński <pawel.jablonski@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:50 -08:00
Alexander Duyck
a3f9fb5ef3 i40e/i40evf: Record ITR register location in the q_vector
The drivers for i40e and i40evf had a reg_idx value stored in the q_vector
that was going completely unused. I can only assume this was copied over
from ixgbe and nobody knew how to use it.

I'm going to make use of the value to avoid having to compute the vector
and thus the register index for multiple paths throughout the drivers.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:46 -08:00
Jacob Keller
40339af33c i40e: fix reported mask for ntuple filters
In commit 36777d9fa2 ("i40e: check current configured input set when
adding ntuple filters") some code was added to report the input set
mask for a given filter when reporting it to the user.

This code is necessary so that the reported filter correctly displays
that it is or is not masking certain fields.

Unfortunately the code was incorrect. Development error accidentally
swapped the mask values for the IPv4 addresses with the L4 port numbers.
The port numbers are only 16bits wide while IPv4 addresses are 32 bits.
Unfortunately we assigned only 16 bits to the IPv4 address masks.
Additionally we assigned 32bit value 0xFFFFFFF to the TCP port numbers.
This second part does not matter as the value would be truncated to
16bits regardless, but it is unnecessary.

Fix the reported masks to properly report that the entire field is
masked.

Fixes: 36777d9fa2 ("i40e: check current configured input set when adding ntuple filters")
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:43 -08:00
Jacob Keller
443ee71ad2 i40e: disallow programming multiple filters with same criteria
Our hardware does not allow situations where two filters might conflict
when matching. Essentially hardware only programs one filter for each
set of matching criteria. We don't support filters with overlapping
input sets, because each flow type can only use a single input set.

Additionally, different flow types will never have overlapping matches,
because of how the hardware parses the flow type before checking
matching criteria.

For this reason, we do not need or use the location number when
programming filters to hardware.

In order to avoid confusing scenarios with filters that match the same
criteria but program the flow to different queues, do not allow multiple
filters that match identical criteria to be programmed.

This ensures that we avoid odd scenarios when deleting filters, and when
programming new filters that match the same criteria.

Instead, users that wish to update the criteria for a filter must use
the same location id, or must delete all the matching filters first.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:40 -08:00
Jacob Keller
02b4016bfe i40e: program fragmented IPv4 filter input set
When implementing support for IP_USER_FLOW filters, we correctly
programmed a filter for both the non fragmented IPv4/Other filter, as
well as the fragmented IPv4 filters. However, we did not properly
program the input set for fragmented IPv4 PCTYPE. This meant that the
filters would almost certainly not match, unless the user specified all
of the flow types.

Add support to program the fragmented IPv4 filter input set. Since we
always program these filters together, we'll assume that the two input
sets must match, and will thus always program the input sets to the same
value.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:36 -08:00
Avinash Dayanand
69399873b6 i40e: Fix kdump failure
kdump fails in the system when used in conjunction with Ethernet driver
X722/X710. This is mainly because when we are resource constrained i.e.
when we have just one online_cpus, we are enabling VMDq and iWARP. It
doesn't make sense to enable them with just one CPU and starve kdump
for lack of IRQs.

So don't enable VMDq or iWARP when we just have a single CPU.

Signed-off-by: Avinash Dayanand <avinash.dayanand@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:33 -08:00
Jeff Kirsher
5056716ca2 i40e: cleanup unnecessary parens
Clean up unnecessary parenthesis.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
2018-01-26 13:23:28 -08:00
Alan Brady
64e1dcbb58 i40e: fix FW_LLDP flag on init
Using ethtool --set-priv-flags disable-fw-lldp <on/off> is persistent
across reboots/reloads so we need some mechanism in the driver to detect
if it's on or off on init so we can set the ethtool private flag
appropriately.  Without this, every time the driver is reloaded the flag
will default to off regardless of whether it's on or off in FW.

We detect this by first attempting to program DCB and if AQ fails
returning I40E_AQ_RC_EPERM, we know that LLDP is disabled in FW.

Signed-off-by: Alan Brady <alan.brady@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:23 -08:00
Dave Ertman
c61c8fe1d5 i40e: Implement an ethtool private flag to stop LLDP in FW
Implement the private flag disable-fw-lldp for ethtool
to disable the processing of LLDP packets by the FW.
This will stop the FW from consuming LLDPDU and cause
them to be sent up the stack.

The FW is also being configured to apply a default DCB
configuration on link up.

Toggling the value of this flag will also cause a PF reset.

Disabling FW DCB will also disable DCBx.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:19 -08:00
Alice Michael
60f481b970 i40e: change flags to use 64 bits
As we have added more flags, we need to now use more
bits and have over flooded the 32 bit size.  So
make it 64.

Also change all the existing bits to unsigned long long
bits.

Signed-off-by: Alice Michael <alice.michael@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:15 -08:00
Upasana Menon
b6a02a6fbf i40e: Display LLDP information on vSphere Web Client
This patch enables driver to display LLDP information on the vSphere Web
Client with Intel adapters (X710, XL710) and Distributed Virtual Switch.

Signed-off-by: Upasana Menon <upasana.menon@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:11 -08:00
Alexander Duyck
b5b5f37088 i40e/i40evf: Use ring pointers to clean up _set_itr_per_queue
This change cleans up the i40e/i40evf_set_itr_per_queue function by
dropping all the unneeded pointer chases. Instead we can just pull out the
pointers for the Tx and Rx rings and use them throughout the function.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:07 -08:00
Paweł Jabłoński
e0f60a815c i40evf: Allow turning off offloads when the VF has VLAN set
This patch adds back the capability to turn off offloads when VF has
VLAN set. The commit 0a3b4f702f ("i40evf: enable support for VF VLAN
tag stripping control") adds the i40evf_set_features function and
changes the 'turn off' flow for offloads. This patch adds that
capability back by moving checking the VLAN option for VF to the
next statement.

Signed-off-by: Paweł Jabłoński <pawel.jablonski@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:04 -08:00
Patryk Małek
ca6e1d0abe i40e: Fix for adding multiple ethtool filters on the same location
This patch reorders i40e_add_del_fdir and i40e_update_ethtool_fdir_entry
calls so that we first remove an already existing filter (inside
i40e_update_ethtool_fdir_entry using i40e_add_del_fdir) and then
we add a new one with i40e_add_del_fdir.
After applying this patch, creating multiple identical filters (with
the same location) one after another doesn't revert their behavior
but behaves correctly.

Signed-off-by: Patryk Małek <patryk.malek@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:23:00 -08:00
Michal Kosiarz
f34e308b67 i40e: Add returning AQ critical error to SW
The FW has the ability to return a critical error on every AQ command.
When this critical error occurs then we need to send the correct response
to the caller.

Signed-off-by: Michal Kosiarz <michal.kosiarz@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 13:22:56 -08:00
Corentin Labbe
796baeeef8 block: remove smart1,2.h
smart1,2.h is unused since commit d436641439 ("cpqarray: remove it from the kernel")
Remove it from tree.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-01-26 13:23:35 -07:00
Simon Shields
72b0c0cf97 Input: mms114 - add support for mms152
MMS152 has no configuration registers, but the packet format used in
interrupts is identical to mms114.

Signed-off-by: Simon Shields <simon@lineageos.org>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2018-01-26 11:27:45 -08:00
Simon Shields
5b0d0033f3 Input: mms114 - drop platform data and use generic APIs
The MMS114 platform data has no in-tree users, so drop it.

Switch to using the standard touchscreen properties via
touchscreen_parse_properties(), and move the old DT parsing code
to use device_property_*() APIs.

Finally, use touchscreen_report_pos to report x/y coordinates
and drop the custom x/y inversion code.

Signed-off-by: Simon Shields <simon@lineageos.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2018-01-26 11:27:23 -08:00
Dmitry Torokhov
477baf7e9a Input: mms114 - mark as direct input device
mms14 is a touchscreen and thus a direct input device; let's mark it
as such. This also allows us to drop some initialization code as
input_init_mt_slots() will do that for us.

Also add error handling for input_mt_init_slots().

Reviewed-by: Simon Shields <simon@lineageos.org>
Tested-by: Simon Shields <simon@lineageos.org>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2018-01-26 11:27:18 -08:00
Dmitry Torokhov
5e703b8834 Input: mms114 - do not clobber interrupt trigger
Rely on the platform (device tree, ACPI, etc) to properly configure
interrupt trigger/polarity instead of hardcoding the falling edge.

Reviewed-by: Simon Shields <simon@lineageos.org>
Tested-by: Simon Shields <simon@lineageos.org>
Reviewed-by: Andi Shyti <andi.shyti@samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2018-01-26 11:27:14 -08:00
Emil Tantilov
2bafa8fac1 ixgbe: don't set RXDCTL.RLPML for 82599
commit 2de6aa3a66 ("ixgbe: Add support for padding packet")

Uses RXDCTL.RLPML to limit the maximum frame size on Rx when using
build_skb. Unfortunately that register does not work on 82599.

Added an explicit check to avoid setting this register on 82599 MAC.

Extended the comment related to the setting of RXDCTL.RLPML to better
explain its purpose.

Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 10:25:35 -08:00
Dan Carpenter
fd492228d4 ixgbe: Fix && vs || typo
"offset" can't be both 0x0 and 0xFFFF so presumably || was intended
instead of &&.  That matches with how this check is done in other
functions.

Fixes: 73834aec71 ("ixgbe: extend firmware version support")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-01-26 10:25:32 -08:00