Minor fixes and additions for 32-bit Tegra SoC device trees.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl5rtt4THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoXD9EAC6NlnVT2PyJloBd41Rw1TlvgSVV7s5
g2DrliQqL6kIi7EvcaV5e+pyT/AR0012qSIOKFgYceO3r8pEdv1BMbxujsLkTTTv
mlut8ZZhKajs2yY0Zm9B4SL6rWXIL6GvO2LA7xwPUzSWG+zJIuupiH2jB9nKE0eo
E9k9woYqhHQrOEq/lWn9c235Y/p/gO9XZKJWHJcXNjeabxkcXG5z/JMO9D3TRf2k
lB9+fH9U9zfXsWCFsrGloXQfRmjcbU0pNus0f7NL0Xf+GnYxogXywreSnYteJGK/
FCtEdyu5Jy03UhUycZlvAT5vsp5gWHwkyqUKoGId515a9lRVuOfpzEhQdQ4ql4z8
eWxN+5hvuX+XXJtBbk5Fal9gZ0+p2kxOSEB1Y8Bb9mGo46ClSzzjTAKTI2VXFkP8
cn9Slgpa4uQHvkUEBnZjPXIb73kZ1sfFQTUUdWOZLG9wHym6Ag2nLtkn6TPkb6X0
kg5fmVV+HbDJagzV5oFDS4fp1KwY6zvBaifAaTTp4cLUSXOeY9IAFQrC1tXM/B8g
Hdicfp/hsOiWNMYRsMEl18C0OqrBT60FgKE5GgIk/rYDW2XHCoWIk1paCSX8Tj2P
tcVAKUMyfPAnYYF7UXnNfawgj/JfK7wWvv6503NJaVN4Rf6QVb02ZD3p7iXSGkYt
guBhloiD4L5iaw==
=qQJM
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.7-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.7-rc1
Minor fixes and additions for 32-bit Tegra SoC device trees.
* tag 'tegra-for-5.7-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Update sound node clocks in device tree
ARM: tegra: Add clock-cells property to PMC
ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl
Link: https://lore.kernel.org/r/20200313165848.2915133-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New IDs are added for clocks that are controlled by the PMC. This
replaces older IDs that were erroneously provided by the clock and reset
controller.
This also adds device tree bindings for XUSB pad controller support on
Tegra194 as well as USB role switching on NVIDIA Tegra SoCs.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl5rs5oTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTKdD/9m2rJ1ekW/7b/LH0vKQaSo/cVcfDfL
OjhnM/B9Wslcfdr55d8fna1vJjhyXJaBTKZAR/RiKGCGPdKE+1mDKcLauAH+2Kmd
HHA0gDcfumv14B5ZNb6NfKTZt+Gk86m6zv5fp0Wo9BN9EpnfbuRjDzsC7PlYHhJ+
ipO4UujgBuDCKXrhkl8OatoMKIaqyYXIJz+JXMFdE4U5HqGbWw1YpgfpSaU5VBMc
LWWTE0qHNut8IxGV0tAm13R+GO1lX24zRScn74zTPfqAS18s0jHkH80pVfIQ5kUp
PZHoiIYEFzL5qD02aT0VoCMPNQ6c/c6KUQVZ8cpSHb4NIFLgPgOhn583YBmeXWa0
uVR0GVJ3Wi6wspnN3kagssZIuX/KV+6zIBsVRPqVDwm/wop4fNmcXazUQ5MijNRF
AqBS9jylC8P401kt1zN/dxrcyQ+E2gRkrQ1wKz/1DVWz9UdzwoV82w7k4etzkcL8
pv8oLFhir//jKFNWa/U9/y65AUmqvBs6d5wbJa17rRHt9y2uMyXrXMgetAlbkMt/
WBEFIcR3F/dDIEU2UrWPCWtRYpbfBwKx8fGFSGEbyEjzYWDnqWscbf/dFKmeA1nK
ATLbQov13qJ9scQXgDIekTXG19kQC/GaKfRofIK0Owg/Kae23McrOtSz6u8U9Nnw
ZNPFxLJLJQ/3ew==
=nBkr
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.7-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.7-rc1
New IDs are added for clocks that are controlled by the PMC. This
replaces older IDs that were erroneously provided by the clock and reset
controller.
This also adds device tree bindings for XUSB pad controller support on
Tegra194 as well as USB role switching on NVIDIA Tegra SoCs.
* tag 'tegra-for-5.7-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
dt-bindings: phy: tegra-xusb: Add usb-role-switch
dt-bindings: phy: tegra: Add Tegra194 support
dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
dt-bindings: tegra: Convert Tegra PMC bindings to YAML
dt-bindings: clock: tegra: Add IDs for OSC clocks
Link: https://lore.kernel.org/r/20200313165848.2915133-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
- Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier
board. It is based on stm32mp157c SoC.
- Add OTG full support on stm32mp15.
- Fix issues seen during yaml validation on stpmic and stmfx.
- Add i2c power/wakeup support on stm32mp15.
- Add card detect on sdcard on stm32mp boards
-----BEGIN PGP SIGNATURE-----
iQJMBAABCgA2FiEEctl9+nxzUSUqdELdf5rJavIecIUFAl5rsncYHGFsZXhhbmRy
ZS50b3JndWVAc3QuY29tAAoJEH+ayWryHnCFr7YP/2zLfZfd7gywA/AvrqeBkd7Y
5GiJ7gQ1RXyAaF0a0kUZLrh2Qx8/sjnIPlyQG63waIS7lrgeVQC6i6TEOjpXNfbn
m6ZhDpdm0J0LCgJSawrYw14YeqRdrkkyr96QuMYZN54E/NaQvPzfkOFLaQB/HREy
+iT1TNs+A3Xtw2zeXh0PCuFRyjg2TvCeae8OV8aa0kqeKzv8aNBw28pV3r0ZkiGT
Cti7E+uxG9S9BsHIr2k9PagGWvYJ4w6fiJVyCd1oG1oPwY1wwhnaijdTJE7H94XO
6wajE9WiVMTKMxvzqH1aZ7CIZiRCHlQpQ/CHfBjY1pcdG+IEh6d4cWamSDCk2BEu
V/flJl70rubbjOMdCnJGqIvUjSaLAm+197MbdIHOJT4SoDhwmWWHVuedZ4wG4k3F
NCNL2el4cmsiSpNZfanvGPd3ZWegy9LoISlUomZtdLFk4vmuJVFM+tYCeSKQyBMb
/kSU08fV2uh8VNXdNZoBEsOpgcw/3xQcPkKzp/q/u4h8FwppsozogfQddiqBQ8JB
an/6r2T/UW/ajPDybeSkV8YVdRq/jdgUaqlQZfIcPyxvsnI36ZQzq0jB8IpRTagZ
dpzbuI3pJQ0FjU5fXrUcoTDGJIrru6CmT6kQIyjxu97Oo7BrscrSZCrj/NWlOEyq
1zmEP/9PL2jXOfVEFHNO
=89XF
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.3, round 1
Highlights:
----------
- Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier
board. It is based on stm32mp157c SoC.
- Add OTG full support on stm32mp15.
- Fix issues seen during yaml validation on stpmic and stmfx.
- Add i2c power/wakeup support on stm32mp15.
- Add card detect on sdcard on stm32mp boards
* tag 'stm32-dt-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits)
ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board
ARM: dts: stm32: Correct stmfx node name on stm32746g-eval board
ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151
ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1
ARM: dts: stm32: add USB OTG pinctrl to stm32mp15
ARM: dts: stm32: add USB OTG full support on stm32mp151
ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node
ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board
...
Link: https://lore.kernel.org/r/ded09d01-df47-9572-4679-34669bff8916@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Document support for the M3ULCB board with R-Car M3-W+.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXmtU+AAKCRCKwlD9ZEnx
cEMUAQC78UEYftqCiIlYrtFX/9vUiVlt4DxkckdgLVZVg9KhywD/W5ZhvfQDJx03
wsAO95zvRsUt/pHmhfhSBWh+FG716gE=
=DYdF
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-bindings-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.7
- Document support for the M3ULCB board with R-Car M3-W+.
* tag 'renesas-dt-bindings-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Add M3ULCB with R-Car M3-W+
Link: https://lore.kernel.org/r/20200313154304.1636-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Thermal support for R-Car M3-W+,
- Support for the M3ULCB board with R-Car M3-W+,
- CPUIdle support for R-Car M3-N and E3,
- Display support for the HiHope RZ/G2M board,
- A minor fix.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXmtWzAAKCRCKwlD9ZEnx
cGR9AP9dB6K8Utcu+oPDbAtPNhQt7OVdsdWP6tqQz19QyD2W4AD+JPXaDrFjLymA
a0VEhXst/5bSqVoi3GydrnEIEVZF+gc=
=oU8J
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM64 DT updates for v5.7 (take two)
- Thermal support for R-Car M3-W+,
- Support for the M3ULCB board with R-Car M3-W+,
- CPUIdle support for R-Car M3-N and E3,
- Display support for the HiHope RZ/G2M board,
- A minor fix.
* tag 'renesas-arm64-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display
arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores
arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores
arm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address
arm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+
arm64: dts: renesas: r8a77961: Add thermal nodes
Link: https://lore.kernel.org/r/20200313154304.1636-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- LCD/touchscreen support for the iwg22d-sodimm board.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXmtV7QAKCRCKwlD9ZEnx
cGL1AQC5+VUSTy4AMFEVxewSo9b9NY591/NT4qy3Dc/80Q40SgD/b1g78jUixCfc
ogKaoo6Jdkc9a281N/5r4hbjn6ovIAM=
=gLXn
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.7 (take two)
- LCD/touchscreen support for the iwg22d-sodimm board.
* tag 'renesas-arm-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: iwg22d-sodimm: Enable touchscreen
ARM: dts: iwg22d-sodimm: Enable LCD panel
Link: https://lore.kernel.org/r/20200313154304.1636-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.7, please pull the following:
- Stefan adds GPIO labels to the Raspberry Pi 4 Model B board DTS
- Nicolas moves the eMMC2 controller into its separate node in order for
platform firmware to perform the necessary "dma-ranges" property
patching based on the chip revision since the eMMC controller has
different addressing constraints.
- Florian convers a whole bunch of Broadcom boards bindings from text to
YAML.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl5pVN8ACgkQh9CWnEQH
BwQlwg//fzXZhHKoymQU03j9bzopDga4mtvCkY7Lhqz3s+6nG7/RrnIyXKsu8gV6
AqYphjJq0MEdgEDa2i4QUXOVnIZSB8qMv2WRMQFQubd/exV/UmY9W9zK/F2sMrxw
Ox/JMYGkeIEdEBfTfWI2ElU8YOvQhyBVghnbTfetJSOGCIv/JmRVvplpM+AzLWNr
Wk3GKp9yG8WL5LGiwLlEJFwIw2rGdMjKMsYwLM8brkczI/4u7ngJTO6/Wd3QNaBq
X7qeY7pS41jZOWTQedftd7Z6ewGmA5lsKqWDV0WosWQKVAUfgJpv34RSeZpP5HUj
rlkViHv+ZIqg32529gOdyMHSID+hLUzSZsQqSvawRBOlQ6UdbOeC8lUaPPFWsmXd
sWqlpoKE7O132ofVl1Uko6yEC2XKKdrW5BA2hxVxI0tMF/jgEQsW/zpXljMOYLpg
m8thlsnwYS2Lzpn4CNIfTXO5Zji5+FGIXYFs9Ah/2149mnZC2oGLcXeUk4/ACDhF
WMLz2jMfT19+tUFuGb84TKnx6ESYPTi7HVadNJOnW+YZuFcpfuRFV0w/LfL3aoR+
lawWDEZVD1veEg+Sz6DyMpuKCZqJJWFV4isrC6Y3wQ+TEed9pY91Ye+NTmI97DBW
UMXQLvbTkinaM1tYhbL31UwXmvdcENUCOIxAu1gx9+xYVUmYSlQ=
=H7v0
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.7, please pull the following:
- Stefan adds GPIO labels to the Raspberry Pi 4 Model B board DTS
- Nicolas moves the eMMC2 controller into its separate node in order for
platform firmware to perform the necessary "dma-ranges" property
patching based on the chip revision since the eMMC controller has
different addressing constraints.
- Florian convers a whole bunch of Broadcom boards bindings from text to
YAML.
* tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux:
dt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg'
dt-bindings: arm: bcm: Convert Vulcan to YAML
dt-bindings: arm: bcm: Convert BCM11351 to YAML
dt-bindings: arm: bcm: Convert BCM4708 to YAML
dt-bindings: arm: bcm: Convert BCM23550 to YAML
dt-bindings: arm: bcm: Convert BCM21664 to YAML
dt-bindings: arm: bcm: Convert Stingray to YAML
dt-bindings: arm: bcm: Convert Northstar 2 to YAML
dt-bindings: arm: bcm: Convert Northstar Plus to YAML
dt-bindings: arm: bcm: Convert Hurricane 2 to YAML
dt-bindings: arm: bcm: Convert Cygnus to YAML
ARM: dts: bcm2711: Move emmc2 into its own bus
ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels
Link: https://lore.kernel.org/r/20200311212012.9418-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Few device tree changes for omaps for v5.7 to configure omap5
AESS module and to add idle_states for am335x and am437x cpuidle.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl5idy0RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNixA//TDh5bpBomdsRr0D7hYFYmgFZK2gk5X9x
4j/b/C+6ZA8MzLfNE+k58eHAiBVSs1BmUMLygW6wLTwwf2n3KmCOt77QGPenXGTt
8KuHceMJXkKH3ZxYRk5+tQFm95l2uvNCXA0aGntx4n5mmeAa+mDUD534PRB1B7gU
DHB0qqwiaCffX+C5sEswe+krl6vzjcDTo4kmETqgSWz/ZjHqdzjIn42wWZO/s2Ct
aYVRP3AttdNRId03+QjZx52m6w6vNmMhtlRTrAvCSVgKpBM5tQpCkxBVA6mLDY3S
Mcmp8B6iL+jEGqdSVTRG+Tzg4Eq76OlTiugKSOtXsMitC8WKGiuT+YXvg8Uwfnjf
UnaEzaBOUF8FAakNAzgbE6I8A8pVgoKJR6I2zvR8ZAE9wUXDxLZQauqvM/MpmQdZ
Rc+ZQx2a4gPWqdKcLGDoqJb2iGDFJ4hJQ27raOX5rGMgKVia6gr8lUDBKJfGXr3c
/Kt65v5tMgWRZrF6OK4uAe2wDqduzNN0fjG228q1/tW3JcpHdsjf5sBfaIr3NvKu
hausfW5O5Y2ge20dIo48keajo4TdMDzaEunCwP/SkNSsY76qTgzKRIey4FEczp2l
Um89SqqgKsAsEcIpR6Vo0IZSj+Yz80zQrOivWTravpid7HzwrPnqWiQhKC1A6lpC
y13PeTX5aw0=
=DwZQ
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.7 merge window
Few device tree changes for omaps for v5.7 to configure omap5
AESS module and to add idle_states for am335x and am437x cpuidle.
* tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am4372: Add idle_states for cpuidle
ARM: dts: am33xx: Add idle_states for cpuidle
ARM: dts: Configure omap5 AESS
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Schema validation for the top level of all ARM reference
designs: Integrator, Versatile, RealView, Juno.
- Clean up some node names in the trees so they pass
validation fine.
- Drop the old text bindings.
- A top level DMA ranges patch from Rob.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl5fvGIACgkQQRCzN7AZ
XXNf7xAAuf9DBhZ544JMn67I4reSltISWeng8TfPjT8ZB+3l8X+G6YEXoBdgd0dl
SYwtJyJ7wOQJk2jCy9L5lOnvF3frD8OIZw/UDAhHno/kn4yrR2/sHjhqSGEpspaL
wZ0LLRe6wnPNBQHgvGVa3T/Tr7nLbu5Gs/Z+LAb1C4V5atj386JLF9OxNcK5xUMx
+abJinQF1kI79N5HgLE+BZ5qNZG4COlcdHZz5im6sBPKF4UDyfHYqUY0FGUIhV4j
3biI1L5w0CWJ498eXOlQ5zMnuUyp17gEgd7MBOOe02LzJOfh6m2qHbOWIe8x22/i
sqs/Q5hwSeKzrKFzwQqgY/i9O/WeIvziMVUAb3FzcuTrXJGKHXpMXkSYhsAv+Yyv
gOkTmsUA4y9Q6LlhGCrZcpKzan7pM1rKtJMK+3yj/GvEookpzFj59LkWFHdsOIJZ
Gp34xT5hO8RKSrrNMX7b92svJtFdWciKWxVPlEK2pdfNam3+B0/nkv2QLDJ8e1t6
IslDcPDiJf7e0xEelG+tpkLpjls/1QSBA+kghZA5L0NL5mbnM9j4/NH7RMChfF/8
zu6VKuQdDNGjpEqocCDy0OlGjD0gNQcHHaCQepqMX6LaEnEoA3zQezjDDRpXg2l+
5ouUsPMtIWIG8lCxhI6XCFpWgmd05zOJRbbuKevoGwIchT1/bMA=
=0W6a
-----END PGP SIGNATURE-----
Merge tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt
Versatile DTS updates for the v5.7 series take one:
- Schema validation for the top level of all ARM reference
designs: Integrator, Versatile, RealView, Juno.
- Clean up some node names in the trees so they pass
validation fine.
- Drop the old text bindings.
- A top level DMA ranges patch from Rob.
* tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM/arm64: dts: Rename SMB bus to just bus
dt-bindings: arm: Drop the non-YAML bindings
dt-bindings: arm: Add Versatile Express and Juno YAML schema
dt-bindings: arm: Add RealView YAML schema
dt-bindings: arm: Add Versatile YAML schema
dt-bindings: arm: Add Integrator YAML schema
ARM: dts: RealView: Fix the name of the SoC node
ARM: dts: Versatile: Use syscon as node name for IB2
ARM: dts: integratorap: Remove top level dma-ranges
Link: https://lore.kernel.org/r/CACRpkdbbniYVnsE-pAmU2qCerswserNgEFtY48XQ+_K+DUNC9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fourth, and last, set of fixes for v5.6. Just two important fixes to
iwlwifi regressions.
iwlwifi
* fix GEO_TX_POWER_LIMIT command on certain devices which caused
firmware to crash during initialisation
* add back device ids for three devices which were accidentally
removed
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJee7S6AAoJEG4XJFUm622bcH4IAICV95Y79p9loKZVwXBrguiK
5D9rBNZcSc0Yo9AwZkhatRAJYiLu19hw2qra3YsQnaWpjESmnZtV6/ZASDcpOGSP
NaI4TMLt57dhnpqhpglvGeM9PlUbaoqX7Sl5LbhnSQoKkk7rppnk90KqbXl7SDba
4eG7+i4iMc69uw4BttVh/lfgAH0YyYpgStWi9ccoQ2ip9SrljFZwmCF7q+3/25OR
Hyty44U90BBrsi+LrRuhutR2LuR+TfXEWmtXWRzOpnwmicY8sCpeEVCMeeVy59TR
y66sjlhM5w+N1mZbzBrqUZJLdMGInljx4G4DIvvi8jbD6rVLZc8zAeZMLjO24ZM=
=CFbE
-----END PGP SIGNATURE-----
Merge tag 'wireless-drivers-2020-03-25' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers
Kalle Valo says:
====================
wireless-drivers fixes for v5.6
Fourth, and last, set of fixes for v5.6. Just two important fixes to
iwlwifi regressions.
iwlwifi
* fix GEO_TX_POWER_LIMIT command on certain devices which caused
firmware to crash during initialisation
* add back device ids for three devices which were accidentally
removed
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
These changes unify CPU idle support for Tegra20, Tegra30 and Tegra114.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl5rthATHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZsmD/9qN5NeerI3PxQxDXYljyAJdhXwkRrV
Wliy4BXjMFxwfML1EH2oPBLk+UA8LLhzA3Ai+6qFj/6H+RQcOywdOgyg5913beW9
q0WmPHyaQig7cAAOkI6ke6md0oLmx4nMrS8oX5Ofjd3tfUqo+Y9JT/cvqeiDI7UH
c6/HJy9RaUctDvd7KYCSiH74ZRVjYP0xnbc+Q/uue6Nl0Ka/tbxEFmk/Q6br2K0c
SJXqOroRXongO8WG1w+fQ/MpzluWXArTJmQR8lB38slYhUDa1wL4QRerwtInlffJ
hp/jp1xQ4zx7j5xnvMulj6jC25Pzm69SMpTT4amY+bs33KIqmrdeaCAGmG/70ZoS
dGbdKyiAgpGl8jDbt7wVo+WtQRPGwoJa+Xh+z6H137R6ed59DYgv2f+t5GHwHq9J
iQvWcI9V6SjS9G5caPCE8X5ZdLgCzD4w1Q10vxLTryFuaUJog+13BtfmI34RJAR7
YZ5V9CI+eooHcwiit0aL2IrgA6c9UVrpNR15dxig7KMkJgeY1mngniJ8zqNdjMN8
ZvmaXCNuJdVTAX7QSB0PA1Wg8XI5KN7OzTyE26C3o4x1vI2Z62SPDkaZRsTPJR/R
jRixb5bYmdIWa3HeVkeDziAjP/lx5e59j35QpHPo2XQo5wz82Vc4PEIqqsgDp4KH
yiVXVaXys3n3Ug==
=u9vo
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.7-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc
cpuidle: tegra: Changes for v5.7-rc1
These changes unify CPU idle support for Tegra20, Tegra30 and Tegra114.
* tag 'tegra-for-5.7-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
cpuidle: tegra: Disable CC6 state if LP2 unavailable
cpuidle: tegra: Squash Tegra114 driver into the common driver
cpuidle: tegra: Squash Tegra30 driver into the common driver
cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
Link: https://lore.kernel.org/r/20200313165848.2915133-9-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Change firmware dependency to be able to disable it
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXnomBgAKCRDKSWXLKUoM
IQq7AKCcRD2VRC9nR0HpfCF4ENK7vGLP2QCfU/ugwT5y9l0wjkzL1nMEHCV//xs=
=PM+u
-----END PGP SIGNATURE-----
Merge tag 'zynqmp-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx into arm/soc
arm64: soc: ZynqMP SoC changes for v5.7
- Change firmware dependency to be able to disable it
* tag 'zynqmp-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx:
arm64: zynqmp: Make zynqmp_firmware driver optional
include: linux: firmware: Correct config dependency of zynqmp_eemi_ops
Link: https://lore.kernel.org/r/ecef6de5-8318-9f88-db8c-7c33fe44901f@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- add support for MT6779 SoC
cmdq-helper:
- set knows_txdone in mailbox client
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl50pW8XHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH67Aw/+IZlwFvspiqJTCujacHquxvIb
6BfgGs0v1Byv2cySLVianZbtc1mvWk8gS9ODdtcRvDTE3aQsyDm4Qmn8cWxa/VsA
+uUf1m7aS9ec5MQUN7TOyX44WyePw/gndtcnvlX0gsB9fl1DnYoEcSokXxxpARvg
RYuxG0Isyw3cr8ybWf4BgO2zsrfFKZ+z2YWp8aY74/V5JZdTUbHBQ2XxfInyXka8
VUaGwIH7QfYJUNa6m6DmEsFro47Gy1Jq4DZAz6pIae5lIAfd53G9KWlfwz4VI06v
l41/HYKWEd/qRVnBPY7K6wOTl7aSAWWQCdaWaFVqu9m7C3PxLgNv0txgubAb7cI5
uUvBGh+mgdfJYS9rlfzWvRFFpGXpsaO8JXxo5+sqin9xy8tP3GiYvDlsXaYXLFVk
KpLbGdTmd2wQOQEW4pubck4gzSBwgCP51R5L9iU1SiVT3Tod7RriEUtU+noTQUGA
CeEwUhnnsSDzKv/5iEhDXAFW2Va6Q7YaEvRzw4PuneF56XF2SClGWmpe4PLtJuw7
Szwo3fiq+NqbKJoa5KYQvbheiXZN8fADc1o7JkUTp/hvHBcixjUV3kCqGeJ2xR/z
+MU4kX1FCgugBlMZzOA7l6rHVJaK0jjItqFNy8Q4IqQGZ2FyJPl46XPFV1W1h23L
F0RNdxarsXGbXN63V3c=
=+JxZ
-----END PGP SIGNATURE-----
Merge tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/soc
pmic wrapper:
- add support for MT6779 SoC
cmdq-helper:
- set knows_txdone in mailbox client
* tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pwrap: add support for MT6359 PMIC
soc: mediatek: pwrap: add pwrap driver for MT6779 SoCs
dt-bindings: pwrap: mediatek: add pwrap support for MT6779
soc: mediatek: knows_txdone needs to be set in Mediatek CMDQ helper
Link: https://lore.kernel.org/r/61165e91-f211-ad37-a81c-cbf3ff69fa1b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A number of cleanups from Anson Huang to remove unneeded includes,
drop unnecessary newlines and base check etc.
- Apply Cortex-A9 specific errata only to Cortex-A9 based i.MX SoCs
and avoid impacting Cortex-A7 based designs.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl5xhl4UHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM7aNAf8Dw5H4lisNmKOrc91eUC76ML8FtlH
ZcBNqcw5ZWm9994wFYMlca6Wk8JjTlmUJcWeZg5x4gUe/CCzntL2NHvBBXnCDWNg
SRn74nREYJ/5LSIC63VyaujdRUVoP+krW3wjYHrPixbGaEu2Bowcy10VjEubINB1
ayw2fr3oFjkTLine7TDMeX6+i2PmGN+S0XgNGpeu0JRp2MuCWpKNqrTBoihL+ehz
uYKRXLgyUQccRuPOOkPadKNbBmFMGv2qpiYa+v205m0zt5xQMqJutSqhMI4E302j
rg4uYXW5zGWZHLPn7MdN+iXFtk17Pu1tVlAs4BpcegP7MksagUMsm68c3w==
=SAzS
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc
i.MX SoC changes for 5.7:
- A number of cleanups from Anson Huang to remove unneeded includes,
drop unnecessary newlines and base check etc.
- Apply Cortex-A9 specific errata only to Cortex-A9 based i.MX SoCs
and avoid impacting Cortex-A7 based designs.
* tag 'imx-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Drop unnecessary src_base check
ARM: imx: Remove unnecessary blank lines
ARM: imx: Add missing of_node_put()
ARM: imx: Remove unused include of linux/of.h on mach-imx6sl.c
ARM: imx: Remove unused includes on mach-imx6q.c
ARM: imx: Remove unused include of linux/irqchip/arm-gic.h
ARM: imx: limit errata selection to Cortex-A9 based designs
Link: https://lore.kernel.org/r/20200318051918.32579-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Various cleanup:
On Orion5x:
- Drop unneeded select of PCI_DOMAINS_GENERIC
- Remove unneeded variable ret
- Replace setup_irq() by request_irq()
On Dove: Mark dove_io_desc as __maybe_unused
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXm36WAAKCRALBhiOFHI7
1e+ZAKCjvZt+schQCejEfjR1YIIjcf1YvACfTOE1sQWHU+3iugTSJv/mTW+QRj8=
=jF5n
-----END PGP SIGNATURE-----
Merge tag 'mvebu-arm-5.7-1' of git://git.infradead.org/linux-mvebu into arm/soc
mvebu arm for 5.6 (part 1)
Various cleanup:
On Orion5x:
- Drop unneeded select of PCI_DOMAINS_GENERIC
- Remove unneeded variable ret
- Replace setup_irq() by request_irq()
On Dove: Mark dove_io_desc as __maybe_unused
* tag 'mvebu-arm-5.7-1' of git://git.infradead.org/linux-mvebu:
arm: mach-dove: Mark dove_io_desc as __maybe_unused
ARM: orion: replace setup_irq() by request_irq()
ARM: orion5x: ts78xx: Remove unneeded variable ret
ARM: orion5x: Drop unneeded select of PCI_DOMAINS_GENERIC
Link: https://lore.kernel.org/r/87eetux7um.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These patches a preparatory work to move the CPU idle drivers into
drivers/cpuidle.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl5rtDcTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoYSRD/98HactRMwJb41LlLpaUeNT/xTQk/DB
k+Y0NkeiT34QE7c+UcSeDXecnipuajB3kB7kd64lSS0DI0V+KZam1qZUsMTqG7D3
ZLvzIJXykoGf19QC89nN7TnRy/jjRO8ITk/dFjj1BwSP0M1WuWlQAHNXczRyEP77
OLvViPH8YzLkDe2TH8AhbF/zCCnmW9lqCE8oJuQMdMmQo3qOLL6c/CZcxkzo3iVn
rUu1uIgNXiY5fBTgl1woP7mSHgYytjAm4WouSpJRoPAodKqlaI61rb7gwbrav+rQ
2kkORNxOr5Eo36wszxxzknY18PCCjbZtNFrZyAGdmu0IePDdxMiWG2z+30OGESam
qlzia0Yz82pSBBRgxVO03oTpZGh9jxdHoubIRR3UGVAttD8rdC4xjIkxjv+FbPp/
A0yVKqA5GFpftUKOKFoC056nByfH2UE1XrPoPWKuu9+ED5vKh7tC4cMEJhhUOA6N
6+pqE8FsZ0NTjxT7pvrPtvTI9lCVy8UTTWQomnd1HMxT2tJEijq1mTVPrsZISYQq
+DDsww1UpblslFQwZMoGp8D9IXF3VdvmQae/0ko63XUYDw2Nz4gP7yw+mQoDoALP
M9W3FE2XK3u0NsCV76nG1yjJ6CtHgMnZx+DM4VwNZ5m29XUvmdwVwcsv2lrP0TES
HWpsPD3vQdatug==
=nOBN
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.7-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc
ARM: tegra: Core changes for v5.7-rc1
These patches a preparatory work to move the CPU idle drivers into
drivers/cpuidle.
* tag 'tegra-for-5.7-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: cpuidle: Remove unnecessary memory barrier
ARM: tegra: cpuidle: Make abort_flag atomic
ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
ARM: tegra: Make outer_disable() open-coded
ARM: tegra: Rename some of the newly exposed PM functions
ARM: tegra: Expose PM functions required for new cpuidle driver
ARM: tegra: Propagate error from tegra_idle_lp2_last()
ARM: tegra: Change tegra_set_cpu_in_lp2() type to void
ARM: tegra: Remove pen-locking from cpuidle-tegra20
ARM: tegra: Add tegra_pm_park_secondary_cpu()
ARM: tegra: Compile sleep-tegra20/30.S unconditionally
Link: https://lore.kernel.org/r/20200313165848.2915133-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These changes implement various clocks that are controlled by the PMC
and add support for configuring the voltage level of some pins (needed
for example to support high-speed modes on the SD/MMC interfaces).
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl5rtocTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSCxEACJ6z347KCFmlo2j2dy6IPzhwLUNfIu
MN+DxXzvgUPVslfYGp0AG0JCH6OKgFFnOiimJwgJaW573H3YC0+WybZjHZ4BgsJs
xy8x+aoLYikCJAA8A1fc+2F4g98Nw7sYpiRJc8Ry/fZmCsho4XGKEhNS2GqvuWGn
KQwah9M7ZgkJmb1eo4+Sxe7LfLpIBP+mG7nEI8CCr4DD1EF8c00dQ1xTUwQ4SOsU
Trc3Usonkhp7J4Oe82i8f1VqvS6+83+48FVP9PUsaf9LUEKMOhh/Z6XnEAH4ZVlq
q8oSpxY7AE0NrbjsgsN+hNeP9plQCv2XjmjD9xBk6C8y4drP8bMN2BVaRBBjoTHr
5R1br3HIKYNsgLJ7bYM3QvEN5Nk4gdT0wkpKVto12TKxYlxe+JRO5IeyJ17Jv0zH
yxMfyoHtqHgw3+Os3CtfVWgRs8egnN6W59C/vZxT02b7gqb89Ks80N4Y54bQEc1h
xqnT1NlPPvm4XctDzNKUz9EDoEb0KdblK/e9TnqFH9fbqE7QrwoPROSfv2wvXP6p
ej0GN1uIb9LPhTFSHX6Iu1EuAEuSwOFtEK2ZPHK4Ce2al03RQzsPQ/GCGIwxr1cM
+aGuURcAevR7Q8Tn8NB8xkI2l9p2dn3kMAgvqL1gcWi18eTJfRMgjejwcCZQds0C
mWEidGa+jrrNMQ==
=bszz
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc
soc/tegra: Changes for v5.7-rc1
These changes implement various clocks that are controlled by the PMC
and add support for configuring the voltage level of some pins (needed
for example to support high-speed modes on the SD/MMC interfaces).
* tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Cleanup whitespace usage
soc/tegra: pmc: Add pins for Tegra194
soc/tegra: Add support for 32 kHz blink clock
soc/tegra: Add Tegra PMC clocks registration into PMC driver
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
dt-bindings: phy: tegra-xusb: Add usb-role-switch
dt-bindings: phy: tegra: Add Tegra194 support
dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
dt-bindings: tegra: Convert Tegra PMC bindings to YAML
dt-bindings: clock: tegra: Add IDs for OSC clocks
Link: https://lore.kernel.org/r/20200313165848.2915133-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
- Add early console support for all STM32 SoCs: F4/F7/H7/MP1
-----BEGIN PGP SIGNATURE-----
iQJMBAABCgA2FiEEctl9+nxzUSUqdELdf5rJavIecIUFAl5rsFgYHGFsZXhhbmRy
ZS50b3JndWVAc3QuY29tAAoJEH+ayWryHnCF0XoQAKlr9aR1MLBIkcVU58DXX+zk
/sSgsjJquHbYnWcwEMLOJUWQjYl5aGtSd3L5sOwzuQSQbAqfIM+YJYJ5RWrIo8/j
Jfnw5/0MkBXhovy1v4hMWczzqWmK58hqeOjaMrU6ipS3uwEavHILLANDjhN9fTMn
2l0dOzHdFzdC9F9T0Rp2FYkE0a0aA9/pkr/iKSlUXZhrvAk/oowUCdaCsZyiizi5
0fIY2j5Tom/gjhkhfUEKfT2Ep07S4uOwovXeXgeHoIokq2unltaAB6YHm+L1r01F
XG3Szo7NijweF5WnoUTtPzJV7fqk8WimPZpEjaK4Gvw3JRgJK5IjoEju1omXcxVm
qbBGS0QhQR2YsTS66kFo0rkq/amKISVIQPiE7JgrCH6x/55uEKLDrNCaefw0JIqf
3J7VBpPI7y4AE+QAh7HQ0P+v496/ZY5V7HpTuAcYjYZMIHTcahATk0ZP1ObM5WqI
A5lBi3fHPtcx6aveDgyO8eo+diuKmVceD4u9pglvjf8KJpqUcfr6l0SMsx1ErawL
l19t9vwPa1FhzrrsE6KQ9ZvK7hlLsU1kQYs17Q3RIz8RRnMD57jnVirqaRjiyPlp
kIrgdnTkrDkPVzJkrHdMNjTtgq8cYcAw1Dcos4eqOwiIG2DW8W0whwUTfewZuwW6
snc8zqhWnbKb3FmA4GgA
=qV5Q
-----END PGP SIGNATURE-----
Merge tag 'stm32-soc-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/soc
STM32 SoC updates for v5.7, round 1
Highlights:
----------
- Add early console support for all STM32 SoCs: F4/F7/H7/MP1
* tag 'stm32-soc-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: debug: stm32: add UART early console support for STM32MP1
ARM: debug: stm32: add UART early console support for STM32H7
ARM: debug: stm32: add UART early console configuration for STM32F7
ARM: debug: stm32: add UART early console configuration for STM32F4
Link: https://lore.kernel.org/r/4e427e37-99c9-239a-f3f8-a3bf50eb1eb2@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Just one change for our mach code for including the correct clk header.
-----BEGIN PGP SIGNATURE-----
iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAl5rGM0OHHdlbnNAY3Np
ZS5vcmcACgkQOJpUIZwPJDBNAxAAt0eZtFGKO2A8Zu8lrTtHePH3osAL9NDt6YL/
As9neFuGjdnYXZUNp9G+gJzV5esX1oiX35cCmAv6gYQ96pL1vV1nJGUG2Nly595q
aXw/AxkSGYnEwmQoikLzVrmjSIYWkMdCQX3bye/+DQTKE2Rdhcr1qeh9XkcXhkMg
wDbKwBV69Y4XoRokWdZy0pljvrQ0kGUGFmB4HciS6q7ZtQKMlOPvJwPvGELgZGIx
8eiWynAv+TvJ1eovC8AnS2oSlL7WWXr+N/srTGbvnw+s3a20j0wYk6vBV0qml7CH
agjZOclsjEL6VBrhlOcsP8HldooCQKxyUgz6xboWGClIhhuYkvON0vJnRgRTGL4E
hnB67Vw0un5iowi/scE5RKiTya1t1Ve0QAkP4+jBduuurCPpdId+QLCyCoFlYv/b
1KWOmDNOkoouR0xM8wtqw9nrVEWUoeYsMJJn8ytPifl8qr6swNYghdfI1LiC31t3
gnyzy16acszfEebuUzMTfDoYJImKraYGxQC2sst2k/2SNsNZslpK170CtBWq3xLp
an1wbjiTotm9lSROQmvMl85+1litIL4wLX5vTMj9Drd03cPQbYCPIsjwSHJIJGxo
1Uq3YcuVYDuALpvVnT0KZvUL32VQnuNa7cZ5Gc9/5mSARRcR+QAoHzO9Y6evDfOY
k/ICC4s=
=7HJ6
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/soc
Allwinner Core Changes for v5.7
Just one change for our mach code for including the correct clk header.
* tag 'sunxi-core-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sunxi: Replace <linux/clk-provider.h> by <linux/of_clk.h>
Link: https://lore.kernel.org/r/20200313055342.GA19760@wens.csie.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
pull the following:
- Geert drops the non-existent HAVE_ARM_ARCH_TIMER symbol select for
ARCH_BCM2835
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl5pVcYACgkQh9CWnEQH
BwSJHRAA04gN0RhapZUHTpDy2x8haa53v7S7ulFUuTULONAqBohipacIAtIPk4wP
RIX6ah3Nv/ZVIlimXERHR9uBMzyQp4bN09BCsLqCKDn80j+p9DhuWXlLoXZQwSFL
DB3yQ8WQ8/aG0UBj43WaKb+As3/rXsiGPgjWw6RRQq53kIeoKtgllzI8k3RPIU8n
/xhvcI+Xr3qnAOGcADJcYHM9W5UoTu5JIDGbFOkUxaM665fzCQXOPNIUwaDiOGn2
kl03vQbhgy4EOo6QfWRhHuxsot8aZq0rlzQJy4PrUQfQGy9FwzQzV9zAXuH5UWAL
AVTEXaCr5FsX3ioL81fQcjyLqjNJ4UWBAh1UgZKWHCUiztSkE1mHDt9ilGcOifOa
E85ycCMooNFgC4/Chs64lPOBtIlGQoA3fNmwMBxWcwHqI/aD7zQtU3NnxjZnWlHN
LtVD+T6+3vdNdp9cArT8TwsJpfosC/4YdXp12mVJzbkjt/RmnTLZAvHDBvmd6qkU
BCfHDYu5EhzhznLRS9asV93lI/zd2pkaDymY0kg3FwGd3zKa6w48r8i5diFjP8kN
7hFK50fxW0hv2674UtiTqgyjaLWut0KmTs+l8MBIK1RuzCGGfCa6JST2UD3J860Y
6lSC9smwScfJIFYuSTfb0BSNkFL0Ja+0x1ledBlFtrcgQn38jGI=
=JzIv
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.7/soc-arm64' of https://github.com/Broadcom/stblinux into arm/soc
This pull request contains Broadcom ARM64 SoCs changes for 5.7, please
pull the following:
- Geert drops the non-existent HAVE_ARM_ARCH_TIMER symbol select for
ARCH_BCM2835
* tag 'arm-soc/for-5.7/soc-arm64' of https://github.com/Broadcom/stblinux:
arm64: bcm2835: Drop select of nonexistent HAVE_ARM_ARCH_TIMER
Link: https://lore.kernel.org/r/20200311212012.9418-4-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
please pull the following:
- Geert drops redundant selects for Broadcom SoCs which are already
implied by ARCH_MULTI_V6_V7
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl5pVXsACgkQh9CWnEQH
BwTCLg//XPWtz+8kxTb5YFD4OyMiDQS5fftBQcsYaoesxhxnf04kudjWmKJtsi2a
ZQhN3sbJj9BIKndwgPDPClVb2zv2pCflK6e+4fWQVRdngWfspWsnYpd2bATZ2c63
mnug9gda1zWIYcdArQZ7OpywGOGQewnJSXxz30919WiYcwBlKzWvSu3rvBFDNSUa
bo1MkEYhkzkVQXr4rL3ZK9zK2mWeoDKp556vJXIwaszIT/9fXkXQQ5V0TmRI23Gb
gh+CUdHRpdvvTjPT+z9nWAptnGpLvo/fPOB4xDZH2JyFOftsRvdyh2RfyJOUkiX0
QP4bhfgez7K7JufhQasgZBnodTVoIR125nNeKTSttLC9/SGfKgceI32D788DTfCX
GDXtd0G7D517Am7Zkzz4BnaMkA1up9NQuOWeIXOvBbOa0FJZLAJeoCYZn5bDkljg
NXRUx957MPtZaixH8J4EWGFI8HXyD27gF73Up1RbSWG/YCPmbdflYmHvyv1hpVcH
mFRs3780WCzyieqJTNhjWBmPplDkqcG7zr1EiosqgvyYvnQK/oCxG8iwuVXI5Mt+
/SvsJb9Cm5JJ0R55xxQAop8oHc4zLPqWZppwlGv00vXdzHGU2fEmjsLGQ3IdtRsh
5nixfHNGupbTGeN9jXkKHIqpDb+mlxWb/+yD/OW0R5t8k+bSaxw=
=ytnq
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.7/soc' of https://github.com/Broadcom/stblinux into arm/soc
This pull request contains Broadcom ARM-based SoCs changes for 5.7,
please pull the following:
- Geert drops redundant selects for Broadcom SoCs which are already
implied by ARCH_MULTI_V6_V7
* tag 'arm-soc/for-5.7/soc' of https://github.com/Broadcom/stblinux:
ARM: bcm: Drop unneeded select of PCI_DOMAINS_GENERIC, HAVE_SMP, TIMER_OF
Link: https://lore.kernel.org/r/20200311212012.9418-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A series of changes from Dave Gerlach to enable basic cpuidle support
for am335x and am437x based on generic cpuidle-arm driver.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl5ic/ERHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXM3ZQ/9Gc7VbcShorVrHH1jMCtE21vSDxNmYq0f
tO8FfP8NP31g5Vsx7LiyhKmk80IKADpaDdih+UAkAxZ58ar8uJOaIYjdwKkho4Ra
d+upw8z6GX6C3nknmrwFTT0+31/BHC7w6kPR15f1IVz9BmXimtxGww7LX+2U1T1l
iqBMAaftqNiyci/Enj5RNAQa7ahyreIaJeBLJAP/9cYexkYvBtmPJkzV073ayqoz
43YP39ozTvSRzg+FTvxZMy6u8LUUoJWRETpXWSVAMIbnxAOiZnVvHOXYRtQzmAMj
WNgwpV7oZ34thFpg6ks61Eu56p1qH0qvYhEYev8JRqGSJHZ6j+6dvb3Mu1yNySDm
36K8Ko+U39P4OB/v4xtC/eSQux/C7aBbP3zbgzf/68f0GmE0Y33JvKE0uc0/vGPE
Wd3s0wpeeBlzNJOrdtfgwPCE64HpsbFyR+Ys9PCYQMBRjnKEuZJm0nagQKfgPdIZ
icS2aZhlAMeUMEB2LulagExHlUxh9YIobyL0fmw1WJEmcl33KXU4ECEI1Br0iLw+
oVb3+W1tXuDjnVrL4+IocjfGNP21qcIAULCrEK3GWFm71IA6fKsilRfwSus+jW6n
zpn7H3/VspNWyyKEGfKg84JCcYsBTLDrU3l6eG9flrUBnHM9YmQinMEuva4ovcwf
h1W7qwaau2s=
=nQLE
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
PM changes for am335x and am437x for v5.7 merge window
A series of changes from Dave Gerlach to enable basic cpuidle support
for am335x and am437x based on generic cpuidle-arm driver.
* tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Add CONFIG_ARM_CPUIDLE
soc: ti: pm33xx: Add base cpuidle support
ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidle
ARM: OMAP2+: pm33xx-core: Add cpuidle_ops for am335x/am437x
dt-bindings: arm: cpu: Add TI AM335x and AM437x enable method
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A change to improve the warning output for device tree data
mismatch as compared to legacy platform data for ti-sysc
related interconnect target modules.
And change omap1 to request_irq() instead of setup_irq().
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl5icq8RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNv6BAAy0vgp3GLme0tgTnKUev956IaxrJ68x3I
L6USn7nuN8hZGuesylJn6CLQaZalNLTXAvELcI5/ulyYXYaaXx/O5KYi1+JMK8Y/
6foHGQ/1EkqtqghYwX1OJVeMUUOPA9LOf2DEofXSa/4Nr1D9V7xvymKT8gJUxKNy
Stf/MCyXuWit/MVSdnwFq77gQBPSl4tmNrE/wj+4Urr94A64TJjFu6e/v6x1FXWW
hJBlva7MkKvaKR6MMOIvsHa436RKvsn2mogF0TbbzSEJ8Oh6w65TQYOkf3c7EknA
OCkAG/cBPxsSrufiFDm9nYGUT7N+djufGUODlmkhSUA43AhNkJr+dUceQ+KW4+GR
OpOJRD3i8Cc2pG2FntP7jF0ON750Cr3702R/VT0B01p5LFk7HPXsv53OJO6UyvnH
qa4ctEXcfY3F1yff7TNHmPehHSBuLUupw5gnQY1GHqu+qgo++XIgLcLY5iHwbiVJ
ZnRAuKJPZpvnxTLy+wm6PY6yXsBwIRSZrhQCeNCn7n8OJFFsFrmIRh1Gcf8RSF8W
UCfJ9jKMgLEJjx4kCcxi6ONwxc2zh63Er861cEISUBJr31DnQ0q6XoHe8yanROFw
buMQCAvj1ll5JwIbOrMF7/CBRu4isDcxLhevblc4Rc46VD641h3rA+tg7zPVj4qu
3wmD9VVWGYQ=
=ikQD
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
SoC changes for omaps for v5.7 merge window
A change to improve the warning output for device tree data
mismatch as compared to legacy platform data for ti-sysc
related interconnect target modules.
And change omap1 to request_irq() instead of setup_irq().
* tag 'omap-for-v5.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: replace setup_irq() by request_irq()
ARM: OMAP2+: Improve handling of ti-sysc related sysc_fields
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lift the common namespace identifier reporting between the shared
namespace and new nshead cases into common code. This also means
one less lock is held while doing I/O.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
There is no non __-prefixed version, so make the name a little more
readable.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Move the handling of an error into the function from the caller, and
only do it for an actual error on the admin command itself, not the
command parsing, as that should be enough to deal with devices claiming
a bogus version compliance.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
The transition to LIVE state should not fail in case of a new controller.
Moving to DELETING state before nvme_tcp_create_ctrl() allocates all the
resources may leads to NULL dereference at teardown flow (e.g., IO tagset,
admin_q, connect_q).
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
The transition to LIVE state should not fail in case of a new controller.
Moving to DELETING state before nvme_tcp_create_ctrl() allocates all the
resources may leads to NULL dereference at teardown flow (e.g., IO tagset,
admin_q, connect_q).
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Calling nvme_sysfs_delete() when the controller is in the middle of
creation may cause several bugs. If the controller is in NEW state we
remove delete_controller file and don't delete the controller. The user
will not be able to use nvme disconnect command on that controller again,
although the controller may be active. Other bugs may happen if the
controller is in the middle of create_ctrl callback and
nvme_do_delete_ctrl() starts. For example, freeing I/O tagset at
nvme_do_delete_ctrl() before it was allocated at create_ctrl callback.
To fix all those races don't allow the user to delete the controller
before it was fully created.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Put the ctrl reference count at nvme_uninit_ctrl as opposed to
nvme_init_ctrl which takes it. This decrease the reference count at the
core layer instead of decreasing it on each transport separately.
Also move the call of nvme_uninit_ctrl at PCI driver after calling to
nvme_release_prp_pools and nvme_dev_unmap, in order to put the reference
count after using the dev. This is safe because those functions use
nvme_dev which is freed only later at nvme_pci_free_ctrl.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
In case nvme_sysfs_delete() is called by the user before taking the ctrl
reference count, the ctrl may be freed during the creation and cause the
bug. Take the reference as soon as the controller is externally visible,
which is done by cdev_device_add() in nvme_init_ctrl(). Also take the
reference count at the core layer instead of taking it on each transport
separately.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Destroy the resources in the same order like in nvme_probe error flow to
improve code readability.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
The return code of nvme_delete_ctrl_sync is never used, so change it to
void.
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Improve code readability.
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
ida instances allocate some internal memory in addition to the base
'struct ida'. Use ida_destroy() to release that memory at module_exit().
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Currently 32 bit application gets ENOTTY when it calls
compat_ioctl with NVME_IOCTL_SUBMIT_IO in 64 bit kernel.
The cause is that the results of sizeof(struct nvme_user_io),
which is used to define NVME_IOCTL_SUBMIT_IO,
are not same between 32 bit compiler and 64 bit compiler.
* 32 bit: the result of sizeof nvme_user_io is 44.
* 64 bit: the result of sizeof nvme_user_io is 48.
64 bit compiler seems to add 32 bit padding for multiple of 8 bytes.
This patch adds a compat_ioctl handler.
The handler replaces NVME_IOCTL_SUBMIT_IO32 with NVME_IOCTL_SUBMIT_IO
in case 32 bit application calls compat_ioctl for submit in 64 bit kernel.
Then, it calls nvme_ioctl as usual.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada (KIOXIA) <masahiro31.yamada@kioxia.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
If we have a 4-byte data digest to send to the wire, but we
have more data to send, set MSG_MORE to tell the stack
that more is coming.
Reviewed-by: Mark Wunderlich <mark.wunderlich@intel.com>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Since snprintf() returns the would-be-output size instead of the
actual output size, the succeeding calls may go beyond the given
buffer limit. Fix it by replacing with scnprintf().
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
The nvme multipath error handling defaults to controller reset if the
error is unknown. There are, however, no existing nvme status codes that
indicate a reset should be used, and resetting causes unnecessary
disruption to the rest of IO.
Change nvme's error handling to first check if failover should happen.
If not, let the normal error handling take over rather than reset the
controller.
Based-on-a-patch-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: John Meneghini <johnm@netapp.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
Current nvmet-rdma code allocates MR pool budget based on queue size,
assuming both host and target use the same "max_pages_per_mr" count.
After limiting the mdts value for RDMA controllers, we know the factor
of maximum MR's per IO operation. Thus, make sure MR pool will be
sufficient for the required IO depth and IO size.
That is, say host's SQ size is 100, then the MR pool budget allocated
currently at target will also be 100 MRs. But 100 IO WRITE Requests
with 256 sg_count(IO size above 1MB) require 200 MRs when target's
"max_pages_per_mr" is 128.
Reported-by: Krishnamraju Eraparaju <krishna2@chelsio.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
Set the maximal data transfer size to be 1MB (currently mdts is
unlimited). This will allow calculating the amount of MR's that
one ctrl should allocate to fulfill it's capabilities.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
Some transports, such as RDMA, would like to set the Maximum Data
Transfer Size (MDTS) according to device/port/ctrl characteristics.
This will enable the transport to set the optimal MDTS according to
controller needs and device capabilities. Add a new nvmet transport
op that is called during ctrl identification. This will not effect
transports that don't implement this option. The return value of the new
op is according to the NVMe spec definition for MDTS.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
If we failed to receive data from the socket, don't try
to further process it, we will for sure be handling a queue
error at this point. While no issue was seen with the
current behavior thus far, its safer to cease socket processing
if we detected an error.
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>