- remove MACH_MESON8B, only used for building DTs
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Merge tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Amlogic 32-bit DT changes for v4.18, round 2
- remove MACH_MESON8B, only used for building DTs
* tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: meson: merge Kconfig symbol MACH_MESON8B into MACH_MESON8
ARM: dts: meson: build the Meson8b .dtbs with MACH_MESON8
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add support for SDM845 and associated peripherals
* Fix gic_irq_domain_translation warnings on Qualcomm platforms
* Add binding for GENI SE, Qualcomm bluetooth, and Command DB
* Add support for SDHCI and ramoops on MSM8992
* Fixup qcom,pcie devices to pcie
* Add wlan, bluetooth, and micro SD supplies on db820c
* Add UFS related nodes on MSM8996
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Merge tag 'qcom-arm64-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Qualcomm ARM64 Updates for v4.18
* Add support for SDM845 and associated peripherals
* Fix gic_irq_domain_translation warnings on Qualcomm platforms
* Add binding for GENI SE, Qualcomm bluetooth, and Command DB
* Add support for SDHCI and ramoops on MSM8992
* Fixup qcom,pcie devices to pcie
* Add wlan, bluetooth, and micro SD supplies on db820c
* Add UFS related nodes on MSM8996
* tag 'qcom-arm64-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: qcom: msm8996: Add ufs related nodes
arm64: dts: msm8996: fix gic_irq_domain_translate warnings
arm64: dts: qcom: sdm845: Sort nodes in the soc by address
arm64: dts: qcom: sdm845: Sort nodes in the reserved mem by address
arm64: dts: sdm845: Add command DB node
arm64: dts: sdm845: Fix xo_board clock name and speed
arm64: dts: qcom: Add SDM845 SMEM nodes
arm64: dts: qcom: Add APSS shared mailbox node to SDM845
arm64: dts: msm8916: fix gic_irq_domain_translate warnings
dt-bindings: introduce Command DB for QCOM SoCs
arm64: dts: apq8096-db820c: Add micro sd card supplies
dt-bindings: soc: qcom: Add device tree binding for GENI SE
dt-bindings: net: bluetooth: Add qualcomm-bluetooth
arm64: dts: apq8096-db820c: enable bluetooth node
arm64: dts: apq8096-db820c: Enable wlan and bt en pins
arm64: dts: qcom: rename qcom,pcie devices to pcie
arm64: dts: msm8992: add pstore-ramoops support
arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP
arm64: dts: Enable onboard SDHCI on msm8992
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch removes the unused bt-en-1-8v regulator and moves the
bt_en_gios claim to the pm8994_gpios node.
This bt_en_gpio could have been moved to the bluetooth serial node but
instead this node declares an 'enable' gpio addressing the bt_en_gpio.
This is needed by the Qualcomm QCA6174 WLAN/BT combo chip that needs to
have the bt_en_gpio claimed even if only WLAN is used.
Signed-off-by: Thierry Escande <thierry.escande@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The property name vddpe-supply is not included in
Documentation/devicetree/bindings/pci/qcom,pcie.txt
nor in the pcie-qcom PCIe Root Complex driver.
This property name was used in an initial patchset for pcie-qcom,
but was renamed in a later revision.
Therefore, the regulator is currently never enabled, leaving us with
unoperational wlan.
Fix this by using the correct regulator property name, so that wlan
comes up correctly.
Fixes: 1c8ca74a2ea1 ("arm64: dts: apq8096-db820c: Enable wlan and bt en pins")
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The UFS host controller occationally (20%) fails to enable
gcc_ufs_axi_clk because the UFS GDSC is not enabled. In most cases it's
enabled through the UFS phy driver, but to make sure it's enabled let's
enable it directly from the UFS host controller directly as well.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The clocks for the 3 MMC controllers on pxa3xx platforms are CLK_MMC1,
CLK_MMC2 and CLK_MMC3. CLK_MMC is only for pxa2xx.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The PXA3xx series features some extended GPIO banks which are named GPIO0_2,
GPIO1_2 etc. The PXA300, PXA310 and PXA320 have different numbers of such
pins, and they also have variant-specific register offsets.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
The PXA GPIO driver calls out to the pinctrl driver for claiming pins
unless the config has CONFIG_PINCTRL unset. IOW, if a pinctrl driver is
active, it must be visible to the GPIO driver.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This series of changes contains fixes for already queued tps65218
IRQ_TYPE, and fixes for omap3 and am335x use of IRQ_TYPE. There are
also addition of oscillator clock for logicpd omap3 boards and a series
of changes to improve support for am3517-evm board. And there is also
a change to configure WLAN for am437x-sk-evm.
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Merge tag 'omap-for-v4.18/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Second set of dts changes for omap variants for v4.18 merge window
This series of changes contains fixes for already queued tps65218
IRQ_TYPE, and fixes for omap3 and am335x use of IRQ_TYPE. There are
also addition of oscillator clock for logicpd omap3 boards and a series
of changes to improve support for am3517-evm board. And there is also
a change to configure WLAN for am437x-sk-evm.
* tag 'omap-for-v4.18/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (24 commits)
ARM: dts: am3517-evm: Add User LEDs and Pushbutton
ARM: dts: am3517-evm: Add I/O expander for User DIP switches and LEDS
ARM: dts: logicpd-som-lv: Fix Touchscreen controller
ARM: dts: am3517-som: Add Seiko Instruments RTC s35390a
ARM: dts: am437x-sk-evm: add wilink8 support
ARM: dts: am3517-evm: Add LCD panel type 15 support
ARM: dts: am3517-som: Associate cpu to regulator supply
ARM: dts: am3517-som: Add TI TPS65023 regulators
ARM: dts: am3517-evm: Split off SOM features from baseboard
ARM: dts: am3517: Add pinmuxing, CD and WP for MMC1
ARM: dts: logicpd-som-lv: Add fixed 26MHz clock as fck for twl
ARM: dts: logicpd-torpedo: Add fixed 26MHz clock as fck for twl
ARM: dts: omap3-pandora-common: Use IRQ_TYPE specifier
ARM: dts: am335x-boneblue: Use IRQ_TYPE specifier
ARM: dts: am335x-baltos.dtsi: Use IRQ_TYPE specifier
ARM: dts: am335x-baltos-ir5221: Use IRQ_TYPE specifier
ARM: dts: am335x-baltos-ir3220: Use IRQ_TYPE specifier
Revert "ARM: dts: am437x-sk-evm: Correct tps65218 irq type"
ARM: dts: am437x-epos-evm: Fixup (again) tps65218 irq type
ARM: dts: am437x-cm-t43: Fixup (again) tps65218 irq type
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This series mostly adds saving of power and clock domain registers for
am335x/am437x suspend to RTC only mode. There is also a non-urgent fix
for omap4 PM where we could end up losing GPIO interrupts if bootloader
has LOGICRETSTATE cleared for domains. And there is a clean-up patch for
omap1 to use device properties for at24 eeprom.
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Merge tag 'omap-for-v4.18/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omap variants for v4.18 merge window
This series mostly adds saving of power and clock domain registers for
am335x/am437x suspend to RTC only mode. There is also a non-urgent fix
for omap4 PM where we could end up losing GPIO interrupts if bootloader
has LOGICRETSTATE cleared for domains. And there is a clean-up patch for
omap1 to use device properties for at24 eeprom.
* tag 'omap-for-v4.18/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Make sure LOGICRETSTATE bits are not cleared
ARM: OMAP2+: prm44xx: Inroduce cpu_pm notifiers for context save/restore
ARM: OMAP2+: prm44xx: Introduce context save/restore for am43 PRCM IO
ARM: OMAP2+: powerdomain: Introduce cpu_pm notifiers for context save/restore
ARM: OMAP2+: Add functions to save and restore powerdomain context
ARM: OMAP2+: clockdomain: Inroduce cpu_pm notifiers for context save/restore
ARM: OMAP2+: Add functions to save and restore clockdomain context en-masse.
ARM: omap1: osk: use device properties for at24 eeprom
Signed-off-by: Olof Johansson <olof@lixom.net>
This fixes an array access errors if there are more optional clocks
than one.
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Merge tag 'omap-for-v4.18/ti-sysc-fix-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
One ti-sysc fix for v4.18 merge window
This fixes an array access errors if there are more optional clocks
than one.
* tag 'omap-for-v4.18/ti-sysc-fix-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Fix optional clocks array access
Signed-off-by: Olof Johansson <olof@lixom.net>
Introduce a new read/write lock that will protect statistics gathering from
netdev channels configuration changes.
e.g. when channels are being replaced (increase/decrease number of rings)
prevent statistic gathering (ndo_get_stats64) to read the statistics of
in-active channels (channels that are being closed).
Plus update channels software statistics on the fly when calling
ndo_get_stats64, and remove it from stats periodic work.
Fixes: 9218b44dcc ("net/mlx5e: Statistics handling refactoring")
Signed-off-by: Shalom Lagziel <shaloml@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
PHY link down events counter belongs to phy_counters group.
although it has special handling, it doesn't mean it can't be there.
Move it to phy_counters_grp handler.
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Complete the transition of all WQ types to use fragmented
order-0 coherent memory instead of high-order allocations.
CQ-WQ already uses order-0.
Here we do the same for cyclic and linked-list WQs.
This allows the driver to load cleanly on systems with a highly
fragmented coherent memory.
Performance tests:
ConnectX-5 100Gbps, CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz
Packet rate of 64B packets, single transmit ring, size 8K.
No degradation is sensed.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
If CONFIG_MLX5_CORE_IPOIB is not set, compile-out the
IPOIB related headers.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
We fill SQ edge with NOPs to avoid WQEs wrap.
Here, instead of doing that in advance for the maximum possible
WQE size, we do it on-demand using the actual WQE size.
We re-order some parts in mlx5e_sq_xmit to finish the calculation
of WQE size (ds_cnt) before doing any writes to the WQE buffer.
When SQ work queue is fragmented (introduced in an downstream patch),
dealing with WQE wraps becomes more frequent. This change would drastically
reduce the overhead in this case.
Performance tests:
ConnectX-5 100Gbps, CPU: Intel(R) Xeon(R) CPU E5-2680 v3 @ 2.50GHz
Packet rate of 64B packets, single transmit ring, size 8K.
Before: 14.9 Mpps
After: 15.8 Mpps
Improvement of 6%.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Use the WQ API to get the WQ size, and to map a counter
into a WQ entry index.
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
If a TC rule needs to be split for mirroring, create two HW rules,
in the first level and the second level flow tables accordingly.
In the first level flow table, forward the packet to the mirror
port and forward the packet to the second level flow table for
further processing, eg. encap, vlan push or header re-write.
Currently the matching is repeated in both stages.
While here, simplify the setup of the vhca id valid indicator also
in the existing code.
Signed-off-by: Chris Mi <chrism@mellanox.com>
Reviewed-by: Paul Blakey <paulb@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Currently, we only support the mirred redirect TC sub-action. In order
to support flow based vport mirroring, add support to parse the mirred
mirror sub-action.
For mirroring, user-space will typically set the action order such that
the mirror port (mirror VF) sees packets as the original port (VF under
mirroring) sent them or as it will receive them.
In the general case, it means that packets are potentially sent to the
mirror port before or after some actions were applied on them. To
properly do that, we should follow on the exact action order as set for
the flow and make sure this will also be the case when we program the HW
offload.
We introduce a counter for the output ports (attr->out_count), which we
increase when parsing each mirred redirect/mirror sub-action and when
dealing with encap.
We introduce a counter (attr->mirror_count) telling us if split is
needed. If no split is needed and mirroring is just multicasting to
vport, the mirror count is zero, all the actions of the TC flow should
apply on that single HW flow.
If split is needed, the mirror count tells where to do the split, all
non-mirred tc actions should apply only after the split.
The mirror count is set while parsing the following actions encap/decap,
header re-write, vlan push/pop.
Signed-off-by: Chris Mi <chrism@mellanox.com>
Reviewed-by: Paul Blakey <paulb@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
If firmware supports the forward action with a destination list
that includes a flow table, create a second level FDB flow table.
This is going to be used for flow based mirroring under the switchdev
offloads mode.
Signed-off-by: Chris Mi <chrism@mellanox.com>
Reviewed-by: Paul Blakey <paulb@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
If set, the FDB table supports the forward action with a
destination list that includes a flow table.
Signed-off-by: Chris Mi <chrism@mellanox.com>
Reviewed-by: Paul Blakey <paulb@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
We have several fdb flow tables for each of the legacy and switchdev
modes. In the switchdev mode, there are fast path and slow path flow
tables. Towards adding more flow tables in upcoming patches, reorganize
and rename the various existing ones to reflect their functionality.
Signed-off-by: Chris Mi <chrism@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
We mostly have some changes to support the H6, Allwinner latest SoC. We're
still in the preliminary phase, with I2C, pinctrl and clock support.
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Merge tag 'sunxi-dt64-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner arm64 changes for 4.18
We mostly have some changes to support the H6, Allwinner latest SoC. We're
still in the preliminary phase, with I2C, pinctrl and clock support.
* tag 'sunxi-dt64-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: h6: add PCF8563 RTC on Pine H64 board
arm64: allwinner: h6: add R_I2C controller
arm64: allwinner: h6: add R_INTC interrupt controller
arm64: allwinner: h6: add node for R_PIO pin controller
arm64: allwinner: h6: add PRCM CCU device node
arm64: dts: allwinner: a64: bananapi-m64: add usb otg
arm64: dts: allwinner: axp803: Add drivevbus regulator
arm64: allwinner: h6: restore the usage of CCU slice macros
Signed-off-by: Olof Johansson <olof@lixom.net>
The A83t, unlike the other Allwinner SoCs, cannot use PSCI because of a
silicon bug. As such, we needed to have some smp_ops in order to bringup
the various cores (and clusters) found on this SoC.
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Merge tag 'sunxi-core-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/soc
Allwinner core changes for 4.18
The A83t, unlike the other Allwinner SoCs, cannot use PSCI because of a
silicon bug. As such, we needed to have some smp_ops in order to bringup
the various cores (and clusters) found on this SoC.
* tag 'sunxi-core-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: sun8i: smp: Add support for A83T
ARM: sun9i: smp: Add is_a83t field
ARM: sun9i: smp: Rename clusters's power-off
ARM: shmobile: Convert file to use cntvoff
ARM: sunxi: Add initialization of CNTVOFF
ARM: smp: Add initialization of CNTVOFF
ARM: sunxi: smp: Move assembly code into a file
ARM: Allow this header to be included by assembly files
Signed-off-by: Olof Johansson <olof@lixom.net>
Here is our usual bunch of changes for the H3 and H5 SoCs that share the
same SoC design but with different CPUs.
This time, most of the changes are about supporting CPUFreq on these SoCs,
with voltage scaling being enabled for a number of boards.
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Merge tag 'sunxi-h3-h5-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3/H5 support for 4.18
Here is our usual bunch of changes for the H3 and H5 SoCs that share the
same SoC design but with different CPUs.
This time, most of the changes are about supporting CPUFreq on these SoCs,
with voltage scaling being enabled for a number of boards.
* tag 'sunxi-h3-h5-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: h3: Add SY8106A regulator to Orange Pi PC
arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.
arm64: dts: allwinner: Sort dtb entries in Makefile
arm64: dts: allwinner: h5: Add cpu0 label for first cpu
ARM: dts: sun8i: h2+: Add Libre Computer Board ALL-H3-CC H2+ ver.
ARM: dts: sun8i: h2-plus: Sort dtb entries in Makefile
arm: dts: sun8i: h3: libretech-all-h3-cc: Move board definition to common dtsi
ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VCC-1V2 regulator voltage
ARM: dts: sun8i: h3: set the cpu-supply to VDD-CPUX on ALL-H3-CC H3 ver
ARM: dts: sun8i: h3: fix ALL-H3-CC H3 ver VDD-CPUX voltage
ARM: dts: sun8i: h3: add SY8113B regulator used by Orange Pi One board
ARM: dts: sun8i: h2+: add SY8113B regulator used by Orange Pi Zero board
ARM: dts: sun8i: h3: add operating-points-v2 table for CPU
ARM: dts: sunxi: h3/h5: Add r_i2c I2C controller
ARM: dts: sunxi: h3/h5: Add r_i2c pinmux node
Signed-off-by: Olof Johansson <olof@lixom.net>
Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
- MIPI-DSI support for the A33
- NAND support for the A33
- SMP support for the A83t
- GMAC support for the R40
- And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
Classic
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Merge tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner DT additions for 4.18
Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
- MIPI-DSI support for the A33
- NAND support for the A33
- SMP support for the A83t
- GMAC support for the R40
- And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
Classic
* tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
ARM: dts: sun8i: r40: Add device node and RGMII pinmux node for GMAC
ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences
ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
ARM: dts: sun8i: a83t: Add CCI-400 node
ARM: dts: sun8i: Add R_CPUCFG device node for the A83T dtsi
ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support
ARM: dts: sun8i: a23/a33: declare NAND pins
ARM: dts: sunxi: Add sid for a83t
ARM: dts: sun8i: a33: Add the DSI-related nodes
ARM: dts: sunxi: Change sun7i-a20-olimex-som204-evb to not use cd-inverted
ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry
Signed-off-by: Olof Johansson <olof@lixom.net>
Create function qcom_smem_virt_to_phys(), which returns the physical
address corresponding to a given SMEM item's virtual address. This
feature is required for a driver that will soon be out for review.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
In qmi_handle_init(), a buffer is allocated for to hold messages
received through the handle's socket. Any "normal" messages
(expected by the caller) will have a header prepended, so the
buffer size is adjusted to accomodate that.
The buffer must also be of sufficient size to receive control
messages, so the size is increased if necessary to ensure these
will fit.
Unfortunately the calculation is done wrong, making it possible
for the calculated buffer size to be too small to hold a "normal"
message. Specifically, if:
recv_buf_size > sizeof(struct qrtr_ctrl_pkt) - sizeof(struct qmi_header)
AND
recv_buf_size < sizeof(struct qrtr_ctrl_pkt)
the current logic will use sizeof(struct qrtr_ctrl_pkt) as the
receive buffer size, which is not enough to hold the maximum
"normal" message plus its header. Currently this problem occurs
for (13 < recv_buf_size < 20).
This patch corrects this.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Update pattern for qcom_scm, so that get_maintainer.pl will show the
correct maintainers + lists, not only for qcom_scm.c, but also for
the files: qcom_scm-32.c, qcom_scm-64.c, qcom_scm.h.
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Incoming Qualcomm changes for GENI, i2c [1], and cmd-db [2] are enabled
with COMPILE_TEST in drivers/soc/qcom. For this to work, the Makefile
in that directory has to be included unconditionally, rather than only
if ARCH_QCOM is enabled.
Example of the errors seen on allmodconfig with the GENI, i2c, and
cmd-db patches applied:
Kernel: arch/x86/boot/bzImage is ready (#1)
ERROR: "geni_se_select_mode" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_init" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_config_packing" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_resources_on" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_resources_off" [drivers/tty/serial/qcom_geni_serial.ko] undefined!
ERROR: "geni_se_tx_dma_unprep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_tx_dma_prep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_rx_dma_unprep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_rx_dma_prep" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_select_mode" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_config_packing" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_init" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_resources_off" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
ERROR: "geni_se_resources_on" [drivers/i2c/busses/i2c-qcom-geni.ko] undefined!
make[1]: *** [scripts/Makefile.modpost:92: __modpost] Error 1
make: *** [Makefile:1237: modules] Error 2
[1] https://patchwork.ozlabs.org/cover/893437/
[2] https://lkml.org/lkml/2018/4/10/714
Signed-off-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
There's no sense in scanning the partition table again if we know
the global partition has already been discovered. Check for a
non-null global_partition pointer in qcom_smem_set_global_partition()
immediately.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
If there is at least one entry in the partition table, but no global
entry, the qcom_smem_set_global_partition() should return an error
just like it does if there are no partition table entries.
It turns out the function still returns an error in this case, but
it waits to do so until it has mistakenly treated the last entry in
the table as if it were the global entry found.
Fix the function to return immediately if no global entry is found
in the table.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
It's OK if the space for a newly-allocated uncached entry actually
touches the free cached space boundary. It's only a problem if it
would cross it.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Two places report an error when a partition header is found to
not contain the right canary value. The error messages do not
properly byte swap the host ids. Fix this, and adjust the format
specificier to match the 16-bit unsigned data type.
Move the error handling for a bad canary value to the end of
qcom_smem_alloc_private(). This avoids some long lines, and
reduces the distraction of handling this unexpected problem.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
What phdr_to_last_uncached_entry() returns is the address of the
start of the free space following all allocated uncached entries.
It really doesn't refer to an actual (initialized) private entry
structure. Similarly phdr_to_last_cached_entry() returns the
address of the end of free space, preceding the last allocated cache
entry. Change both functions' return type to be pointer to void
to reflect this.
Meanwhile, phdr_to_first_cached_entry() really *does* point to a
private entry structure, so change its return type to reflect
this fact.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Cached items are found at the high end of an smem partition. A
cached item's shared memory precedes the private entry structure
that describes it.
The address of the structure describing the first cached item should
be returned by phdr_to_first_cached_entry(). However the function
calculates the start address using the wrong structure size.
Fix this by computing the first item's entry structure address by
subtracting the size of a private entry structure rather than a
partition header structure.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This driver deals with memory that is stored in little-endian format.
Update the structures with the proper little-endian types and then
do the proper conversions when reading the fields. Note that we compare
the ids with a memcmp() because we already pad out the string 'id' field
to exactly 8 bytes with the strncpy() onto the stack.
Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Command DB is a simple database in the shared memory of QCOM SoCs, that
provides information regarding shared resources. Some shared resources
in the SoC have properties that are probed dynamically at boot by the
remote processor. The information pertaining to the SoC and the platform
are made available in the shared memory. Drivers can query this
information using predefined strings.
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- Enable i.MX6SLL SoC support.
- Build in GPIO_MAX732X support as the GPIO expanders are used on
i.MX6 SabreAuto boards.
- Enable driver for RN5T618 PMIC and Marvell MWIFIEX support which
are found on i.MX6/7 Colibri boards.
- Build in OCOTP NVMEM driver for Vybrid (vf610) SoCs.
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Merge tag 'imx-defconfig-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
i.MX defconfig update for 4.18:
- Enable i.MX6SLL SoC support.
- Build in GPIO_MAX732X support as the GPIO expanders are used on
i.MX6 SabreAuto boards.
- Enable driver for RN5T618 PMIC and Marvell MWIFIEX support which
are found on i.MX6/7 Colibri boards.
- Build in OCOTP NVMEM driver for Vybrid (vf610) SoCs.
* tag 'imx-defconfig-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Select CONFIG_GPIO_MAX732X by default
ARM: imx_v6_v7_defconfig: enable imx6sll by default
ARM: imx_v6_v7_defconfig: enable Vybrid OCOTP driver
ARM: imx_v6_v7_defconfig: add mwifiex driver
ARM: imx_v6_v7_defconfig: add RN5T618 PMIC family support
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add unit address for ls208xa-rdb SPI flash node matching 'reg'
property to fix DTC warning unit_address_vs_reg.
- Use hypen instead of underscore in aliases name for fsl-ls1012a to
fix DTC warning alias_paths.
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Merge tag 'imx-dt64-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Freescale arm64 device tree update for 4.18:
- Add unit address for ls208xa-rdb SPI flash node matching 'reg'
property to fix DTC warning unit_address_vs_reg.
- Use hypen instead of underscore in aliases name for fsl-ls1012a to
fix DTC warning alias_paths.
* tag 'imx-dt64-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: fsl-ls1012a: Fix DTC aliases warnings
arm64: dts: ls208xa-rdb: Pass unit name to SPI flash node
Signed-off-by: Olof Johansson <olof@lixom.net>
- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
Kieback & Peter GmbH iMX6Q TPC board.
- A series from Anson Huang to add a bunch of devices for i.MX6SX
SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
- Update i.MX7D for cpufreq support, using operating-points-v2
bindings, correcting cpu supply name for voltage scaling.
- Clean up unneeded 'codec-handle' property from imx25-pdk and
imx53-tx53 device tree.
- Switch SoC dtsi and NXP board dts files to use SPDX identifier.
- Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
avoid_unnecessary_addr_size seen with W=1 switch.
- A series from Rob Herring to fix DTC warning graph_endpoint seen with
IPU OF graph when W=1 switch is on.
- Update a few boards to use symbol name instead of hard-coding the
input codes.
- Update a number of boards to use IRQ_TYPE specifier instead of the
raw value.
- A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
adding assigned clocks for GPU, and enabling eGalax touchscreen.
- A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
cleaning up eMMC device node.
- Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
simple-audio-card, so that auxiliary audio devices such as external
amplifiers can be supported.
- Replace underscore with hyphen in aliases name to fix DTC warning
alias_paths with W=1 switch.
- A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
- Other random and small changes.
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Merge tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
i.MX device tree update for 4.18:
- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
Kieback & Peter GmbH iMX6Q TPC board.
- A series from Anson Huang to add a bunch of devices for i.MX6SX
SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
- Update i.MX7D for cpufreq support, using operating-points-v2
bindings, correcting cpu supply name for voltage scaling.
- Clean up unneeded 'codec-handle' property from imx25-pdk and
imx53-tx53 device tree.
- Switch SoC dtsi and NXP board dts files to use SPDX identifier.
- Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
avoid_unnecessary_addr_size seen with W=1 switch.
- A series from Rob Herring to fix DTC warning graph_endpoint seen with
IPU OF graph when W=1 switch is on.
- Update a few boards to use symbol name instead of hard-coding the
input codes.
- Update a number of boards to use IRQ_TYPE specifier instead of the
raw value.
- A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
adding assigned clocks for GPU, and enabling eGalax touchscreen.
- A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
cleaning up eMMC device node.
- Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
simple-audio-card, so that auxiliary audio devices such as external
amplifiers can be supported.
- Replace underscore with hyphen in aliases name to fix DTC warning
alias_paths with W=1 switch.
- A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
- Other random and small changes.
* tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (72 commits)
ARM: dts: imx28/imx53: enable edt-ft5x06 wakeup source
ARM: dts: imx51-zii-rdu1: cleanup eMMC node
ARM: dts: vf610-zii-dev: enable vf610 builtin temp sensor
ARM: dts: imx7d: use operating-points-v2 for cpu
ARM: dts: imx7s-warp: remove unnecessary cpu regulator supply
ARM: dts: imx7d: correct cpu supply name for voltage scaling
ARM: dts: imx51-zii-rdu1: limit usbh1 to full-speed
ARM: dts: imx6/7: Remove unit-address from anatop regulators
ARM: dts: imx: Switch NXP boards to SPDX identifier
ARM: dts: imx6qdl-phytec-pfla02: Use IRQ_TYPE specifier
ARM: dts: imx53-voipac-dmm-668: Use IRQ_TYPE specifier
ARM: dts: imx53-qsb: Use IRQ_TYPE specifier
ARM: dts: vf-colibri-eval-v3: Use IRQ_TYPE specifier
ARM: dts: imx6q-gk802: Do not hardcode input codes
ARM: dts: imx53-smd: Do not hardcode input codes
ARM: dts: imx53-ard: Do not hardcode input codes
ARM: dts: imx7: Fix error in coresight TPIU graph connection
ARM: dts: imx53: Fix LDB OF graph warning
ARM: dts: imx: fix IPU OF graph endpoint node names
ARM: dts: imx: Switch to SPDX identifier
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The msm8996 PCIe sits behind the "agnoc0", which is represented as a
simple-pm-bus, so enable support for this. Then enable the QMP phy
driver.
Also enable the atl1c ethernet driver and ath10k wlan driver to support
these components on the DragonBoard820c.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
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Merge tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC update for 4.18:
- A series from Bartosz to convert all i.MX plaform code using
at24_platform_data to use at24 eeprom generic device properties.
- Enable pinctrl driver support for i.MX6SLL SoC.
- Clean up i.MX platform code using spi_imx platform data on outdated
documentation and chip select array usage.
* tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: select imx6sll pinctrl when imx6sll enabled
ARM: imx: pcm037: use device properties for at24 eeprom
ARM: imx: pca100: use device properties for at24 eeprom
ARM: imx: pcm043: use device properties for at24 eeprom
ARM: imx: vpr200: drop at24_platform_data
ARM: imx: Update spi_imx platform data to reflect current state
Signed-off-by: Olof Johansson <olof@lixom.net>
- Use platform_device_add_data() instead of a pointer to a static
memory in gpc/gpcv2 driver for platform data passing, so that we
can avoid a BUG() when calling platform_device_put().
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Merge tag 'imx-drivers-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
i.MX drivers update for 4.18:
- Use platform_device_add_data() instead of a pointer to a static
memory in gpc/gpcv2 driver for platform data passing, so that we
can avoid a BUG() when calling platform_device_put().
* tag 'imx-drivers-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: gpc: Do not pass static memory as platform data
soc: imx: gpcv2: Do not pass static memory as platform data
Signed-off-by: Olof Johansson <olof@lixom.net>
Remove redundant debug prints from phy_read/write since we can trace those
calls through trace events. Enhance dynamic debug prints to print arguments
which helps figuring how what is going on at the driver level with higher level
configuration interfaces.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Yi-Hung Wei says:
====================
openvswitch: Support conntrack zone limit
Currently, nf_conntrack_max is used to limit the maximum number of
conntrack entries in the conntrack table for every network namespace.
For the VMs and containers that reside in the same namespace,
they share the same conntrack table, and the total # of conntrack entries
for all the VMs and containers are limited by nf_conntrack_max. In this
case, if one of the VM/container abuses the usage the conntrack entries,
it blocks the others from committing valid conntrack entries into the
conntrack table. Even if we can possibly put the VM in different network
namespace, the current nf_conntrack_max configuration is kind of rigid
that we cannot limit different VM/container to have different # conntrack
entries.
To address the aforementioned issue, this patch proposes to have a
fine-grained mechanism that could further limit the # of conntrack entries
per-zone. For example, we can designate different zone to different VM,
and set conntrack limit to each zone. By providing this isolation, a
mis-behaved VM only consumes the conntrack entries in its own zone, and
it will not influence other well-behaved VMs. Moreover, the users can
set various conntrack limit to different zone based on their preference.
The proposed implementation utilizes Netfilter's nf_conncount backend
to count the number of connections in a particular zone. If the number of
connection is above a configured limitation, OVS will return ENOMEM to the
userspace. If userspace does not configure the zone limit, the limit
defaults to zero that is no limitation, which is backward compatible to
the behavior without this patch.
The first patch defines the conntrack limit netlink definition, and the
second patch provides the implementation.
v4->v5:
- Addresses comments from Parvin that include log error msg in
ovs_ct_limit_init(), handle deletion for default limit, and
add a common helper for get zone limit.
- Rebases to master.
v3->v4:
- Addresses comments from Parvin that include simplify netlink API,
and remove unncessary RCU lockings.
- Rebases to master.
v2->v3:
- Addresses comments from Parvin that include using static keys to check
if ovs_ct_limit features is used, only check ct_limit when a ct entry
is unconfirmed, and reports rate limited warning messages when the ct
limit is reached.
- Rebases to master.
v1->v2:
- Fixes commit log typos suggested by Greg.
- Fixes memory free issue that Julia found.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently, nf_conntrack_max is used to limit the maximum number of
conntrack entries in the conntrack table for every network namespace.
For the VMs and containers that reside in the same namespace,
they share the same conntrack table, and the total # of conntrack entries
for all the VMs and containers are limited by nf_conntrack_max. In this
case, if one of the VM/container abuses the usage the conntrack entries,
it blocks the others from committing valid conntrack entries into the
conntrack table. Even if we can possibly put the VM in different network
namespace, the current nf_conntrack_max configuration is kind of rigid
that we cannot limit different VM/container to have different # conntrack
entries.
To address the aforementioned issue, this patch proposes to have a
fine-grained mechanism that could further limit the # of conntrack entries
per-zone. For example, we can designate different zone to different VM,
and set conntrack limit to each zone. By providing this isolation, a
mis-behaved VM only consumes the conntrack entries in its own zone, and
it will not influence other well-behaved VMs. Moreover, the users can
set various conntrack limit to different zone based on their preference.
The proposed implementation utilizes Netfilter's nf_conncount backend
to count the number of connections in a particular zone. If the number of
connection is above a configured limitation, ovs will return ENOMEM to the
userspace. If userspace does not configure the zone limit, the limit
defaults to zero that is no limitation, which is backward compatible to
the behavior without this patch.
The following high leve APIs are provided to the userspace:
- OVS_CT_LIMIT_CMD_SET:
* set default connection limit for all zones
* set the connection limit for a particular zone
- OVS_CT_LIMIT_CMD_DEL:
* remove the connection limit for a particular zone
- OVS_CT_LIMIT_CMD_GET:
* get the default connection limit for all zones
* get the connection limit for a particular zone
Signed-off-by: Yi-Hung Wei <yihung.wei@gmail.com>
Acked-by: Pravin B Shelar <pshelar@ovn.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Define netlink messages and attributes to support user kernel
communication that uses the conntrack limit feature.
Signed-off-by: Yi-Hung Wei <yihung.wei@gmail.com>
Acked-by: Pravin B Shelar <pshelar@ovn.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
