The i.MX SoC updates for 4.4:
- Enable suspend and cpufreq support for i.MX6UL - Add platform level ENET initialization support for i.MX7D -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJWJP9yAAoJEFBXWFqHsHzOJvQH/3sncCMvFmOXX1hBJzb4BzE6 4Ke4AC39v1TuviNkVZooMiVlW5uf4tvyvyv47GjF88yRsHJmvt1s0T7502v4+dib Ak6dj58uqdC4yj6RF5eZBwqHV4s3nZbESYt4Dr17rka/HqhvhH7yxFpWBzPWqLUb YK5nlyBe8r9Mrsgr8mkFEKHmzgMhOTlomkUk3f5BL7TjrRCA+b5Czed/P0hZ7OVx cIqALqMregcqmvH21bA6feSs1NARLfcBraWH4/YxSRFrXng8XCb1bGF6P8U78bSz aQ6VZFWEInJBNKfQR+5N5+yfPnm25AIAHdqv1cyIODBPbFy7t5hyyzdmtEmNskM= =naPW -----END PGP SIGNATURE----- Merge tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc The i.MX SoC updates for 4.4: - Enable suspend and cpufreq support for i.MX6UL - Add platform level ENET initialization support for i.MX7D * tag 'imx-soc-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: add cpufreq device for imx6ul ARM: imx: add enet init for i.MX7D platform ARM: imx7d: add imx7d iomux-gpr field define ARM: imx: add suspend/resume support for i.mx6ul Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
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6 changed files with 174 additions and 6 deletions
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include/linux/mfd/syscon/imx7-iomuxc-gpr.h
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include/linux/mfd/syscon/imx7-iomuxc-gpr.h
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_IMX7_IOMUXC_GPR_H
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#define __LINUX_IMX7_IOMUXC_GPR_H
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#define IOMUXC_GPR0 0x00
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#define IOMUXC_GPR1 0x04
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#define IOMUXC_GPR2 0x08
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#define IOMUXC_GPR3 0x0c
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#define IOMUXC_GPR4 0x10
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#define IOMUXC_GPR5 0x14
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#define IOMUXC_GPR6 0x18
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#define IOMUXC_GPR7 0x1c
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#define IOMUXC_GPR8 0x20
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#define IOMUXC_GPR9 0x24
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#define IOMUXC_GPR10 0x28
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#define IOMUXC_GPR11 0x2c
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#define IOMUXC_GPR12 0x30
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#define IOMUXC_GPR13 0x34
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#define IOMUXC_GPR14 0x38
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#define IOMUXC_GPR15 0x3c
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#define IOMUXC_GPR16 0x40
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#define IOMUXC_GPR17 0x44
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#define IOMUXC_GPR18 0x48
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#define IOMUXC_GPR19 0x4c
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#define IOMUXC_GPR20 0x50
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#define IOMUXC_GPR21 0x54
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#define IOMUXC_GPR22 0x58
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/* For imx7d iomux gpr register field define */
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#define IMX7D_GPR1_IRQ_MASK (0x1 << 12)
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#define IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK (0x1 << 13)
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#define IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK (0x1 << 14)
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#define IMX7D_GPR1_ENET_TX_CLK_SEL_MASK (0x3 << 13)
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#define IMX7D_GPR1_ENET1_CLK_DIR_MASK (0x1 << 17)
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#define IMX7D_GPR1_ENET2_CLK_DIR_MASK (0x1 << 18)
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#define IMX7D_GPR1_ENET_CLK_DIR_MASK (0x3 << 17)
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#define IMX7D_GPR5_CSI_MUX_CONTROL_MIPI (0x1 << 4)
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#endif /* __LINUX_IMX7_IOMUXC_GPR_H */
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