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ARM: dts: exynos: add CPU topology to Exynos5260

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Describe Exynos5260 CPU topology.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210731092409.31496-5-krzysztof.kozlowski@canonical.com
This commit is contained in:
Krzysztof Kozlowski 2021-07-31 11:24:06 +02:00
parent fc6d5c9953
commit fa0c56dbc3
1 changed files with 32 additions and 6 deletions
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38
arch/arm/boot/dts/exynos5260.dtsi
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@ -34,42 +34,68 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
};
cluster1 {
core0 {
cpu = <&cpu2>;
};
core1 {
cpu = <&cpu3>;
};
core2 {
cpu = <&cpu4>;
};
core3 {
cpu = <&cpu5>;
};
};
};
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
cci-control-port = <&cci_control1>;
};
cpu@1 {
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x1>;
cci-control-port = <&cci_control1>;
};
cpu@100 {
cpu2: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
cci-control-port = <&cci_control0>;
};
cpu@101 {
cpu3: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x101>;
cci-control-port = <&cci_control0>;
};
cpu@102 {
cpu4: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x102>;
cci-control-port = <&cci_control0>;
};
cpu@103 {
cpu5: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x103>;