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ARM: dts: ZII: Disable HW Ethernet switch reset GPIOs

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Disable Ethernet switch reset GPIO with ZII platforms that have it
enabled.  HW switch reset results in a reset of the copper PHYs
inside of the switch.  We want to avoid this reset of the copper PHYs
in the switch as this results in unnecessary broader network disruption on
a soft reboot of the application processor.

With the HW GPIO removed, the switch driver still performs a soft reset of
the switch core which has been shown to sufficiently meet our needs with
other ZII platforms that do not have the HW switch reset GPIO defined.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Chris Healy 2020-07-22 13:33:41 -07:00 • committed by Shawn Guo
parent 383689f4b8
commit f7e630bcae
4 changed files with 0 additions and 8 deletions
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2
arch/arm/boot/dts/vf610-zii-cfu1.dts
View file

@ -172,7 +172,6 @@
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
@ -356,7 +355,6 @@
pinctrl_switch: switch-grp {
fsl,pins = <
VF610_PAD_PTB28__GPIO_98 0x3061
VF610_PAD_PTE2__GPIO_107 0x1042
>;
};

2
arch/arm/boot/dts/vf610-zii-spb4.dts
View file

@ -129,7 +129,6 @@
pinctrl-names = "default";
reg = <0>;
eeprom-length = <65536>;
reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@ -326,7 +325,6 @@
pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
fsl,pins = <
VF610_PAD_PTE2__GPIO_107 0x31c2
VF610_PAD_PTB28__GPIO_98 0x219d
>;
};

2
arch/arm/boot/dts/vf610-zii-ssmb-dtu.dts
View file

@ -118,7 +118,6 @@
pinctrl-names = "default";
reg = <0>;
eeprom-length = <65536>;
reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@ -293,7 +292,6 @@
pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
fsl,pins = <
VF610_PAD_PTE2__GPIO_107 0x31c2
VF610_PAD_PTB28__GPIO_98 0x219d
>;
};

2
arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts
View file

@ -143,7 +143,6 @@
pinctrl-names = "default";
reg = <0>;
eeprom-length = <65536>;
reset-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@ -333,7 +332,6 @@
pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
fsl,pins = <
VF610_PAD_PTE2__GPIO_107 0x31c2
VF610_PAD_PTB28__GPIO_98 0x219d
>;
};