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Char/Misc driver patches for 4.16-rc1

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Here is the big pull request for char/misc drivers for 4.16-rc1.
 
 There's a lot of stuff in here.  Three new driver subsystems were added
 for various types of hardware busses:
 	- siox
 	- slimbus
 	- soundwire
 as well as a new vboxguest subsystem for the VirtualBox hypervisor
 drivers.
 
 There's also big updates from the FPGA subsystem, lots of Android binder
 fixes, the usual handful of hyper-v updates, and lots of other smaller
 driver updates.
 
 All of these have been in linux-next for a long time, with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big pull request for char/misc drivers for 4.16-rc1.

  There's a lot of stuff in here. Three new driver subsystems were added
  for various types of hardware busses:

   - siox
   - slimbus
   - soundwire

  as well as a new vboxguest subsystem for the VirtualBox hypervisor
  drivers.

  There's also big updates from the FPGA subsystem, lots of Android
  binder fixes, the usual handful of hyper-v updates, and lots of other
  smaller driver updates.

  All of these have been in linux-next for a long time, with no reported
  issues"

* tag 'char-misc-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (155 commits)
  char: lp: use true or false for boolean values
  android: binder: use VM_ALLOC to get vm area
  android: binder: Use true and false for boolean values
  lkdtm: fix handle_irq_event symbol for INT_HW_IRQ_EN
  EISA: Delete error message for a failed memory allocation in eisa_probe()
  EISA: Whitespace cleanup
  misc: remove AVR32 dependencies
  virt: vbox: Add error mapping for VERR_INVALID_NAME and VERR_NO_MORE_FILES
  soundwire: Fix a signedness bug
  uio_hv_generic: fix new type mismatch warnings
  uio_hv_generic: fix type mismatch warnings
  auxdisplay: img-ascii-lcd: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
  uio_hv_generic: add rescind support
  uio_hv_generic: check that host supports monitor page
  uio_hv_generic: create send and receive buffers
  uio: document uio_hv_generic regions
  doc: fix documentation about uio_hv_generic
  vmbus: add monitor_id and subchannel_id to sysfs per channel
  vmbus: fix ABI documentation
  uio_hv_generic: use ISR callback method
  ...
This commit is contained in:
Linus Torvalds 2018-02-01 10:31:17 -08:00
commit f6cff79f1d
150 changed files with 14300 additions and 1154 deletions
Download patch file Download diff file Expand all files Collapse all files

14
include/linux/fpga/fpga-bridge.h
View file

@ -1,10 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/device.h>
#include <linux/fpga/fpga-mgr.h>
#ifndef _LINUX_FPGA_BRIDGE_H
#define _LINUX_FPGA_BRIDGE_H
#include <linux/device.h>
#include <linux/fpga/fpga-mgr.h>
struct fpga_bridge;
/**
@ -12,11 +13,13 @@ struct fpga_bridge;
* @enable_show: returns the FPGA bridge's status
* @enable_set: set a FPGA bridge as enabled or disabled
* @fpga_bridge_remove: set FPGA into a specific state during driver remove
* @groups: optional attribute groups.
*/
struct fpga_bridge_ops {
int (*enable_show)(struct fpga_bridge *bridge);
int (*enable_set)(struct fpga_bridge *bridge, bool enable);
void (*fpga_bridge_remove)(struct fpga_bridge *bridge);
const struct attribute_group **groups;
};
/**
@ -43,6 +46,8 @@ struct fpga_bridge {
struct fpga_bridge *of_fpga_bridge_get(struct device_node *node,
struct fpga_image_info *info);
struct fpga_bridge *fpga_bridge_get(struct device *dev,
struct fpga_image_info *info);
void fpga_bridge_put(struct fpga_bridge *bridge);
int fpga_bridge_enable(struct fpga_bridge *bridge);
int fpga_bridge_disable(struct fpga_bridge *bridge);
@ -50,9 +55,12 @@ int fpga_bridge_disable(struct fpga_bridge *bridge);
int fpga_bridges_enable(struct list_head *bridge_list);
int fpga_bridges_disable(struct list_head *bridge_list);
void fpga_bridges_put(struct list_head *bridge_list);
int fpga_bridge_get_to_list(struct device_node *np,
int fpga_bridge_get_to_list(struct device *dev,
struct fpga_image_info *info,
struct list_head *bridge_list);
int of_fpga_bridge_get_to_list(struct device_node *np,
struct fpga_image_info *info,
struct list_head *bridge_list);
int fpga_bridge_register(struct device *dev, const char *name,
const struct fpga_bridge_ops *br_ops, void *priv);

39
include/linux/fpga/fpga-mgr.h
View file

@ -1,7 +1,8 @@
/*
* FPGA Framework
*
* Copyright (C) 2013-2015 Altera Corporation
* Copyright (C) 2013-2016 Altera Corporation
* Copyright (C) 2017 Intel Corporation
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@ -15,12 +16,12 @@
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/mutex.h>
#include <linux/platform_device.h>
#ifndef _LINUX_FPGA_MGR_H
#define _LINUX_FPGA_MGR_H
#include <linux/mutex.h>
#include <linux/platform_device.h>
struct fpga_manager;
struct sg_table;
@ -83,12 +84,26 @@ enum fpga_mgr_states {
* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
* @config_complete_timeout_us: maximum time for FPGA to switch to operating
* status in the write_complete op.
* @firmware_name: name of FPGA image firmware file
* @sgt: scatter/gather table containing FPGA image
* @buf: contiguous buffer containing FPGA image
* @count: size of buf
* @dev: device that owns this
* @overlay: Device Tree overlay
*/
struct fpga_image_info {
u32 flags;
u32 enable_timeout_us;
u32 disable_timeout_us;
u32 config_complete_timeout_us;
char *firmware_name;
struct sg_table *sgt;
const char *buf;
size_t count;
struct device *dev;
#ifdef CONFIG_OF
struct device_node *overlay;
#endif
};
/**
@ -100,6 +115,7 @@ struct fpga_image_info {
* @write_sg: write the scatter list of configuration data to the FPGA
* @write_complete: set FPGA to operating state after writing is done
* @fpga_remove: optional: Set FPGA into a specific state during driver remove
* @groups: optional attribute groups.
*
* fpga_manager_ops are the low level functions implemented by a specific
* fpga manager driver. The optional ones are tested for NULL before being
@ -116,6 +132,7 @@ struct fpga_manager_ops {
int (*write_complete)(struct fpga_manager *mgr,
struct fpga_image_info *info);
void (*fpga_remove)(struct fpga_manager *mgr);
const struct attribute_group **groups;
};
/**
@ -138,14 +155,14 @@ struct fpga_manager {
#define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
const char *buf, size_t count);
int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
struct sg_table *sgt);
struct fpga_image_info *fpga_image_info_alloc(struct device *dev);
int fpga_mgr_firmware_load(struct fpga_manager *mgr,
struct fpga_image_info *info,
const char *image_name);
void fpga_image_info_free(struct fpga_image_info *info);
int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info);
int fpga_mgr_lock(struct fpga_manager *mgr);
void fpga_mgr_unlock(struct fpga_manager *mgr);
struct fpga_manager *of_fpga_mgr_get(struct device_node *node);

40
include/linux/fpga/fpga-region.h Normal file
View file

@ -0,0 +1,40 @@
#ifndef _FPGA_REGION_H
#define _FPGA_REGION_H
#include <linux/device.h>
#include <linux/fpga/fpga-mgr.h>
#include <linux/fpga/fpga-bridge.h>
/**
* struct fpga_region - FPGA Region structure
* @dev: FPGA Region device
* @mutex: enforces exclusive reference to region
* @bridge_list: list of FPGA bridges specified in region
* @mgr: FPGA manager
* @info: FPGA image info
* @priv: private data
* @get_bridges: optional function to get bridges to a list
* @groups: optional attribute groups.
*/
struct fpga_region {
struct device dev;
struct mutex mutex; /* for exclusive reference to region */
struct list_head bridge_list;
struct fpga_manager *mgr;
struct fpga_image_info *info;
void *priv;
int (*get_bridges)(struct fpga_region *region);
const struct attribute_group **groups;
};
#define to_fpga_region(d) container_of(d, struct fpga_region, dev)
struct fpga_region *fpga_region_class_find(
struct device *start, const void *data,
int (*match)(struct device *, const void *));
int fpga_region_program_fpga(struct fpga_region *region);
int fpga_region_register(struct device *dev, struct fpga_region *region);
int fpga_region_unregister(struct fpga_region *region);
#endif /* _FPGA_REGION_H */

84
include/linux/i7300_idle.h
View file

@ -1,84 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef I7300_IDLE_H
#define I7300_IDLE_H
#include <linux/pci.h>
/*
* I/O AT controls (PCI bus 0 device 8 function 0)
* DIMM controls (PCI bus 0 device 16 function 1)
*/
#define IOAT_BUS 0
#define IOAT_DEVFN PCI_DEVFN(8, 0)
#define MEMCTL_BUS 0
#define MEMCTL_DEVFN PCI_DEVFN(16, 1)
struct fbd_ioat {
unsigned int vendor;
unsigned int ioat_dev;
unsigned int enabled;
};
/*
* The i5000 chip-set has the same hooks as the i7300
* but it is not enabled by default and must be manually
* manually enabled with "forceload=1" because it is
* only lightly validated.
*/
static const struct fbd_ioat fbd_ioat_list[] = {
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB, 1},
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT, 0},
{0, 0}
};
/* table of devices that work with this driver */
static const struct pci_device_id pci_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_FBD_CNB) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5000_ERR) },
{ } /* Terminating entry */
};
/* Check for known platforms with I/O-AT */
static inline int i7300_idle_platform_probe(struct pci_dev **fbd_dev,
struct pci_dev **ioat_dev,
int enable_all)
{
int i;
struct pci_dev *memdev, *dmadev;
memdev = pci_get_bus_and_slot(MEMCTL_BUS, MEMCTL_DEVFN);
if (!memdev)
return -ENODEV;
for (i = 0; pci_tbl[i].vendor != 0; i++) {
if (memdev->vendor == pci_tbl[i].vendor &&
memdev->device == pci_tbl[i].device) {
break;
}
}
if (pci_tbl[i].vendor == 0)
return -ENODEV;
dmadev = pci_get_bus_and_slot(IOAT_BUS, IOAT_DEVFN);
if (!dmadev)
return -ENODEV;
for (i = 0; fbd_ioat_list[i].vendor != 0; i++) {
if (dmadev->vendor == fbd_ioat_list[i].vendor &&
dmadev->device == fbd_ioat_list[i].ioat_dev) {
if (!(fbd_ioat_list[i].enabled || enable_all))
continue;
if (fbd_dev)
*fbd_dev = memdev;
if (ioat_dev)
*ioat_dev = dmadev;
return 0;
}
}
return -ENODEV;
}
#endif

19
include/linux/mod_devicetable.h
View file

@ -229,6 +229,12 @@ struct hda_device_id {
unsigned long driver_data;
};
struct sdw_device_id {
__u16 mfg_id;
__u16 part_id;
kernel_ulong_t driver_data;
};
/*
* Struct used for matching a device
*/
@ -452,6 +458,19 @@ struct spi_device_id {
kernel_ulong_t driver_data; /* Data private to the driver */
};
/* SLIMbus */
#define SLIMBUS_NAME_SIZE 32
#define SLIMBUS_MODULE_PREFIX "slim:"
struct slim_device_id {
__u16 manf_id, prod_code;
__u16 dev_index, instance;
/* Data private to the driver */
kernel_ulong_t driver_data;
};
#define SPMI_NAME_SIZE 32
#define SPMI_MODULE_PREFIX "spmi:"

5
include/linux/mux/consumer.h
View file

@ -1,13 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* mux/consumer.h - definitions for the multiplexer consumer interface
*
* Copyright (C) 2017 Axentia Technologies AB
*
* Author: Peter Rosin <peda@axentia.se>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _LINUX_MUX_CONSUMER_H

5
include/linux/mux/driver.h
View file

@ -1,13 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* mux/driver.h - definitions for the multiplexer driver interface
*
* Copyright (C) 2017 Axentia Technologies AB
*
* Author: Peter Rosin <peda@axentia.se>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _LINUX_MUX_DRIVER_H

18
include/linux/regmap.h
View file

@ -24,6 +24,7 @@ struct module;
struct device;
struct i2c_client;
struct irq_domain;
struct slim_device;
struct spi_device;
struct spmi_device;
struct regmap;
@ -511,6 +512,10 @@ struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
const struct regmap_config *config,
struct lock_class_key *lock_key,
const char *lock_name);
struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
const struct regmap_config *config,
struct lock_class_key *lock_key,
const char *lock_name);
struct regmap *__regmap_init_spi(struct spi_device *dev,
const struct regmap_config *config,
struct lock_class_key *lock_key,
@ -635,6 +640,19 @@ int regmap_attach_dev(struct device *dev, struct regmap *map,
__regmap_lockdep_wrapper(__regmap_init_i2c, #config, \
i2c, config)
/**
* regmap_init_slimbus() - Initialise register map
*
* @slimbus: Device that will be interacted with
* @config: Configuration for register map
*
* The return value will be an ERR_PTR() on error or a valid pointer to
* a struct regmap.
*/
#define regmap_init_slimbus(slimbus, config) \
__regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \
slimbus, config)
/**
* regmap_init_spi() - Initialise register map
*

77
include/linux/siox.h Normal file
View file

@ -0,0 +1,77 @@
/*
* Copyright (C) 2015 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <linux/device.h>
#define to_siox_device(_dev) container_of((_dev), struct siox_device, dev)
struct siox_device {
struct list_head node; /* node in smaster->devices */
struct siox_master *smaster;
struct device dev;
const char *type;
size_t inbytes;
size_t outbytes;
u8 statustype;
u8 status_read_clean;
u8 status_written;
u8 status_written_lastcycle;
bool connected;
/* statistics */
unsigned int watchdog_errors;
unsigned int status_errors;
struct kernfs_node *status_errors_kn;
struct kernfs_node *watchdog_kn;
struct kernfs_node *watchdog_errors_kn;
struct kernfs_node *connected_kn;
};
bool siox_device_synced(struct siox_device *sdevice);
bool siox_device_connected(struct siox_device *sdevice);
struct siox_driver {
int (*probe)(struct siox_device *sdevice);
int (*remove)(struct siox_device *sdevice);
void (*shutdown)(struct siox_device *sdevice);
/*
* buf is big enough to hold sdev->inbytes - 1 bytes, the status byte
* is in the scope of the framework.
*/
int (*set_data)(struct siox_device *sdevice, u8 status, u8 buf[]);
/*
* buf is big enough to hold sdev->outbytes - 1 bytes, the status byte
* is in the scope of the framework
*/
int (*get_data)(struct siox_device *sdevice, const u8 buf[]);
struct device_driver driver;
};
static inline struct siox_driver *to_siox_driver(struct device_driver *driver)
{
if (driver)
return container_of(driver, struct siox_driver, driver);
else
return NULL;
}
int __siox_driver_register(struct siox_driver *sdriver, struct module *owner);
static inline int siox_driver_register(struct siox_driver *sdriver)
{
return __siox_driver_register(sdriver, THIS_MODULE);
}
static inline void siox_driver_unregister(struct siox_driver *sdriver)
{
return driver_unregister(&sdriver->driver);
}

164
include/linux/slimbus.h Normal file
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@ -0,0 +1,164 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2011-2017, The Linux Foundation
*/
#ifndef _LINUX_SLIMBUS_H
#define _LINUX_SLIMBUS_H
#include <linux/device.h>
#include <linux/module.h>
#include <linux/completion.h>
#include <linux/mod_devicetable.h>
extern struct bus_type slimbus_bus;
/**
* struct slim_eaddr - Enumeration address for a SLIMbus device
* @manf_id: Manufacturer Id for the device
* @prod_code: Product code
* @dev_index: Device index
* @instance: Instance value
*/
struct slim_eaddr {
u16 manf_id;
u16 prod_code;
u8 dev_index;
u8 instance;
} __packed;
/**
* enum slim_device_status - slim device status
* @SLIM_DEVICE_STATUS_DOWN: Slim device is absent or not reported yet.
* @SLIM_DEVICE_STATUS_UP: Slim device is announced on the bus.
* @SLIM_DEVICE_STATUS_RESERVED: Reserved for future use.
*/
enum slim_device_status {
SLIM_DEVICE_STATUS_DOWN = 0,
SLIM_DEVICE_STATUS_UP,
SLIM_DEVICE_STATUS_RESERVED,
};
struct slim_controller;
/**
* struct slim_device - Slim device handle.
* @dev: Driver model representation of the device.
* @e_addr: Enumeration address of this device.
* @status: slim device status
* @ctrl: slim controller instance.
* @laddr: 1-byte Logical address of this device.
* @is_laddr_valid: indicates if the laddr is valid or not
*
* This is the client/device handle returned when a SLIMbus
* device is registered with a controller.
* Pointer to this structure is used by client-driver as a handle.
*/
struct slim_device {
struct device dev;
struct slim_eaddr e_addr;
struct slim_controller *ctrl;
enum slim_device_status status;
u8 laddr;
bool is_laddr_valid;
};
#define to_slim_device(d) container_of(d, struct slim_device, dev)
/**
* struct slim_driver - SLIMbus 'generic device' (slave) device driver
* (similar to 'spi_device' on SPI)
* @probe: Binds this driver to a SLIMbus device.
* @remove: Unbinds this driver from the SLIMbus device.
* @shutdown: Standard shutdown callback used during powerdown/halt.
* @device_status: This callback is called when
* - The device reports present and gets a laddr assigned
* - The device reports absent, or the bus goes down.
* @driver: SLIMbus device drivers should initialize name and owner field of
* this structure
* @id_table: List of SLIMbus devices supported by this driver
*/
struct slim_driver {
int (*probe)(struct slim_device *sl);
void (*remove)(struct slim_device *sl);
void (*shutdown)(struct slim_device *sl);
int (*device_status)(struct slim_device *sl,
enum slim_device_status s);
struct device_driver driver;
const struct slim_device_id *id_table;
};
#define to_slim_driver(d) container_of(d, struct slim_driver, driver)
/**
* struct slim_val_inf - Slimbus value or information element
* @start_offset: Specifies starting offset in information/value element map
* @rbuf: buffer to read the values
* @wbuf: buffer to write
* @num_bytes: upto 16. This ensures that the message will fit the slicesize
* per SLIMbus spec
* @comp: completion for asynchronous operations, valid only if TID is
* required for transaction, like REQUEST operations.
* Rest of the transactions are synchronous anyway.
*/
struct slim_val_inf {
u16 start_offset;
u8 num_bytes;
u8 *rbuf;
const u8 *wbuf;
struct completion *comp;
};
/*
* use a macro to avoid include chaining to get THIS_MODULE
*/
#define slim_driver_register(drv) \
__slim_driver_register(drv, THIS_MODULE)
int __slim_driver_register(struct slim_driver *drv, struct module *owner);
void slim_driver_unregister(struct slim_driver *drv);
/**
* module_slim_driver() - Helper macro for registering a SLIMbus driver
* @__slim_driver: slimbus_driver struct
*
* Helper macro for SLIMbus drivers which do not do anything special in module
* init/exit. This eliminates a lot of boilerplate. Each module may only
* use this macro once, and calling it replaces module_init() and module_exit()
*/
#define module_slim_driver(__slim_driver) \
module_driver(__slim_driver, slim_driver_register, \
slim_driver_unregister)
static inline void *slim_get_devicedata(const struct slim_device *dev)
{
return dev_get_drvdata(&dev->dev);
}
static inline void slim_set_devicedata(struct slim_device *dev, void *data)
{
dev_set_drvdata(&dev->dev, data);
}
struct slim_device *slim_get_device(struct slim_controller *ctrl,
struct slim_eaddr *e_addr);
int slim_get_logical_addr(struct slim_device *sbdev);
/* Information Element management messages */
#define SLIM_MSG_MC_REQUEST_INFORMATION 0x20
#define SLIM_MSG_MC_REQUEST_CLEAR_INFORMATION 0x21
#define SLIM_MSG_MC_REPLY_INFORMATION 0x24
#define SLIM_MSG_MC_CLEAR_INFORMATION 0x28
#define SLIM_MSG_MC_REPORT_INFORMATION 0x29
/* Value Element management messages */
#define SLIM_MSG_MC_REQUEST_VALUE 0x60
#define SLIM_MSG_MC_REQUEST_CHANGE_VALUE 0x61
#define SLIM_MSG_MC_REPLY_VALUE 0x64
#define SLIM_MSG_MC_CHANGE_VALUE 0x68
int slim_xfer_msg(struct slim_device *sbdev, struct slim_val_inf *msg,
u8 mc);
int slim_readb(struct slim_device *sdev, u32 addr);
int slim_writeb(struct slim_device *sdev, u32 addr, u8 value);
int slim_read(struct slim_device *sdev, u32 addr, size_t count, u8 *val);
int slim_write(struct slim_device *sdev, u32 addr, size_t count, u8 *val);
#endif /* _LINUX_SLIMBUS_H */

479
include/linux/soundwire/sdw.h Normal file
View file

@ -0,0 +1,479 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
// Copyright(c) 2015-17 Intel Corporation.
#ifndef __SOUNDWIRE_H
#define __SOUNDWIRE_H
struct sdw_bus;
struct sdw_slave;
/* SDW spec defines and enums, as defined by MIPI 1.1. Spec */
/* SDW Broadcast Device Number */
#define SDW_BROADCAST_DEV_NUM 15
/* SDW Enumeration Device Number */
#define SDW_ENUM_DEV_NUM 0
/* SDW Group Device Numbers */
#define SDW_GROUP12_DEV_NUM 12
#define SDW_GROUP13_DEV_NUM 13
/* SDW Master Device Number, not supported yet */
#define SDW_MASTER_DEV_NUM 14
#define SDW_NUM_DEV_ID_REGISTERS 6
#define SDW_MAX_DEVICES 11
/**
* enum sdw_slave_status - Slave status
* @SDW_SLAVE_UNATTACHED: Slave is not attached with the bus.
* @SDW_SLAVE_ATTACHED: Slave is attached with bus.
* @SDW_SLAVE_ALERT: Some alert condition on the Slave
* @SDW_SLAVE_RESERVED: Reserved for future use
*/
enum sdw_slave_status {
SDW_SLAVE_UNATTACHED = 0,
SDW_SLAVE_ATTACHED = 1,
SDW_SLAVE_ALERT = 2,
SDW_SLAVE_RESERVED = 3,
};
/**
* enum sdw_command_response - Command response as defined by SDW spec
* @SDW_CMD_OK: cmd was successful
* @SDW_CMD_IGNORED: cmd was ignored
* @SDW_CMD_FAIL: cmd was NACKed
* @SDW_CMD_TIMEOUT: cmd timedout
* @SDW_CMD_FAIL_OTHER: cmd failed due to other reason than above
*
* NOTE: The enum is different than actual Spec as response in the Spec is
* combination of ACK/NAK bits
*
* SDW_CMD_TIMEOUT/FAIL_OTHER is defined for SW use, not in spec
*/
enum sdw_command_response {
SDW_CMD_OK = 0,
SDW_CMD_IGNORED = 1,
SDW_CMD_FAIL = 2,
SDW_CMD_TIMEOUT = 3,
SDW_CMD_FAIL_OTHER = 4,
};
/*
* SDW properties, defined in MIPI DisCo spec v1.0
*/
enum sdw_clk_stop_reset_behave {
SDW_CLK_STOP_KEEP_STATUS = 1,
};
/**
* enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
* read
* @SDW_P15_READ_IGNORED: Read is ignored
* @SDW_P15_CMD_OK: Command is ok
*/
enum sdw_p15_behave {
SDW_P15_READ_IGNORED = 0,
SDW_P15_CMD_OK = 1,
};
/**
* enum sdw_dpn_type - Data port types
* @SDW_DPN_FULL: Full Data Port is supported
* @SDW_DPN_SIMPLE: Simplified Data Port as defined in spec.
* DPN_SampleCtrl2, DPN_OffsetCtrl2, DPN_HCtrl and DPN_BlockCtrl3
* are not implemented.
* @SDW_DPN_REDUCED: Reduced Data Port as defined in spec.
* DPN_SampleCtrl2, DPN_HCtrl are not implemented.
*/
enum sdw_dpn_type {
SDW_DPN_FULL = 0,
SDW_DPN_SIMPLE = 1,
SDW_DPN_REDUCED = 2,
};
/**
* enum sdw_clk_stop_mode - Clock Stop modes
* @SDW_CLK_STOP_MODE0: Slave can continue operation seamlessly on clock
* restart
* @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
* not capable of continuing operation seamlessly when the clock restarts
*/
enum sdw_clk_stop_mode {
SDW_CLK_STOP_MODE0 = 0,
SDW_CLK_STOP_MODE1 = 1,
};
/**
* struct sdw_dp0_prop - DP0 properties
* @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
* (inclusive)
* @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
* (inclusive)
* @num_words: number of wordlengths supported
* @words: wordlengths supported
* @flow_controlled: Slave implementation results in an OK_NotReady
* response
* @simple_ch_prep_sm: If channel prepare sequence is required
* @device_interrupts: If implementation-defined interrupts are supported
*
* The wordlengths are specified by Spec as max, min AND number of
* discrete values, implementation can define based on the wordlengths they
* support
*/
struct sdw_dp0_prop {
u32 max_word;
u32 min_word;
u32 num_words;
u32 *words;
bool flow_controlled;
bool simple_ch_prep_sm;
bool device_interrupts;
};
/**
* struct sdw_dpn_audio_mode - Audio mode properties for DPn
* @bus_min_freq: Minimum bus frequency, in Hz
* @bus_max_freq: Maximum bus frequency, in Hz
* @bus_num_freq: Number of discrete frequencies supported
* @bus_freq: Discrete bus frequencies, in Hz
* @min_freq: Minimum sampling frequency, in Hz
* @max_freq: Maximum sampling bus frequency, in Hz
* @num_freq: Number of discrete sampling frequency supported
* @freq: Discrete sampling frequencies, in Hz
* @prep_ch_behave: Specifies the dependencies between Channel Prepare
* sequence and bus clock configuration
* If 0, Channel Prepare can happen at any Bus clock rate
* If 1, Channel Prepare sequence shall happen only after Bus clock is
* changed to a frequency supported by this mode or compatible modes
* described by the next field
* @glitchless: Bitmap describing possible glitchless transitions from this
* Audio Mode to other Audio Modes
*/
struct sdw_dpn_audio_mode {
u32 bus_min_freq;
u32 bus_max_freq;
u32 bus_num_freq;
u32 *bus_freq;
u32 max_freq;
u32 min_freq;
u32 num_freq;
u32 *freq;
u32 prep_ch_behave;
u32 glitchless;
};
/**
* struct sdw_dpn_prop - Data Port DPn properties
* @num: port number
* @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
* (inclusive)
* @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
* (inclusive)
* @num_words: Number of discrete supported wordlengths
* @words: Discrete supported wordlength
* @type: Data port type. Full, Simplified or Reduced
* @max_grouping: Maximum number of samples that can be grouped together for
* a full data port
* @simple_ch_prep_sm: If the port supports simplified channel prepare state
* machine
* @ch_prep_timeout: Port-specific timeout value, in milliseconds
* @device_interrupts: If set, each bit corresponds to support for
* implementation-defined interrupts
* @max_ch: Maximum channels supported
* @min_ch: Minimum channels supported
* @num_ch: Number of discrete channels supported
* @ch: Discrete channels supported
* @num_ch_combinations: Number of channel combinations supported
* @ch_combinations: Channel combinations supported
* @modes: SDW mode supported
* @max_async_buffer: Number of samples that this port can buffer in
* asynchronous modes
* @block_pack_mode: Type of block port mode supported
* @port_encoding: Payload Channel Sample encoding schemes supported
* @audio_modes: Audio modes supported
*/
struct sdw_dpn_prop {
u32 num;
u32 max_word;
u32 min_word;
u32 num_words;
u32 *words;
enum sdw_dpn_type type;
u32 max_grouping;
bool simple_ch_prep_sm;
u32 ch_prep_timeout;
u32 device_interrupts;
u32 max_ch;
u32 min_ch;
u32 num_ch;
u32 *ch;
u32 num_ch_combinations;
u32 *ch_combinations;
u32 modes;
u32 max_async_buffer;
bool block_pack_mode;
u32 port_encoding;
struct sdw_dpn_audio_mode *audio_modes;
};
/**
* struct sdw_slave_prop - SoundWire Slave properties
* @mipi_revision: Spec version of the implementation
* @wake_capable: Wake-up events are supported
* @test_mode_capable: If test mode is supported
* @clk_stop_mode1: Clock-Stop Mode 1 is supported
* @simple_clk_stop_capable: Simple clock mode is supported
* @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
* Machine transitions, in milliseconds
* @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
* transitions, in milliseconds
* @reset_behave: Slave keeps the status of the SlaveStopClockPrepare
* state machine (P=1 SCSP_SM) after exit from clock-stop mode1
* @high_PHY_capable: Slave is HighPHY capable
* @paging_support: Slave implements paging registers SCP_AddrPage1 and
* SCP_AddrPage2
* @bank_delay_support: Slave implements bank delay/bridge support registers
* SCP_BankDelay and SCP_NextFrame
* @p15_behave: Slave behavior when the Master attempts a read to the Port15
* alias
* @lane_control_support: Slave supports lane control
* @master_count: Number of Masters present on this Slave
* @source_ports: Bitmap identifying source ports
* @sink_ports: Bitmap identifying sink ports
* @dp0_prop: Data Port 0 properties
* @src_dpn_prop: Source Data Port N properties
* @sink_dpn_prop: Sink Data Port N properties
*/
struct sdw_slave_prop {
u32 mipi_revision;
bool wake_capable;
bool test_mode_capable;
bool clk_stop_mode1;
bool simple_clk_stop_capable;
u32 clk_stop_timeout;
u32 ch_prep_timeout;
enum sdw_clk_stop_reset_behave reset_behave;
bool high_PHY_capable;
bool paging_support;
bool bank_delay_support;
enum sdw_p15_behave p15_behave;
bool lane_control_support;
u32 master_count;
u32 source_ports;
u32 sink_ports;
struct sdw_dp0_prop *dp0_prop;
struct sdw_dpn_prop *src_dpn_prop;
struct sdw_dpn_prop *sink_dpn_prop;
};
/**
* struct sdw_master_prop - Master properties
* @revision: MIPI spec version of the implementation
* @master_count: Number of masters
* @clk_stop_mode: Bitmap for Clock Stop modes supported
* @max_freq: Maximum Bus clock frequency, in Hz
* @num_clk_gears: Number of clock gears supported
* @clk_gears: Clock gears supported
* @num_freq: Number of clock frequencies supported, in Hz
* @freq: Clock frequencies supported, in Hz
* @default_frame_rate: Controller default Frame rate, in Hz
* @default_row: Number of rows
* @default_col: Number of columns
* @dynamic_frame: Dynamic frame supported
* @err_threshold: Number of times that software may retry sending a single
* command
* @dpn_prop: Data Port N properties
*/
struct sdw_master_prop {
u32 revision;
u32 master_count;
enum sdw_clk_stop_mode clk_stop_mode;
u32 max_freq;
u32 num_clk_gears;
u32 *clk_gears;
u32 num_freq;
u32 *freq;
u32 default_frame_rate;
u32 default_row;
u32 default_col;
bool dynamic_frame;
u32 err_threshold;
struct sdw_dpn_prop *dpn_prop;
};
int sdw_master_read_prop(struct sdw_bus *bus);
int sdw_slave_read_prop(struct sdw_slave *slave);
/*
* SDW Slave Structures and APIs
*/
/**
* struct sdw_slave_id - Slave ID
* @mfg_id: MIPI Manufacturer ID
* @part_id: Device Part ID
* @class_id: MIPI Class ID, unused now.
* Currently a placeholder in MIPI SoundWire Spec
* @unique_id: Device unique ID
* @sdw_version: SDW version implemented
*
* The order of the IDs here does not follow the DisCo spec definitions
*/
struct sdw_slave_id {
__u16 mfg_id;
__u16 part_id;
__u8 class_id;
__u8 unique_id:4;
__u8 sdw_version:4;
};
/**
* struct sdw_slave_intr_status - Slave interrupt status
* @control_port: control port status
* @port: data port status
*/
struct sdw_slave_intr_status {
u8 control_port;
u8 port[15];
};
/**
* struct sdw_slave_ops - Slave driver callback ops
* @read_prop: Read Slave properties
* @interrupt_callback: Device interrupt notification (invoked in thread
* context)
* @update_status: Update Slave status
*/
struct sdw_slave_ops {
int (*read_prop)(struct sdw_slave *sdw);
int (*interrupt_callback)(struct sdw_slave *slave,
struct sdw_slave_intr_status *status);
int (*update_status)(struct sdw_slave *slave,
enum sdw_slave_status status);
};
/**
* struct sdw_slave - SoundWire Slave
* @id: MIPI device ID
* @dev: Linux device
* @status: Status reported by the Slave
* @bus: Bus handle
* @ops: Slave callback ops
* @prop: Slave properties
* @node: node for bus list
* @port_ready: Port ready completion flag for each Slave port
* @dev_num: Device Number assigned by Bus
*/
struct sdw_slave {
struct sdw_slave_id id;
struct device dev;
enum sdw_slave_status status;
struct sdw_bus *bus;
const struct sdw_slave_ops *ops;
struct sdw_slave_prop prop;
struct list_head node;
struct completion *port_ready;
u16 dev_num;
};
#define dev_to_sdw_dev(_dev) container_of(_dev, struct sdw_slave, dev)
struct sdw_driver {
const char *name;
int (*probe)(struct sdw_slave *sdw,
const struct sdw_device_id *id);
int (*remove)(struct sdw_slave *sdw);
void (*shutdown)(struct sdw_slave *sdw);
const struct sdw_device_id *id_table;
const struct sdw_slave_ops *ops;
struct device_driver driver;
};
#define SDW_SLAVE_ENTRY(_mfg_id, _part_id, _drv_data) \
{ .mfg_id = (_mfg_id), .part_id = (_part_id), \
.driver_data = (unsigned long)(_drv_data) }
int sdw_handle_slave_status(struct sdw_bus *bus,
enum sdw_slave_status status[]);
/*
* SDW master structures and APIs
*/
struct sdw_msg;
/**
* struct sdw_defer - SDW deffered message
* @length: message length
* @complete: message completion
* @msg: SDW message
*/
struct sdw_defer {
int length;
struct completion complete;
struct sdw_msg *msg;
};
/**
* struct sdw_master_ops - Master driver ops
* @read_prop: Read Master properties
* @xfer_msg: Transfer message callback
* @xfer_msg_defer: Defer version of transfer message callback
* @reset_page_addr: Reset the SCP page address registers
*/
struct sdw_master_ops {
int (*read_prop)(struct sdw_bus *bus);
enum sdw_command_response (*xfer_msg)
(struct sdw_bus *bus, struct sdw_msg *msg);
enum sdw_command_response (*xfer_msg_defer)
(struct sdw_bus *bus, struct sdw_msg *msg,
struct sdw_defer *defer);
enum sdw_command_response (*reset_page_addr)
(struct sdw_bus *bus, unsigned int dev_num);
};
/**
* struct sdw_bus - SoundWire bus
* @dev: Master linux device
* @link_id: Link id number, can be 0 to N, unique for each Master
* @slaves: list of Slaves on this bus
* @assigned: Bitmap for Slave device numbers.
* Bit set implies used number, bit clear implies unused number.
* @bus_lock: bus lock
* @msg_lock: message lock
* @ops: Master callback ops
* @prop: Master properties
* @defer_msg: Defer message
* @clk_stop_timeout: Clock stop timeout computed
*/
struct sdw_bus {
struct device *dev;
unsigned int link_id;
struct list_head slaves;
DECLARE_BITMAP(assigned, SDW_MAX_DEVICES);
struct mutex bus_lock;
struct mutex msg_lock;
const struct sdw_master_ops *ops;
struct sdw_master_prop prop;
struct sdw_defer defer_msg;
unsigned int clk_stop_timeout;
};
int sdw_add_bus_master(struct sdw_bus *bus);
void sdw_delete_bus_master(struct sdw_bus *bus);
/* messaging and data APIs */
int sdw_read(struct sdw_slave *slave, u32 addr);
int sdw_write(struct sdw_slave *slave, u32 addr, u8 value);
int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
#endif /* __SOUNDWIRE_H */

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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
// Copyright(c) 2015-17 Intel Corporation.
#ifndef __SDW_INTEL_H
#define __SDW_INTEL_H
/**
* struct sdw_intel_res - Soundwire Intel resource structure
* @mmio_base: mmio base of SoundWire registers
* @irq: interrupt number
* @handle: ACPI parent handle
* @parent: parent device
*/
struct sdw_intel_res {
void __iomem *mmio_base;
int irq;
acpi_handle handle;
struct device *parent;
};
void *sdw_intel_init(acpi_handle *parent_handle, struct sdw_intel_res *res);
void sdw_intel_exit(void *arg);
#endif

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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
// Copyright(c) 2015-17 Intel Corporation.
#ifndef __SDW_REGISTERS_H
#define __SDW_REGISTERS_H
/*
* typically we define register and shifts but if one observes carefully,
* the shift can be generated from MASKS using few bit primitaives like ffs
* etc, so we use that and avoid defining shifts
*/
#define SDW_REG_SHIFT(n) (ffs(n) - 1)
/*
* SDW registers as defined by MIPI 1.1 Spec
*/
#define SDW_REGADDR GENMASK(14, 0)
#define SDW_SCP_ADDRPAGE2_MASK GENMASK(22, 15)
#define SDW_SCP_ADDRPAGE1_MASK GENMASK(30, 23)
#define SDW_REG_NO_PAGE 0x00008000
#define SDW_REG_OPTIONAL_PAGE 0x00010000
#define SDW_REG_MAX 0x80000000
#define SDW_DPN_SIZE 0x100
#define SDW_BANK1_OFFSET 0x10
/*
* DP0 Interrupt register & bits
*
* Spec treats Status (RO) and Clear (WC) as separate but they are same
* address, so treat as same register with WC.
*/
/* both INT and STATUS register are same */
#define SDW_DP0_INT 0x0
#define SDW_DP0_INTMASK 0x1
#define SDW_DP0_PORTCTRL 0x2
#define SDW_DP0_BLOCKCTRL1 0x3
#define SDW_DP0_PREPARESTATUS 0x4
#define SDW_DP0_PREPARECTRL 0x5
#define SDW_DP0_INT_TEST_FAIL BIT(0)
#define SDW_DP0_INT_PORT_READY BIT(1)
#define SDW_DP0_INT_BRA_FAILURE BIT(2)
#define SDW_DP0_INT_IMPDEF1 BIT(5)
#define SDW_DP0_INT_IMPDEF2 BIT(6)
#define SDW_DP0_INT_IMPDEF3 BIT(7)
#define SDW_DP0_PORTCTRL_DATAMODE GENMASK(3, 2)
#define SDW_DP0_PORTCTRL_NXTINVBANK BIT(4)
#define SDW_DP0_PORTCTRL_BPT_PAYLD GENMASK(7, 6)
#define SDW_DP0_CHANNELEN 0x20
#define SDW_DP0_SAMPLECTRL1 0x22
#define SDW_DP0_SAMPLECTRL2 0x23
#define SDW_DP0_OFFSETCTRL1 0x24
#define SDW_DP0_OFFSETCTRL2 0x25
#define SDW_DP0_HCTRL 0x26
#define SDW_DP0_LANECTRL 0x28
/* Both INT and STATUS register are same */
#define SDW_SCP_INT1 0x40
#define SDW_SCP_INTMASK1 0x41
#define SDW_SCP_INT1_PARITY BIT(0)
#define SDW_SCP_INT1_BUS_CLASH BIT(1)
#define SDW_SCP_INT1_IMPL_DEF BIT(2)
#define SDW_SCP_INT1_SCP2_CASCADE BIT(7)
#define SDW_SCP_INT1_PORT0_3 GENMASK(6, 3)
#define SDW_SCP_INTSTAT2 0x42
#define SDW_SCP_INTSTAT2_SCP3_CASCADE BIT(7)
#define SDW_SCP_INTSTAT2_PORT4_10 GENMASK(6, 0)
#define SDW_SCP_INTSTAT3 0x43
#define SDW_SCP_INTSTAT3_PORT11_14 GENMASK(3, 0)
/* Number of interrupt status registers */
#define SDW_NUM_INT_STAT_REGISTERS 3
/* Number of interrupt clear registers */
#define SDW_NUM_INT_CLEAR_REGISTERS 1
#define SDW_SCP_CTRL 0x44
#define SDW_SCP_CTRL_CLK_STP_NOW BIT(1)
#define SDW_SCP_CTRL_FORCE_RESET BIT(7)
#define SDW_SCP_STAT 0x44
#define SDW_SCP_STAT_CLK_STP_NF BIT(0)
#define SDW_SCP_STAT_HPHY_NOK BIT(5)
#define SDW_SCP_STAT_CURR_BANK BIT(6)
#define SDW_SCP_SYSTEMCTRL 0x45
#define SDW_SCP_SYSTEMCTRL_CLK_STP_PREP BIT(0)
#define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE BIT(2)
#define SDW_SCP_SYSTEMCTRL_WAKE_UP_EN BIT(3)
#define SDW_SCP_SYSTEMCTRL_HIGH_PHY BIT(4)
#define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE0 0
#define SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1 BIT(2)
#define SDW_SCP_DEVNUMBER 0x46
#define SDW_SCP_HIGH_PHY_CHECK 0x47
#define SDW_SCP_ADDRPAGE1 0x48
#define SDW_SCP_ADDRPAGE2 0x49
#define SDW_SCP_KEEPEREN 0x4A
#define SDW_SCP_BANKDELAY 0x4B
#define SDW_SCP_TESTMODE 0x4F
#define SDW_SCP_DEVID_0 0x50
#define SDW_SCP_DEVID_1 0x51
#define SDW_SCP_DEVID_2 0x52
#define SDW_SCP_DEVID_3 0x53
#define SDW_SCP_DEVID_4 0x54
#define SDW_SCP_DEVID_5 0x55
/* Banked Registers */
#define SDW_SCP_FRAMECTRL_B0 0x60
#define SDW_SCP_FRAMECTRL_B1 (0x60 + SDW_BANK1_OFFSET)
#define SDW_SCP_NEXTFRAME_B0 0x61
#define SDW_SCP_NEXTFRAME_B1 (0x61 + SDW_BANK1_OFFSET)
/* Both INT and STATUS register is same */
#define SDW_DPN_INT(n) (0x0 + SDW_DPN_SIZE * (n))
#define SDW_DPN_INTMASK(n) (0x1 + SDW_DPN_SIZE * (n))
#define SDW_DPN_PORTCTRL(n) (0x2 + SDW_DPN_SIZE * (n))
#define SDW_DPN_BLOCKCTRL1(n) (0x3 + SDW_DPN_SIZE * (n))
#define SDW_DPN_PREPARESTATUS(n) (0x4 + SDW_DPN_SIZE * (n))
#define SDW_DPN_PREPARECTRL(n) (0x5 + SDW_DPN_SIZE * (n))
#define SDW_DPN_INT_TEST_FAIL BIT(0)
#define SDW_DPN_INT_PORT_READY BIT(1)
#define SDW_DPN_INT_IMPDEF1 BIT(5)
#define SDW_DPN_INT_IMPDEF2 BIT(6)
#define SDW_DPN_INT_IMPDEF3 BIT(7)
#define SDW_DPN_PORTCTRL_FLOWMODE GENMASK(1, 0)
#define SDW_DPN_PORTCTRL_DATAMODE GENMASK(3, 2)
#define SDW_DPN_PORTCTRL_NXTINVBANK BIT(4)
#define SDW_DPN_BLOCKCTRL1_WDLEN GENMASK(5, 0)
#define SDW_DPN_PREPARECTRL_CH_PREP GENMASK(7, 0)
#define SDW_DPN_CHANNELEN_B0(n) (0x20 + SDW_DPN_SIZE * (n))
#define SDW_DPN_CHANNELEN_B1(n) (0x30 + SDW_DPN_SIZE * (n))
#define SDW_DPN_BLOCKCTRL2_B0(n) (0x21 + SDW_DPN_SIZE * (n))
#define SDW_DPN_BLOCKCTRL2_B1(n) (0x31 + SDW_DPN_SIZE * (n))
#define SDW_DPN_SAMPLECTRL1_B0(n) (0x22 + SDW_DPN_SIZE * (n))
#define SDW_DPN_SAMPLECTRL1_B1(n) (0x32 + SDW_DPN_SIZE * (n))
#define SDW_DPN_SAMPLECTRL2_B0(n) (0x23 + SDW_DPN_SIZE * (n))
#define SDW_DPN_SAMPLECTRL2_B1(n) (0x33 + SDW_DPN_SIZE * (n))
#define SDW_DPN_OFFSETCTRL1_B0(n) (0x24 + SDW_DPN_SIZE * (n))
#define SDW_DPN_OFFSETCTRL1_B1(n) (0x34 + SDW_DPN_SIZE * (n))
#define SDW_DPN_OFFSETCTRL2_B0(n) (0x25 + SDW_DPN_SIZE * (n))
#define SDW_DPN_OFFSETCTRL2_B1(n) (0x35 + SDW_DPN_SIZE * (n))
#define SDW_DPN_HCTRL_B0(n) (0x26 + SDW_DPN_SIZE * (n))
#define SDW_DPN_HCTRL_B1(n) (0x36 + SDW_DPN_SIZE * (n))
#define SDW_DPN_BLOCKCTRL3_B0(n) (0x27 + SDW_DPN_SIZE * (n))
#define SDW_DPN_BLOCKCTRL3_B1(n) (0x37 + SDW_DPN_SIZE * (n))
#define SDW_DPN_LANECTRL_B0(n) (0x28 + SDW_DPN_SIZE * (n))
#define SDW_DPN_LANECTRL_B1(n) (0x38 + SDW_DPN_SIZE * (n))
#define SDW_DPN_SAMPLECTRL_LOW GENMASK(7, 0)
#define SDW_DPN_SAMPLECTRL_HIGH GENMASK(15, 8)
#define SDW_DPN_HCTRL_HSTART GENMASK(7, 4)
#define SDW_DPN_HCTRL_HSTOP GENMASK(3, 0)
#define SDW_NUM_CASC_PORT_INTSTAT1 4
#define SDW_CASC_PORT_START_INTSTAT1 0
#define SDW_CASC_PORT_MASK_INTSTAT1 0x8
#define SDW_CASC_PORT_REG_OFFSET_INTSTAT1 0x0
#define SDW_NUM_CASC_PORT_INTSTAT2 7
#define SDW_CASC_PORT_START_INTSTAT2 4
#define SDW_CASC_PORT_MASK_INTSTAT2 1
#define SDW_CASC_PORT_REG_OFFSET_INTSTAT2 1
#define SDW_NUM_CASC_PORT_INTSTAT3 4
#define SDW_CASC_PORT_START_INTSTAT3 11
#define SDW_CASC_PORT_MASK_INTSTAT3 1
#define SDW_CASC_PORT_REG_OFFSET_INTSTAT3 2
#endif /* __SDW_REGISTERS_H */

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// SPDX-License-Identifier: GPL-2.0
// Copyright(c) 2015-17 Intel Corporation.
#ifndef __SOUNDWIRE_TYPES_H
#define __SOUNDWIRE_TYPES_H
extern struct bus_type sdw_bus_type;
#define drv_to_sdw_driver(_drv) container_of(_drv, struct sdw_driver, driver)
#define sdw_register_driver(drv) \
__sdw_register_driver(drv, THIS_MODULE)
int __sdw_register_driver(struct sdw_driver *drv, struct module *);
void sdw_unregister_driver(struct sdw_driver *drv);
int sdw_slave_modalias(const struct sdw_slave *slave, char *buf, size_t size);
#endif /* __SOUNDWIRE_TYPES_H */

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/* SPDX-License-Identifier: (GPL-2.0 OR CDDL-1.0) */
/* Copyright (C) 2006-2016 Oracle Corporation */
#ifndef __VBOX_UTILS_H__
#define __VBOX_UTILS_H__
#include <linux/printk.h>
#include <linux/vbox_vmmdev_types.h>
struct vbg_dev;
/**
* vboxguest logging functions, these log both to the backdoor and call
* the equivalent kernel pr_foo function.
*/
__printf(1, 2) void vbg_info(const char *fmt, ...);
__printf(1, 2) void vbg_warn(const char *fmt, ...);
__printf(1, 2) void vbg_err(const char *fmt, ...);
/* Only use backdoor logging for non-dynamic debug builds */
#if defined(DEBUG) && !defined(CONFIG_DYNAMIC_DEBUG)
__printf(1, 2) void vbg_debug(const char *fmt, ...);
#else
#define vbg_debug pr_debug
#endif
/**
* Allocate memory for generic request and initialize the request header.
*
* Return: the allocated memory
* @len: Size of memory block required for the request.
* @req_type: The generic request type.
*/
void *vbg_req_alloc(size_t len, enum vmmdev_request_type req_type);
/**
* Perform a generic request.
*
* Return: VBox status code
* @gdev: The Guest extension device.
* @req: Pointer to the request structure.
*/
int vbg_req_perform(struct vbg_dev *gdev, void *req);
int vbg_hgcm_connect(struct vbg_dev *gdev,
struct vmmdev_hgcm_service_location *loc,
u32 *client_id, int *vbox_status);
int vbg_hgcm_disconnect(struct vbg_dev *gdev, u32 client_id, int *vbox_status);
int vbg_hgcm_call(struct vbg_dev *gdev, u32 client_id, u32 function,
u32 timeout_ms, struct vmmdev_hgcm_function_parameter *parms,
u32 parm_count, int *vbox_status);
int vbg_hgcm_call32(
struct vbg_dev *gdev, u32 client_id, u32 function, u32 timeout_ms,
struct vmmdev_hgcm_function_parameter32 *parm32, u32 parm_count,
int *vbox_status);
/**
* Convert a VirtualBox status code to a standard Linux kernel return value.
* Return: 0 or negative errno value.
* @rc: VirtualBox status code to convert.
*/
int vbg_status_code_to_errno(int rc);
/**
* Helper for the vboxsf driver to get a reference to the guest device.
* Return: a pointer to the gdev; or a ERR_PTR value on error.
*/
struct vbg_dev *vbg_get_gdev(void);
/**
* Helper for the vboxsf driver to put a guest device reference.
* @gdev: Reference returned by vbg_get_gdev to put.
*/
void vbg_put_gdev(struct vbg_dev *gdev);
#endif