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irqchip: GICv3: rework redistributor structure

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The basic GICv3 driver has almost no use for the redistributor
(other than the basic per-CPU interrupts), but the ITS needs
a lot more from them.

As such, rework the set of data structures. The behaviour of the
GICv3 driver is otherwise unaffected.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1416839720-18400-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Marc Zyngier 2014-11-24 14:35:10 +00:00 • committed by Jason Cooper
parent 443acc4f37
commit f5c1434c21
2 changed files with 59 additions and 29 deletions
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15
include/linux/irqchip/arm-gic-v3.h
View file

@ -49,6 +49,10 @@
#define GICD_CTLR_ENABLE_G1A (1U << 1)
#define GICD_CTLR_ENABLE_G1 (1U << 0)
#define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1)
#define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32)
#define GICD_TYPER_LPIS (1U << 17)
#define GICD_IROUTER_SPI_MODE_ONE (0U << 31)
#define GICD_IROUTER_SPI_MODE_ANY (1U << 31)
@ -189,6 +193,17 @@
#include <linux/stringify.h>
struct rdists {
struct {
void __iomem *rd_base;
struct page *pend_page;
phys_addr_t phys_base;
} __percpu *rdist;
struct page *prop_page;
int id_bits;
u64 flags;
};
static inline void gic_write_eoir(u64 irq)
{
asm volatile("msr_s " __stringify(ICC_EOIR1_EL1) ", %0" : : "r" (irq));