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drm/i915: Add 4th pipe and transcoder

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Add pipe D and transcoder D to prepare for platforms having them.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-2-lucas.demarchi@intel.com
This commit is contained in:
Lucas De Marchi 2019-07-11 10:30:55 -07:00
parent ddb3d12afa
commit f1f1d4fa58
3 changed files with 9 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

3
drivers/gpu/drm/i915/display/intel_display.c
View file

@ -17191,7 +17191,7 @@ struct intel_display_error_state {
u32 vtotal;
u32 vblank;
u32 vsync;
} transcoder[4];
} transcoder[5];
};
struct intel_display_error_state *
@ -17202,6 +17202,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
TRANSCODER_A,
TRANSCODER_B,
TRANSCODER_C,
TRANSCODER_D,
TRANSCODER_EDP,
};
int i;

4
drivers/gpu/drm/i915/display/intel_display.h
View file

@ -58,6 +58,7 @@ enum pipe {
PIPE_A = 0,
PIPE_B,
PIPE_C,
PIPE_D,
_PIPE_EDP,
I915_MAX_PIPES = _PIPE_EDP
@ -75,6 +76,7 @@ enum transcoder {
TRANSCODER_A = PIPE_A,
TRANSCODER_B = PIPE_B,
TRANSCODER_C = PIPE_C,
TRANSCODER_D = PIPE_D,
/*
* The following transcoders can map to any pipe, their enum value
@ -98,6 +100,8 @@ static inline const char *transcoder_name(enum transcoder transcoder)
return "B";
case TRANSCODER_C:
return "C";
case TRANSCODER_D:
return "D";
case TRANSCODER_EDP:
return "EDP";
case TRANSCODER_DSI_A:

3
drivers/gpu/drm/i915/i915_reg.h
View file

@ -4217,6 +4217,7 @@ enum {
#define TRANSCODER_B_OFFSET 0x61000
#define TRANSCODER_C_OFFSET 0x62000
#define CHV_TRANSCODER_C_OFFSET 0x63000
#define TRANSCODER_D_OFFSET 0x63000
#define TRANSCODER_EDP_OFFSET 0x6f000
#define TRANSCODER_DSI0_OFFSET 0x6b000
#define TRANSCODER_DSI1_OFFSET 0x6b800
@ -5763,6 +5764,7 @@ enum {
#define PIPE_A_OFFSET 0x70000
#define PIPE_B_OFFSET 0x71000
#define PIPE_C_OFFSET 0x72000
#define PIPE_D_OFFSET 0x73000
#define CHV_PIPE_C_OFFSET 0x74000
/*
* There's actually no pipe EDP. Some pipe registers have
@ -9346,6 +9348,7 @@ enum skl_power_gate {
#define _TRANS_DDI_FUNC_CTL_A 0x60400
#define _TRANS_DDI_FUNC_CTL_B 0x61400
#define _TRANS_DDI_FUNC_CTL_C 0x62400
#define _TRANS_DDI_FUNC_CTL_D 0x63400
#define _TRANS_DDI_FUNC_CTL_EDP 0x6F400
#define _TRANS_DDI_FUNC_CTL_DSI0 0x6b400
#define _TRANS_DDI_FUNC_CTL_DSI1 0x6bc00