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- Core Frameworks

Browse source 
- Standardise MFD_CELL_* helpers
 
  - New Drivers
    - Add support for Acer Iconia Tab A500 Embedded Controller
 
  - New Device Support
    - Add support for ROHM BD9574MWF to BD9571MWV
    - Add support for Intel Alder Lake PCH-P PCI to LPSS
    - Add support for Intel Alder Lake PCH-S PCI to LPSS
 
  - New Functionality
    - Support ACPI enumeration; arizona
 
  - Fix-ups
    - Managed resources; bd9571mwv
    - DT additions/fix-ups; bd9571mwv, iqs62x, max8997, gateworks-gsc, ene-kb930
    - Convert to SPDX; bd9571mw
    - Fix return values/error handling; sunxi
    - Provide SOFTDEP; arizona
    - Make use of DIV_ROUND_UP; mcp-sa11x0
    - Use generic APIs; arizona
    - Add MAC address sysfs entries; intel-m10-bmc
    - Trivial: Coding-style fix-ups; iqs62x
    - Trivial: Remove superflouous code; iqs62x
    - Clear-up naming conventions; iqs62x
 
  - Bug Fixes
    - Fix 'pointer from integer' error; altera-sysmgr
    - Convert SGI_MFD_IOC3 from tristate to bool; Kconfig
    - Fix interrupt handling; gateworks-gsc
    - Extend required delay; iqs62x
    - Do not use I2C polling during calibration; iqs62x
    - Do no adjust clock frequency during calibration; iqs62x
    - Fix use-after-free; wm831x-auxad
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Merge tag 'mfd-next-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Core Frameworks:
   - Standardise MFD_CELL_* helpers

  New Drivers:
   - Add support for Acer Iconia Tab A500 Embedded Controller

  New Device Support:
   - Add support for ROHM BD9574MWF to BD9571MWV
   - Add support for Intel Alder Lake PCH-P PCI to LPSS
   - Add support for Intel Alder Lake PCH-S PCI to LPSS

  New Functionality:
   - Support ACPI enumeration; arizona

  Fix-ups:
   - Managed resources; bd9571mwv
   - DT additions/fix-ups; bd9571mwv, iqs62x, max8997, gateworks-gsc, ene-kb930
   - Convert to SPDX; bd9571mw
   - Fix return values/error handling; sunxi
   - Provide SOFTDEP; arizona
   - Make use of DIV_ROUND_UP; mcp-sa11x0
   - Use generic APIs; arizona
   - Add MAC address sysfs entries; intel-m10-bmc
   - Trivial: Coding-style fix-ups; iqs62x
   - Trivial: Remove superflouous code; iqs62x
   - Clear-up naming conventions; iqs62x

  Bug Fixes:
   - Fix 'pointer from integer' error; altera-sysmgr
   - Convert SGI_MFD_IOC3 from tristate to bool; Kconfig
   - Fix interrupt handling; gateworks-gsc
   - Extend required delay; iqs62x
   - Do not use I2C polling during calibration; iqs62x
   - Do no adjust clock frequency during calibration; iqs62x
   - Fix use-after-free; wm831x-auxad"

* tag 'mfd-next-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (32 commits)
  mfd: wm831x-auxadc: Prevent use after free in wm831x_auxadc_read_irq()
  mfd: iqs62x: Do not change clock frequency during ATI
  mfd: iqs62x: Do not poll during ATI
  mfd: iqs62x: Increase interrupt handler return delay
  mfd: iqs62x: Rename regmap_config struct
  mfd: iqs62x: Remove unused bit mask
  mfd: iqs62x: Remove superfluous whitespace above fallthroughs
  mfd: intel-lpss: Add Intel Alder Lake PCH-S PCI IDs
  mfd: intel-m10-bmc: Expose MAC address and count
  mfd: Add driver for Embedded Controller found on Acer Iconia Tab A500
  dt-bindings: mfd: Add ENE KB930 Embedded Controller binding
  dt-bindings: mfd: gateworks-gsc: Add fan-tach mode
  mfd: intel-lpss: Add Intel Alder Lake PCH-P PCI IDs
  mfd: gateworks-gsc: Fix interrupt type
  mfd: Standardise MFD_CELL_* helper names
  mfd: mcp-sa11x0: Use DIV_ROUND_UP to calculate rw_timeout
  mfd: max8997: Add of_compatible to Extcon and Charger mfd_cell
  dt-bindings: mfd: Correct the node name of the panel LED
  mfd: sgi-ioc3: Turn Kconfig option into a bool
  mfd: altera-sysmgr: Fix physical address storing more
  ...
This commit is contained in:
Linus Torvalds 2021-02-22 09:29:42 -08:00
commit f158bbee94
27 changed files with 696 additions and 252 deletions
Download patch file Download diff file Expand all files Collapse all files

45
include/linux/mfd/bd9571mwv.h
View file

@ -1,16 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* ROHM BD9571MWV-M driver
* ROHM BD9571MWV-M and BD9574MWF-M driver
*
* Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether expressed or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License version 2 for more details.
* Copyright (C) 2020 Renesas Electronics Corporation
*
* Based on the TPS65086 driver
*/
@ -21,11 +14,12 @@
#include <linux/device.h>
#include <linux/regmap.h>
/* List of registers for BD9571MWV */
/* List of registers for BD9571MWV and BD9574MWF */
#define BD9571MWV_VENDOR_CODE 0x00
#define BD9571MWV_VENDOR_CODE_VAL 0xdb
#define BD9571MWV_PRODUCT_CODE 0x01
#define BD9571MWV_PRODUCT_CODE_VAL 0x60
#define BD9571MWV_PRODUCT_CODE_BD9571MWV 0x60
#define BD9571MWV_PRODUCT_CODE_BD9574MWF 0x74
#define BD9571MWV_PRODUCT_REVISION 0x02
#define BD9571MWV_I2C_FUSA_MODE 0x10
@ -55,6 +49,7 @@
#define BD9571MWV_VD33_VID 0x44
#define BD9571MWV_DVFS_VINIT 0x50
#define BD9574MWF_VD09_VINIT 0x51
#define BD9571MWV_DVFS_SETVMAX 0x52
#define BD9571MWV_DVFS_BOOSTVID 0x53
#define BD9571MWV_DVFS_SETVID 0x54
@ -68,6 +63,7 @@
#define BD9571MWV_GPIO_INT_SET 0x64
#define BD9571MWV_GPIO_INT 0x65
#define BD9571MWV_GPIO_INTMASK 0x66
#define BD9574MWF_GPIO_MUX 0x67
#define BD9571MWV_REG_KEEP(n) (0x70 + (n))
@ -77,6 +73,8 @@
#define BD9571MWV_PROT_ERROR_STATUS2 0x83
#define BD9571MWV_PROT_ERROR_STATUS3 0x84
#define BD9571MWV_PROT_ERROR_STATUS4 0x85
#define BD9574MWF_PROT_ERROR_STATUS5 0x86
#define BD9574MWF_SYSTEM_ERROR_STATUS 0x87
#define BD9571MWV_INT_INTREQ 0x90
#define BD9571MWV_INT_INTREQ_MD1_INT BIT(0)
@ -89,6 +87,12 @@
#define BD9571MWV_INT_INTREQ_BKUP_TRG_INT BIT(7)
#define BD9571MWV_INT_INTMASK 0x91
#define BD9574MWF_SSCG_CNT 0xA0
#define BD9574MWF_POFFB_MRB 0xA1
#define BD9574MWF_SMRB_WR_PROT 0xA2
#define BD9574MWF_SMRB_ASSERT 0xA3
#define BD9574MWF_SMRB_STATUS 0xA4
#define BD9571MWV_ACCESS_KEY 0xff
/* Define the BD9571MWV IRQ numbers */
@ -98,23 +102,8 @@ enum bd9571mwv_irqs {
BD9571MWV_IRQ_MD2_E2,
BD9571MWV_IRQ_PROT_ERR,
BD9571MWV_IRQ_GP,
BD9571MWV_IRQ_128H_OF,
BD9571MWV_IRQ_128H_OF, /* BKUP_HOLD on BD9574MWF */
BD9571MWV_IRQ_WDT_OF,
BD9571MWV_IRQ_BKUP_TRG,
};
/**
* struct bd9571mwv - state holder for the bd9571mwv driver
*
* Device data may be used to access the BD9571MWV chip
*/
struct bd9571mwv {
struct device *dev;
struct regmap *regmap;
/* IRQ Data */
int irq;
struct regmap_irq_chip_data *irq_data;
};
#endif /* __LINUX_MFD_BD9571MWV_H */

6
include/linux/mfd/core.h
View file

@ -28,13 +28,13 @@
.id = (_id), \
}
#define OF_MFD_CELL_REG(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg) \
#define MFD_CELL_OF_REG(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg) \
MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg, true, NULL)
#define OF_MFD_CELL(_name, _res, _pdata, _pdsize, _id, _compat) \
#define MFD_CELL_OF(_name, _res, _pdata, _pdsize, _id, _compat) \
MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, 0, false, NULL)
#define ACPI_MFD_CELL(_name, _res, _pdata, _pdsize, _id, _match) \
#define MFD_CELL_ACPI(_name, _res, _pdata, _pdsize, _id, _match) \
MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, _match)
#define MFD_CELL_BASIC(_name, _res, _pdata, _pdsize, _id) \

9
include/linux/mfd/intel-m10-bmc.h
View file

@ -15,6 +15,15 @@
/* Register offset of system registers */
#define NIOS2_FW_VERSION 0x0
#define M10BMC_MAC_LOW 0x10
#define M10BMC_MAC_BYTE4 GENMASK(7, 0)
#define M10BMC_MAC_BYTE3 GENMASK(15, 8)
#define M10BMC_MAC_BYTE2 GENMASK(23, 16)
#define M10BMC_MAC_BYTE1 GENMASK(31, 24)
#define M10BMC_MAC_HIGH 0x14
#define M10BMC_MAC_BYTE6 GENMASK(7, 0)
#define M10BMC_MAC_BYTE5 GENMASK(15, 8)
#define M10BMC_MAC_COUNT GENMASK(23, 16)
#define M10BMC_TEST_REG 0x3c
#define M10BMC_BUILD_VER 0x68
#define M10BMC_VER_MAJOR_MSK GENMASK(23, 16)

11
include/linux/mfd/iqs62x.h
View file

@ -28,7 +28,7 @@
#define IQS620_GLBL_EVENT_MASK_PMU BIT(6)
#define IQS62X_NUM_KEYS 16
#define IQS62X_NUM_EVENTS (IQS62X_NUM_KEYS + 5)
#define IQS62X_NUM_EVENTS (IQS62X_NUM_KEYS + 6)
#define IQS62X_EVENT_SIZE 10
@ -78,6 +78,7 @@ enum iqs62x_event_flag {
/* everything else */
IQS62X_EVENT_SYS_RESET,
IQS62X_EVENT_SYS_ATI,
};
struct iqs62x_event_data {
@ -97,12 +98,10 @@ struct iqs62x_dev_desc {
const char *dev_name;
const struct mfd_cell *sub_devs;
int num_sub_devs;
u8 prod_num;
u8 sw_num;
const u8 *cal_regs;
int num_cal_regs;
u8 prox_mask;
u8 sar_mask;
u8 hall_mask;
@ -110,16 +109,12 @@ struct iqs62x_dev_desc {
u8 temp_mask;
u8 als_mask;
u8 ir_mask;
u8 prox_settings;
u8 als_flags;
u8 hall_flags;
u8 hyst_shift;
u8 interval;
u8 interval_div;
u8 clk_div;
const char *fw_name;
const enum iqs62x_event_reg (*event_regs)[IQS62X_EVENT_SIZE];
};
@ -130,8 +125,10 @@ struct iqs62x_core {
struct regmap *regmap;
struct blocking_notifier_head nh;
struct list_head fw_blk_head;
struct completion ati_done;
struct completion fw_done;
enum iqs62x_ui_sel ui_sel;
unsigned long event_cache;
};
extern const struct iqs62x_event_desc iqs62x_events[IQS62X_NUM_EVENTS];

2
include/linux/mfd/rohm-generic.h
View file

@ -12,6 +12,8 @@ enum rohm_chip_type {
ROHM_CHIP_TYPE_BD71847,
ROHM_CHIP_TYPE_BD70528,
ROHM_CHIP_TYPE_BD71828,
ROHM_CHIP_TYPE_BD9571,
ROHM_CHIP_TYPE_BD9574,
ROHM_CHIP_TYPE_AMOUNT
};