Merge branches 'for-3.18/always-poll-quirk', 'for-3.18/logitech', 'for-3.18/picolcd', 'for-3.18/rmi', 'for-3.18/sony', 'for-3.18/uhid', 'for-3.18/upstream' and 'for-3.18/wacom' into for-linus
This commit is contained in:
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467669c574
5235166fbc
368d4e59b0
604b607748
5b65c2a029
981c5b4a3b
8493ecca74
5df4eb054f
5ae6e89f74
commit
ee5db7e47f
4357 changed files with 172309 additions and 102355 deletions
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@ -24,14 +24,10 @@ struct super_block;
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struct pacct_struct;
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struct pid_namespace;
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extern int acct_parm[]; /* for sysctl */
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extern void acct_auto_close_mnt(struct vfsmount *m);
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extern void acct_auto_close(struct super_block *sb);
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extern void acct_collect(long exitcode, int group_dead);
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extern void acct_process(void);
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extern void acct_exit_ns(struct pid_namespace *);
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#else
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#define acct_auto_close_mnt(x) do { } while (0)
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#define acct_auto_close(x) do { } while (0)
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#define acct_collect(x,y) do { } while (0)
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#define acct_process() do { } while (0)
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#define acct_exit_ns(ns) do { } while (0)
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@ -364,6 +364,17 @@ extern bool osc_sb_apei_support_acked;
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#define OSC_PCI_EXPRESS_CAPABILITY_CONTROL 0x00000010
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#define OSC_PCI_CONTROL_MASKS 0x0000001f
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#define ACPI_GSB_ACCESS_ATTRIB_QUICK 0x00000002
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#define ACPI_GSB_ACCESS_ATTRIB_SEND_RCV 0x00000004
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#define ACPI_GSB_ACCESS_ATTRIB_BYTE 0x00000006
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#define ACPI_GSB_ACCESS_ATTRIB_WORD 0x00000008
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#define ACPI_GSB_ACCESS_ATTRIB_BLOCK 0x0000000A
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#define ACPI_GSB_ACCESS_ATTRIB_MULTIBYTE 0x0000000B
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#define ACPI_GSB_ACCESS_ATTRIB_WORD_CALL 0x0000000C
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#define ACPI_GSB_ACCESS_ATTRIB_BLOCK_CALL 0x0000000D
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#define ACPI_GSB_ACCESS_ATTRIB_RAW_BYTES 0x0000000E
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#define ACPI_GSB_ACCESS_ATTRIB_RAW_PROCESS 0x0000000F
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extern acpi_status acpi_pci_osc_control_set(acpi_handle handle,
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u32 *mask, u32 req);
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@ -1,43 +0,0 @@
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/*
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* Copyright (C) 2007 Atmel Corporation
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*
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* Driver for the AT32AP700X PS/2 controller (PSIF).
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef __INCLUDE_ATMEL_PWM_BL_H
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#define __INCLUDE_ATMEL_PWM_BL_H
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/**
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* struct atmel_pwm_bl_platform_data
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* @pwm_channel: which PWM channel in the PWM module to use.
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* @pwm_frequency: PWM frequency to generate, the driver will try to be as
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* close as the prescaler allows.
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* @pwm_compare_max: value to use in the PWM channel compare register.
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* @pwm_duty_max: maximum duty cycle value, must be less than or equal to
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* pwm_compare_max.
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* @pwm_duty_min: minimum duty cycle value, must be less than pwm_duty_max.
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* @pwm_active_low: set to one if the low part of the PWM signal increases the
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* brightness of the backlight.
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* @gpio_on: GPIO line to control the backlight on/off, set to -1 if not used.
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* @on_active_low: set to one if the on/off signal is on when GPIO is low.
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*
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* This struct must be added to the platform device in the board code. It is
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* used by the atmel-pwm-bl driver to setup the GPIO to control on/off and the
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* PWM device.
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*/
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struct atmel_pwm_bl_platform_data {
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unsigned int pwm_channel;
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unsigned int pwm_frequency;
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unsigned int pwm_compare_max;
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unsigned int pwm_duty_max;
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unsigned int pwm_duty_min;
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unsigned int pwm_active_low;
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int gpio_on;
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unsigned int on_active_low;
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};
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#endif /* __INCLUDE_ATMEL_PWM_BL_H */
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@ -1,70 +0,0 @@
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#ifndef __LINUX_ATMEL_PWM_H
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#define __LINUX_ATMEL_PWM_H
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/**
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* struct pwm_channel - driver handle to a PWM channel
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* @regs: base of this channel's registers
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* @index: number of this channel (0..31)
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* @mck: base clock rate, which can be prescaled and maybe subdivided
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*
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* Drivers initialize a pwm_channel structure using pwm_channel_alloc().
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* Then they configure its clock rate (derived from MCK), alignment,
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* polarity, and duty cycle by writing directly to the channel registers,
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* before enabling the channel by calling pwm_channel_enable().
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*
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* After emitting a PWM signal for the desired length of time, drivers
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* may then pwm_channel_disable() or pwm_channel_free(). Both of these
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* disable the channel, but when it's freed the IRQ is deconfigured and
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* the channel must later be re-allocated and reconfigured.
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*
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* Note that if the period or duty cycle need to be changed while the
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* PWM channel is operating, drivers must use the PWM_CUPD double buffer
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* mechanism, either polling until they change or getting implicitly
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* notified through a once-per-period interrupt handler.
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*/
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struct pwm_channel {
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void __iomem *regs;
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unsigned index;
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unsigned long mck;
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};
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extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
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extern int pwm_channel_free(struct pwm_channel *ch);
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extern int pwm_clk_alloc(unsigned prescale, unsigned div);
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extern void pwm_clk_free(unsigned clk);
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extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
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#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1)
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#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0)
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/* periodic interrupts, mostly for CUPD changes to period or cycle */
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extern int pwm_channel_handler(struct pwm_channel *ch,
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void (*handler)(struct pwm_channel *ch));
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/* per-channel registers (banked at pwm_channel->regs) */
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#define PWM_CMR 0x00 /* mode register */
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#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */
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#define PWM_CPR_CPOL (1 << 9) /* set: idle high */
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#define PWM_CPR_CALG (1 << 8) /* set: center align */
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#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */
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#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */
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#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */
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#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
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#define PWM_CPRD 0x08 /* period (count up from zero) */
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#define PWM_CCNT 0x0c /* counter (20 bits?) */
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#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */
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static inline void
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pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
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{
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__raw_writel(val, pwmc->regs + offset);
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}
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static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
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{
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return __raw_readl(pwmc->regs + offset);
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}
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#endif /* __LINUX_ATMEL_PWM_H */
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@ -308,6 +308,7 @@ struct bio_integrity_payload {
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unsigned short bip_slab; /* slab the bip came from */
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unsigned short bip_vcnt; /* # of integrity bio_vecs */
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unsigned short bip_max_vcnt; /* integrity bio_vec slots */
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unsigned bip_owns_buf:1; /* should free bip_buf */
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struct work_struct bip_work; /* I/O completion */
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@ -88,32 +88,32 @@
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* lib/bitmap.c provides these functions:
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*/
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extern int __bitmap_empty(const unsigned long *bitmap, int bits);
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extern int __bitmap_full(const unsigned long *bitmap, int bits);
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extern int __bitmap_empty(const unsigned long *bitmap, unsigned int nbits);
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extern int __bitmap_full(const unsigned long *bitmap, unsigned int nbits);
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extern int __bitmap_equal(const unsigned long *bitmap1,
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const unsigned long *bitmap2, int bits);
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const unsigned long *bitmap2, unsigned int nbits);
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extern void __bitmap_complement(unsigned long *dst, const unsigned long *src,
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int bits);
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unsigned int nbits);
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extern void __bitmap_shift_right(unsigned long *dst,
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const unsigned long *src, int shift, int bits);
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extern void __bitmap_shift_left(unsigned long *dst,
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const unsigned long *src, int shift, int bits);
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extern int __bitmap_and(unsigned long *dst, const unsigned long *bitmap1,
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const unsigned long *bitmap2, int bits);
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const unsigned long *bitmap2, unsigned int nbits);
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extern void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1,
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const unsigned long *bitmap2, int bits);
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const unsigned long *bitmap2, unsigned int nbits);
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extern void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1,
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const unsigned long *bitmap2, int bits);
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const unsigned long *bitmap2, unsigned int nbits);
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extern int __bitmap_andnot(unsigned long *dst, const unsigned long *bitmap1,
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const unsigned long *bitmap2, int bits);
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const unsigned long *bitmap2, unsigned int nbits);
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extern int __bitmap_intersects(const unsigned long *bitmap1,
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const unsigned long *bitmap2, int bits);
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const unsigned long *bitmap2, unsigned int nbits);
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extern int __bitmap_subset(const unsigned long *bitmap1,
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const unsigned long *bitmap2, int bits);
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extern int __bitmap_weight(const unsigned long *bitmap, int bits);
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const unsigned long *bitmap2, unsigned int nbits);
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extern int __bitmap_weight(const unsigned long *bitmap, unsigned int nbits);
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extern void bitmap_set(unsigned long *map, int i, int len);
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extern void bitmap_clear(unsigned long *map, int start, int nr);
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extern void bitmap_set(unsigned long *map, unsigned int start, int len);
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extern void bitmap_clear(unsigned long *map, unsigned int start, int len);
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extern unsigned long bitmap_find_next_zero_area(unsigned long *map,
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unsigned long size,
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unsigned long start,
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@ -140,9 +140,9 @@ extern void bitmap_onto(unsigned long *dst, const unsigned long *orig,
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const unsigned long *relmap, int bits);
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extern void bitmap_fold(unsigned long *dst, const unsigned long *orig,
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int sz, int bits);
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extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order);
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extern void bitmap_release_region(unsigned long *bitmap, int pos, int order);
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extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order);
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extern int bitmap_find_free_region(unsigned long *bitmap, unsigned int bits, int order);
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extern void bitmap_release_region(unsigned long *bitmap, unsigned int pos, int order);
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extern int bitmap_allocate_region(unsigned long *bitmap, unsigned int pos, int order);
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extern void bitmap_copy_le(void *dst, const unsigned long *src, int nbits);
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extern int bitmap_ord_to_pos(const unsigned long *bitmap, int n, int bits);
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@ -188,15 +188,15 @@ static inline void bitmap_copy(unsigned long *dst, const unsigned long *src,
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}
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static inline int bitmap_and(unsigned long *dst, const unsigned long *src1,
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const unsigned long *src2, int nbits)
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const unsigned long *src2, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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return (*dst = *src1 & *src2) != 0;
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return (*dst = *src1 & *src2 & BITMAP_LAST_WORD_MASK(nbits)) != 0;
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return __bitmap_and(dst, src1, src2, nbits);
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}
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static inline void bitmap_or(unsigned long *dst, const unsigned long *src1,
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const unsigned long *src2, int nbits)
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const unsigned long *src2, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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*dst = *src1 | *src2;
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@ -205,7 +205,7 @@ static inline void bitmap_or(unsigned long *dst, const unsigned long *src1,
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}
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static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1,
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const unsigned long *src2, int nbits)
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const unsigned long *src2, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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*dst = *src1 ^ *src2;
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@ -214,24 +214,24 @@ static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1,
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}
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static inline int bitmap_andnot(unsigned long *dst, const unsigned long *src1,
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const unsigned long *src2, int nbits)
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const unsigned long *src2, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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return (*dst = *src1 & ~(*src2)) != 0;
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return (*dst = *src1 & ~(*src2) & BITMAP_LAST_WORD_MASK(nbits)) != 0;
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return __bitmap_andnot(dst, src1, src2, nbits);
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}
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static inline void bitmap_complement(unsigned long *dst, const unsigned long *src,
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int nbits)
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unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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*dst = ~(*src) & BITMAP_LAST_WORD_MASK(nbits);
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*dst = ~(*src);
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else
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__bitmap_complement(dst, src, nbits);
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}
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static inline int bitmap_equal(const unsigned long *src1,
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const unsigned long *src2, int nbits)
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const unsigned long *src2, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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return ! ((*src1 ^ *src2) & BITMAP_LAST_WORD_MASK(nbits));
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@ -240,7 +240,7 @@ static inline int bitmap_equal(const unsigned long *src1,
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}
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static inline int bitmap_intersects(const unsigned long *src1,
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const unsigned long *src2, int nbits)
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const unsigned long *src2, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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return ((*src1 & *src2) & BITMAP_LAST_WORD_MASK(nbits)) != 0;
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@ -249,7 +249,7 @@ static inline int bitmap_intersects(const unsigned long *src1,
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}
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static inline int bitmap_subset(const unsigned long *src1,
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const unsigned long *src2, int nbits)
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const unsigned long *src2, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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return ! ((*src1 & ~(*src2)) & BITMAP_LAST_WORD_MASK(nbits));
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@ -257,7 +257,7 @@ static inline int bitmap_subset(const unsigned long *src1,
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return __bitmap_subset(src1, src2, nbits);
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}
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static inline int bitmap_empty(const unsigned long *src, int nbits)
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static inline int bitmap_empty(const unsigned long *src, unsigned nbits)
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{
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if (small_const_nbits(nbits))
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return ! (*src & BITMAP_LAST_WORD_MASK(nbits));
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@ -265,7 +265,7 @@ static inline int bitmap_empty(const unsigned long *src, int nbits)
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return __bitmap_empty(src, nbits);
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}
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static inline int bitmap_full(const unsigned long *src, int nbits)
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static inline int bitmap_full(const unsigned long *src, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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return ! (~(*src) & BITMAP_LAST_WORD_MASK(nbits));
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@ -273,7 +273,7 @@ static inline int bitmap_full(const unsigned long *src, int nbits)
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return __bitmap_full(src, nbits);
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}
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static inline int bitmap_weight(const unsigned long *src, int nbits)
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static inline int bitmap_weight(const unsigned long *src, unsigned int nbits)
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{
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if (small_const_nbits(nbits))
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return hweight_long(*src & BITMAP_LAST_WORD_MASK(nbits));
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@ -284,7 +284,7 @@ static inline void bitmap_shift_right(unsigned long *dst,
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const unsigned long *src, int n, int nbits)
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{
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if (small_const_nbits(nbits))
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*dst = *src >> n;
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*dst = (*src & BITMAP_LAST_WORD_MASK(nbits)) >> n;
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else
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__bitmap_shift_right(dst, src, n, nbits);
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}
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@ -21,6 +21,7 @@
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#include <linux/bsg.h>
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#include <linux/smp.h>
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#include <linux/rcupdate.h>
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#include <linux/percpu-refcount.h>
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#include <asm/scatterlist.h>
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@ -470,6 +471,7 @@ struct request_queue {
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struct mutex sysfs_lock;
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int bypass_depth;
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int mq_freeze_depth;
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#if defined(CONFIG_BLK_DEV_BSG)
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bsg_job_fn *bsg_job_fn;
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@ -483,7 +485,7 @@ struct request_queue {
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#endif
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struct rcu_head rcu_head;
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wait_queue_head_t mq_freeze_wq;
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struct percpu_counter mq_usage_counter;
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struct percpu_ref mq_usage_counter;
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struct list_head all_q_node;
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struct blk_mq_tag_set *tag_set;
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|
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@ -16,7 +16,6 @@
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#define PHY_ID_BCM7366 0x600d8490
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#define PHY_ID_BCM7439 0x600d8480
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#define PHY_ID_BCM7445 0x600d8510
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#define PHY_ID_BCM7XXX_28 0x600d8400
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#define PHY_BCM_OUI_MASK 0xfffffc00
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#define PHY_BCM_OUI_1 0x00206000
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@ -2,7 +2,7 @@
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#define _LINUX_BYTEORDER_GENERIC_H
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/*
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* linux/byteorder_generic.h
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* linux/byteorder/generic.h
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* Generic Byte-reordering support
|
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*
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* The "... p" macros, like le64_to_cpup, can be used with pointers
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|
|
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|
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@ -285,19 +285,9 @@ extern void ceph_msg_data_add_bio(struct ceph_msg *msg, struct bio *bio,
|
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||||
extern struct ceph_msg *ceph_msg_new(int type, int front_len, gfp_t flags,
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bool can_fail);
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extern void ceph_msg_kfree(struct ceph_msg *m);
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||||
|
||||
|
||||
static inline struct ceph_msg *ceph_msg_get(struct ceph_msg *msg)
|
||||
{
|
||||
kref_get(&msg->kref);
|
||||
return msg;
|
||||
}
|
||||
extern void ceph_msg_last_put(struct kref *kref);
|
||||
static inline void ceph_msg_put(struct ceph_msg *msg)
|
||||
{
|
||||
kref_put(&msg->kref, ceph_msg_last_put);
|
||||
}
|
||||
extern struct ceph_msg *ceph_msg_get(struct ceph_msg *msg);
|
||||
extern void ceph_msg_put(struct ceph_msg *msg);
|
||||
|
||||
extern void ceph_msg_dump(struct ceph_msg *msg);
|
||||
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@ struct ceph_osd_request {
|
|||
struct list_head r_req_lru_item;
|
||||
struct list_head r_osd_item;
|
||||
struct list_head r_linger_item;
|
||||
struct list_head r_linger_osd;
|
||||
struct list_head r_linger_osd_item;
|
||||
struct ceph_osd *r_osd;
|
||||
struct ceph_pg r_pgid;
|
||||
int r_pg_osds[CEPH_PG_MAX_SIZE];
|
||||
|
|
@ -325,22 +325,14 @@ extern struct ceph_osd_request *ceph_osdc_new_request(struct ceph_osd_client *,
|
|||
|
||||
extern void ceph_osdc_set_request_linger(struct ceph_osd_client *osdc,
|
||||
struct ceph_osd_request *req);
|
||||
extern void ceph_osdc_unregister_linger_request(struct ceph_osd_client *osdc,
|
||||
struct ceph_osd_request *req);
|
||||
|
||||
static inline void ceph_osdc_get_request(struct ceph_osd_request *req)
|
||||
{
|
||||
kref_get(&req->r_kref);
|
||||
}
|
||||
extern void ceph_osdc_release_request(struct kref *kref);
|
||||
static inline void ceph_osdc_put_request(struct ceph_osd_request *req)
|
||||
{
|
||||
kref_put(&req->r_kref, ceph_osdc_release_request);
|
||||
}
|
||||
extern void ceph_osdc_get_request(struct ceph_osd_request *req);
|
||||
extern void ceph_osdc_put_request(struct ceph_osd_request *req);
|
||||
|
||||
extern int ceph_osdc_start_request(struct ceph_osd_client *osdc,
|
||||
struct ceph_osd_request *req,
|
||||
bool nofail);
|
||||
extern void ceph_osdc_cancel_request(struct ceph_osd_request *req);
|
||||
extern int ceph_osdc_wait_request(struct ceph_osd_client *osdc,
|
||||
struct ceph_osd_request *req);
|
||||
extern void ceph_osdc_sync(struct ceph_osd_client *osdc);
|
||||
|
|
|
|||
27
include/linux/cma.h
Normal file
27
include/linux/cma.h
Normal file
|
|
@ -0,0 +1,27 @@
|
|||
#ifndef __CMA_H__
|
||||
#define __CMA_H__
|
||||
|
||||
/*
|
||||
* There is always at least global CMA area and a few optional
|
||||
* areas configured in kernel .config.
|
||||
*/
|
||||
#ifdef CONFIG_CMA_AREAS
|
||||
#define MAX_CMA_AREAS (1 + CONFIG_CMA_AREAS)
|
||||
|
||||
#else
|
||||
#define MAX_CMA_AREAS (0)
|
||||
|
||||
#endif
|
||||
|
||||
struct cma;
|
||||
|
||||
extern phys_addr_t cma_get_base(struct cma *cma);
|
||||
extern unsigned long cma_get_size(struct cma *cma);
|
||||
|
||||
extern int __init cma_declare_contiguous(phys_addr_t size,
|
||||
phys_addr_t base, phys_addr_t limit,
|
||||
phys_addr_t alignment, unsigned int order_per_bit,
|
||||
bool fixed, struct cma **res_cma);
|
||||
extern struct page *cma_alloc(struct cma *cma, int count, unsigned int align);
|
||||
extern bool cma_release(struct cma *cma, struct page *pages, int count);
|
||||
#endif
|
||||
|
|
@ -258,6 +258,15 @@ static inline void put_cred(const struct cred *_cred)
|
|||
#define current_cred() \
|
||||
rcu_dereference_protected(current->cred, 1)
|
||||
|
||||
/**
|
||||
* current_real_cred - Access the current task's objective credentials
|
||||
*
|
||||
* Access the objective credentials of the current task. RCU-safe,
|
||||
* since nobody else can modify it.
|
||||
*/
|
||||
#define current_real_cred() \
|
||||
rcu_dereference_protected(current->real_cred, 1)
|
||||
|
||||
/**
|
||||
* __task_cred - Access a task's objective credentials
|
||||
* @task: The task to query
|
||||
|
|
|
|||
|
|
@ -249,6 +249,7 @@ extern struct dentry * d_splice_alias(struct inode *, struct dentry *);
|
|||
extern struct dentry * d_add_ci(struct dentry *, struct inode *, struct qstr *);
|
||||
extern struct dentry *d_find_any_alias(struct inode *inode);
|
||||
extern struct dentry * d_obtain_alias(struct inode *);
|
||||
extern struct dentry * d_obtain_root(struct inode *);
|
||||
extern void shrink_dcache_sb(struct super_block *);
|
||||
extern void shrink_dcache_parent(struct dentry *);
|
||||
extern void shrink_dcache_for_umount(struct super_block *);
|
||||
|
|
|
|||
|
|
@ -1,10 +1,10 @@
|
|||
#ifndef DECOMPRESS_BUNZIP2_H
|
||||
#define DECOMPRESS_BUNZIP2_H
|
||||
|
||||
int bunzip2(unsigned char *inbuf, int len,
|
||||
int(*fill)(void*, unsigned int),
|
||||
int(*flush)(void*, unsigned int),
|
||||
int bunzip2(unsigned char *inbuf, long len,
|
||||
long (*fill)(void*, unsigned long),
|
||||
long (*flush)(void*, unsigned long),
|
||||
unsigned char *output,
|
||||
int *pos,
|
||||
long *pos,
|
||||
void(*error)(char *x));
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
#ifndef DECOMPRESS_GENERIC_H
|
||||
#define DECOMPRESS_GENERIC_H
|
||||
|
||||
typedef int (*decompress_fn) (unsigned char *inbuf, int len,
|
||||
int(*fill)(void*, unsigned int),
|
||||
int(*flush)(void*, unsigned int),
|
||||
typedef int (*decompress_fn) (unsigned char *inbuf, long len,
|
||||
long (*fill)(void*, unsigned long),
|
||||
long (*flush)(void*, unsigned long),
|
||||
unsigned char *outbuf,
|
||||
int *posp,
|
||||
long *posp,
|
||||
void(*error)(char *x));
|
||||
|
||||
/* inbuf - input buffer
|
||||
|
|
@ -33,7 +33,7 @@ typedef int (*decompress_fn) (unsigned char *inbuf, int len,
|
|||
|
||||
|
||||
/* Utility routine to detect the decompression method */
|
||||
decompress_fn decompress_method(const unsigned char *inbuf, int len,
|
||||
decompress_fn decompress_method(const unsigned char *inbuf, long len,
|
||||
const char **name);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,10 +1,10 @@
|
|||
#ifndef LINUX_DECOMPRESS_INFLATE_H
|
||||
#define LINUX_DECOMPRESS_INFLATE_H
|
||||
|
||||
int gunzip(unsigned char *inbuf, int len,
|
||||
int(*fill)(void*, unsigned int),
|
||||
int(*flush)(void*, unsigned int),
|
||||
int gunzip(unsigned char *inbuf, long len,
|
||||
long (*fill)(void*, unsigned long),
|
||||
long (*flush)(void*, unsigned long),
|
||||
unsigned char *output,
|
||||
int *pos,
|
||||
long *pos,
|
||||
void(*error_fn)(char *x));
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,10 +1,10 @@
|
|||
#ifndef DECOMPRESS_UNLZ4_H
|
||||
#define DECOMPRESS_UNLZ4_H
|
||||
|
||||
int unlz4(unsigned char *inbuf, int len,
|
||||
int(*fill)(void*, unsigned int),
|
||||
int(*flush)(void*, unsigned int),
|
||||
int unlz4(unsigned char *inbuf, long len,
|
||||
long (*fill)(void*, unsigned long),
|
||||
long (*flush)(void*, unsigned long),
|
||||
unsigned char *output,
|
||||
int *pos,
|
||||
long *pos,
|
||||
void(*error)(char *x));
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
#ifndef DECOMPRESS_UNLZMA_H
|
||||
#define DECOMPRESS_UNLZMA_H
|
||||
|
||||
int unlzma(unsigned char *, int,
|
||||
int(*fill)(void*, unsigned int),
|
||||
int(*flush)(void*, unsigned int),
|
||||
int unlzma(unsigned char *, long,
|
||||
long (*fill)(void*, unsigned long),
|
||||
long (*flush)(void*, unsigned long),
|
||||
unsigned char *output,
|
||||
int *posp,
|
||||
long *posp,
|
||||
void(*error)(char *x)
|
||||
);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,10 +1,10 @@
|
|||
#ifndef DECOMPRESS_UNLZO_H
|
||||
#define DECOMPRESS_UNLZO_H
|
||||
|
||||
int unlzo(unsigned char *inbuf, int len,
|
||||
int(*fill)(void*, unsigned int),
|
||||
int(*flush)(void*, unsigned int),
|
||||
int unlzo(unsigned char *inbuf, long len,
|
||||
long (*fill)(void*, unsigned long),
|
||||
long (*flush)(void*, unsigned long),
|
||||
unsigned char *output,
|
||||
int *pos,
|
||||
long *pos,
|
||||
void(*error)(char *x));
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -10,10 +10,10 @@
|
|||
#ifndef DECOMPRESS_UNXZ_H
|
||||
#define DECOMPRESS_UNXZ_H
|
||||
|
||||
int unxz(unsigned char *in, int in_size,
|
||||
int (*fill)(void *dest, unsigned int size),
|
||||
int (*flush)(void *src, unsigned int size),
|
||||
unsigned char *out, int *in_used,
|
||||
int unxz(unsigned char *in, long in_size,
|
||||
long (*fill)(void *dest, unsigned long size),
|
||||
long (*flush)(void *src, unsigned long size),
|
||||
unsigned char *out, long *in_used,
|
||||
void (*error)(char *x));
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -53,18 +53,13 @@
|
|||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/device.h>
|
||||
|
||||
struct cma;
|
||||
struct page;
|
||||
struct device;
|
||||
|
||||
#ifdef CONFIG_DMA_CMA
|
||||
|
||||
/*
|
||||
* There is always at least global CMA area and a few optional device
|
||||
* private areas configured in kernel .config.
|
||||
*/
|
||||
#define MAX_CMA_AREAS (1 + CONFIG_CMA_AREAS)
|
||||
|
||||
extern struct cma *dma_contiguous_default_area;
|
||||
|
||||
static inline struct cma *dev_get_cma_area(struct device *dev)
|
||||
|
|
@ -123,8 +118,6 @@ bool dma_release_from_contiguous(struct device *dev, struct page *pages,
|
|||
|
||||
#else
|
||||
|
||||
#define MAX_CMA_AREAS (0)
|
||||
|
||||
static inline struct cma *dev_get_cma_area(struct device *dev)
|
||||
{
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -37,7 +37,6 @@
|
|||
*/
|
||||
typedef s32 dma_cookie_t;
|
||||
#define DMA_MIN_COOKIE 1
|
||||
#define DMA_MAX_COOKIE INT_MAX
|
||||
|
||||
static inline int dma_submit_error(dma_cookie_t cookie)
|
||||
{
|
||||
|
|
@ -671,7 +670,7 @@ struct dma_device {
|
|||
struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)(
|
||||
struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
|
||||
size_t period_len, enum dma_transfer_direction direction,
|
||||
unsigned long flags, void *context);
|
||||
unsigned long flags);
|
||||
struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
|
||||
struct dma_chan *chan, struct dma_interleaved_template *xt,
|
||||
unsigned long flags);
|
||||
|
|
@ -746,7 +745,7 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic(
|
|||
unsigned long flags)
|
||||
{
|
||||
return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
|
||||
period_len, dir, flags, NULL);
|
||||
period_len, dir, flags);
|
||||
}
|
||||
|
||||
static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@
|
|||
#endif
|
||||
|
||||
extern const char *drbd_buildtag(void);
|
||||
#define REL_VERSION "8.4.3"
|
||||
#define REL_VERSION "8.4.5"
|
||||
#define API_VERSION 1
|
||||
#define PRO_VERSION_MIN 86
|
||||
#define PRO_VERSION_MAX 101
|
||||
|
|
@ -245,7 +245,7 @@ enum drbd_disk_state {
|
|||
D_DISKLESS,
|
||||
D_ATTACHING, /* In the process of reading the meta-data */
|
||||
D_FAILED, /* Becomes D_DISKLESS as soon as we told it the peer */
|
||||
/* when >= D_FAILED it is legal to access mdev->bc */
|
||||
/* when >= D_FAILED it is legal to access mdev->ldev */
|
||||
D_NEGOTIATING, /* Late attaching state, we need to talk to the peer */
|
||||
D_INCONSISTENT,
|
||||
D_OUTDATED,
|
||||
|
|
|
|||
|
|
@ -171,6 +171,10 @@ GENL_struct(DRBD_NLA_NET_CONF, 5, net_conf,
|
|||
__flg_field(28, DRBD_GENLA_F_MANDATORY | DRBD_F_INVARIANT, tentative)
|
||||
__flg_field_def(29, DRBD_GENLA_F_MANDATORY, use_rle, DRBD_USE_RLE_DEF)
|
||||
/* 9: __u32_field_def(30, DRBD_GENLA_F_MANDATORY, fencing_policy, DRBD_FENCING_DEF) */
|
||||
/* 9: __str_field_def(31, DRBD_GENLA_F_MANDATORY, name, SHARED_SECRET_MAX) */
|
||||
/* 9: __u32_field(32, DRBD_F_REQUIRED | DRBD_F_INVARIANT, peer_node_id) */
|
||||
__flg_field_def(33, 0 /* OPTIONAL */, csums_after_crash_only, DRBD_CSUMS_AFTER_CRASH_ONLY_DEF)
|
||||
__u32_field_def(34, 0 /* OPTIONAL */, sock_check_timeo, DRBD_SOCKET_CHECK_TIMEO_DEF)
|
||||
)
|
||||
|
||||
GENL_struct(DRBD_NLA_SET_ROLE_PARMS, 6, set_role_parms,
|
||||
|
|
|
|||
|
|
@ -214,6 +214,7 @@
|
|||
#define DRBD_ALLOW_TWO_PRIMARIES_DEF 0
|
||||
#define DRBD_ALWAYS_ASBP_DEF 0
|
||||
#define DRBD_USE_RLE_DEF 1
|
||||
#define DRBD_CSUMS_AFTER_CRASH_ONLY_DEF 0
|
||||
|
||||
#define DRBD_AL_STRIPES_MIN 1
|
||||
#define DRBD_AL_STRIPES_MAX 1024
|
||||
|
|
@ -224,4 +225,9 @@
|
|||
#define DRBD_AL_STRIPE_SIZE_MAX 16777216
|
||||
#define DRBD_AL_STRIPE_SIZE_DEF 32
|
||||
#define DRBD_AL_STRIPE_SIZE_SCALE 'k' /* kilobytes */
|
||||
|
||||
#define DRBD_SOCKET_CHECK_TIMEO_MIN 0
|
||||
#define DRBD_SOCKET_CHECK_TIMEO_MAX DRBD_PING_TIMEO_MAX
|
||||
#define DRBD_SOCKET_CHECK_TIMEO_DEF 0
|
||||
#define DRBD_SOCKET_CHECK_TIMEO_SCALE '1'
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -194,6 +194,9 @@ static inline char *mc_event_error_type(const unsigned int err_type)
|
|||
* @MEM_DDR3: DDR3 RAM
|
||||
* @MEM_RDDR3: Registered DDR3 RAM
|
||||
* This is a variant of the DDR3 memories.
|
||||
* @MEM_DDR4: DDR4 RAM
|
||||
* @MEM_RDDR4: Registered DDR4 RAM
|
||||
* This is a variant of the DDR4 memories.
|
||||
*/
|
||||
enum mem_type {
|
||||
MEM_EMPTY = 0,
|
||||
|
|
@ -213,6 +216,8 @@ enum mem_type {
|
|||
MEM_XDR,
|
||||
MEM_DDR3,
|
||||
MEM_RDDR3,
|
||||
MEM_DDR4,
|
||||
MEM_RDDR4,
|
||||
};
|
||||
|
||||
#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
|
||||
|
|
|
|||
|
|
@ -1156,6 +1156,9 @@ int efivars_sysfs_init(void);
|
|||
#ifdef CONFIG_EFI_RUNTIME_MAP
|
||||
int efi_runtime_map_init(struct kobject *);
|
||||
void efi_runtime_map_setup(void *, int, u32);
|
||||
int efi_get_runtime_map_size(void);
|
||||
int efi_get_runtime_map_desc_size(void);
|
||||
int efi_runtime_map_copy(void *buf, size_t bufsz);
|
||||
#else
|
||||
static inline int efi_runtime_map_init(struct kobject *kobj)
|
||||
{
|
||||
|
|
@ -1164,6 +1167,22 @@ static inline int efi_runtime_map_init(struct kobject *kobj)
|
|||
|
||||
static inline void
|
||||
efi_runtime_map_setup(void *map, int nr_entries, u32 desc_size) {}
|
||||
|
||||
static inline int efi_get_runtime_map_size(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int efi_get_runtime_map_desc_size(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int efi_runtime_map_copy(void *buf, size_t bufsz)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* prototypes shared between arch specific and generic stub code */
|
||||
|
|
|
|||
|
|
@ -553,7 +553,7 @@ static inline struct apertures_struct *alloc_apertures(unsigned int max_num) {
|
|||
#define fb_memcpy_fromfb sbus_memcpy_fromio
|
||||
#define fb_memcpy_tofb sbus_memcpy_toio
|
||||
|
||||
#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || defined(__sh__) || defined(__powerpc__) || defined(__avr32__) || defined(__bfin__)
|
||||
#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || defined(__sh__) || defined(__powerpc__) || defined(__avr32__) || defined(__bfin__) || defined(__arm__)
|
||||
|
||||
#define fb_readb __raw_readb
|
||||
#define fb_readw __raw_readw
|
||||
|
|
|
|||
|
|
@ -387,7 +387,7 @@ struct address_space {
|
|||
struct inode *host; /* owner: inode, block_device */
|
||||
struct radix_tree_root page_tree; /* radix tree of all pages */
|
||||
spinlock_t tree_lock; /* and lock protecting it */
|
||||
unsigned int i_mmap_writable;/* count VM_SHARED mappings */
|
||||
atomic_t i_mmap_writable;/* count VM_SHARED mappings */
|
||||
struct rb_root i_mmap; /* tree of private and shared mappings */
|
||||
struct list_head i_mmap_nonlinear;/*list VM_NONLINEAR mappings */
|
||||
struct mutex i_mmap_mutex; /* protect tree, count, list */
|
||||
|
|
@ -470,10 +470,35 @@ static inline int mapping_mapped(struct address_space *mapping)
|
|||
* Note that i_mmap_writable counts all VM_SHARED vmas: do_mmap_pgoff
|
||||
* marks vma as VM_SHARED if it is shared, and the file was opened for
|
||||
* writing i.e. vma may be mprotected writable even if now readonly.
|
||||
*
|
||||
* If i_mmap_writable is negative, no new writable mappings are allowed. You
|
||||
* can only deny writable mappings, if none exists right now.
|
||||
*/
|
||||
static inline int mapping_writably_mapped(struct address_space *mapping)
|
||||
{
|
||||
return mapping->i_mmap_writable != 0;
|
||||
return atomic_read(&mapping->i_mmap_writable) > 0;
|
||||
}
|
||||
|
||||
static inline int mapping_map_writable(struct address_space *mapping)
|
||||
{
|
||||
return atomic_inc_unless_negative(&mapping->i_mmap_writable) ?
|
||||
0 : -EPERM;
|
||||
}
|
||||
|
||||
static inline void mapping_unmap_writable(struct address_space *mapping)
|
||||
{
|
||||
atomic_dec(&mapping->i_mmap_writable);
|
||||
}
|
||||
|
||||
static inline int mapping_deny_writable(struct address_space *mapping)
|
||||
{
|
||||
return atomic_dec_unless_positive(&mapping->i_mmap_writable) ?
|
||||
0 : -EBUSY;
|
||||
}
|
||||
|
||||
static inline void mapping_allow_writable(struct address_space *mapping)
|
||||
{
|
||||
atomic_inc(&mapping->i_mmap_writable);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -1250,6 +1275,7 @@ struct super_block {
|
|||
|
||||
/* AIO completions deferred from interrupt context */
|
||||
struct workqueue_struct *s_dio_done_wq;
|
||||
struct hlist_head s_pins;
|
||||
|
||||
/*
|
||||
* Keep the lru lists last in the structure so they always sit on their
|
||||
|
|
@ -2335,6 +2361,7 @@ extern int do_pipe_flags(int *, int);
|
|||
|
||||
extern int kernel_read(struct file *, loff_t, char *, unsigned long);
|
||||
extern ssize_t kernel_write(struct file *, const char *, size_t, loff_t);
|
||||
extern ssize_t __kernel_write(struct file *, const char *, size_t, loff_t *);
|
||||
extern struct file * open_exec(const char *);
|
||||
|
||||
/* fs/dcache.c -- generic fs support functions */
|
||||
|
|
@ -2688,7 +2715,7 @@ static const struct file_operations __fops = { \
|
|||
.read = simple_attr_read, \
|
||||
.write = simple_attr_write, \
|
||||
.llseek = generic_file_llseek, \
|
||||
};
|
||||
}
|
||||
|
||||
static inline __printf(1, 2)
|
||||
void __simple_attr_check_format(const char *fmt, ...)
|
||||
|
|
|
|||
17
include/linux/fs_pin.h
Normal file
17
include/linux/fs_pin.h
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
#include <linux/fs.h>
|
||||
|
||||
struct fs_pin {
|
||||
atomic_long_t count;
|
||||
union {
|
||||
struct {
|
||||
struct hlist_node s_list;
|
||||
struct hlist_node m_list;
|
||||
};
|
||||
struct rcu_head rcu;
|
||||
};
|
||||
void (*kill)(struct fs_pin *);
|
||||
};
|
||||
|
||||
void pin_put(struct fs_pin *);
|
||||
void pin_remove(struct fs_pin *);
|
||||
void pin_insert(struct fs_pin *, struct vfsmount *);
|
||||
|
|
@ -322,16 +322,18 @@ extern int fsnotify_fasync(int fd, struct file *file, int on);
|
|||
extern void fsnotify_destroy_event(struct fsnotify_group *group,
|
||||
struct fsnotify_event *event);
|
||||
/* attach the event to the group notification queue */
|
||||
extern int fsnotify_add_notify_event(struct fsnotify_group *group,
|
||||
struct fsnotify_event *event,
|
||||
int (*merge)(struct list_head *,
|
||||
struct fsnotify_event *));
|
||||
extern int fsnotify_add_event(struct fsnotify_group *group,
|
||||
struct fsnotify_event *event,
|
||||
int (*merge)(struct list_head *,
|
||||
struct fsnotify_event *));
|
||||
/* Remove passed event from groups notification queue */
|
||||
extern void fsnotify_remove_event(struct fsnotify_group *group, struct fsnotify_event *event);
|
||||
/* true if the group notification queue is empty */
|
||||
extern bool fsnotify_notify_queue_is_empty(struct fsnotify_group *group);
|
||||
/* return, but do not dequeue the first event on the notification queue */
|
||||
extern struct fsnotify_event *fsnotify_peek_notify_event(struct fsnotify_group *group);
|
||||
extern struct fsnotify_event *fsnotify_peek_first_event(struct fsnotify_group *group);
|
||||
/* return AND dequeue the first event on the notification queue */
|
||||
extern struct fsnotify_event *fsnotify_remove_notify_event(struct fsnotify_group *group);
|
||||
extern struct fsnotify_event *fsnotify_remove_first_event(struct fsnotify_group *group);
|
||||
|
||||
/* functions used to manipulate the marks attached to inodes */
|
||||
|
||||
|
|
|
|||
|
|
@ -102,6 +102,15 @@ enum {
|
|||
FTRACE_OPS_FL_DELETED = 1 << 8,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DYNAMIC_FTRACE
|
||||
/* The hash used to know what functions callbacks trace */
|
||||
struct ftrace_ops_hash {
|
||||
struct ftrace_hash *notrace_hash;
|
||||
struct ftrace_hash *filter_hash;
|
||||
struct mutex regex_lock;
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Note, ftrace_ops can be referenced outside of RCU protection.
|
||||
* (Although, for perf, the control ops prevent that). If ftrace_ops is
|
||||
|
|
@ -121,10 +130,9 @@ struct ftrace_ops {
|
|||
int __percpu *disabled;
|
||||
#ifdef CONFIG_DYNAMIC_FTRACE
|
||||
int nr_trampolines;
|
||||
struct ftrace_hash *notrace_hash;
|
||||
struct ftrace_hash *filter_hash;
|
||||
struct ftrace_ops_hash local_hash;
|
||||
struct ftrace_ops_hash *func_hash;
|
||||
struct ftrace_hash *tramp_hash;
|
||||
struct mutex regex_lock;
|
||||
unsigned long trampoline;
|
||||
#endif
|
||||
};
|
||||
|
|
|
|||
|
|
@ -571,40 +571,6 @@ do { \
|
|||
__trace_printk(ip, fmt, ##args); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* tracepoint_string - register constant persistent string to trace system
|
||||
* @str - a constant persistent string that will be referenced in tracepoints
|
||||
*
|
||||
* If constant strings are being used in tracepoints, it is faster and
|
||||
* more efficient to just save the pointer to the string and reference
|
||||
* that with a printf "%s" instead of saving the string in the ring buffer
|
||||
* and wasting space and time.
|
||||
*
|
||||
* The problem with the above approach is that userspace tools that read
|
||||
* the binary output of the trace buffers do not have access to the string.
|
||||
* Instead they just show the address of the string which is not very
|
||||
* useful to users.
|
||||
*
|
||||
* With tracepoint_string(), the string will be registered to the tracing
|
||||
* system and exported to userspace via the debugfs/tracing/printk_formats
|
||||
* file that maps the string address to the string text. This way userspace
|
||||
* tools that read the binary buffers have a way to map the pointers to
|
||||
* the ASCII strings they represent.
|
||||
*
|
||||
* The @str used must be a constant string and persistent as it would not
|
||||
* make sense to show a string that no longer exists. But it is still fine
|
||||
* to be used with modules, because when modules are unloaded, if they
|
||||
* had tracepoints, the ring buffers are cleared too. As long as the string
|
||||
* does not change during the life of the module, it is fine to use
|
||||
* tracepoint_string() within a module.
|
||||
*/
|
||||
#define tracepoint_string(str) \
|
||||
({ \
|
||||
static const char *___tp_str __tracepoint_string = str; \
|
||||
___tp_str; \
|
||||
})
|
||||
#define __tracepoint_string __attribute__((section("__tracepoint_str")))
|
||||
|
||||
#ifdef CONFIG_PERF_EVENTS
|
||||
struct perf_event;
|
||||
|
||||
|
|
|
|||
|
|
@ -360,7 +360,7 @@ extern unsigned long get_zeroed_page(gfp_t gfp_mask);
|
|||
void *alloc_pages_exact(size_t size, gfp_t gfp_mask);
|
||||
void free_pages_exact(void *virt, size_t size);
|
||||
/* This is different from alloc_pages_exact_node !!! */
|
||||
void *alloc_pages_exact_nid(int nid, size_t size, gfp_t gfp_mask);
|
||||
void * __meminit alloc_pages_exact_nid(int nid, size_t size, gfp_t gfp_mask);
|
||||
|
||||
#define __get_free_page(gfp_mask) \
|
||||
__get_free_pages((gfp_mask), 0)
|
||||
|
|
|
|||
9
include/linux/glob.h
Normal file
9
include/linux/glob.h
Normal file
|
|
@ -0,0 +1,9 @@
|
|||
#ifndef _LINUX_GLOB_H
|
||||
#define _LINUX_GLOB_H
|
||||
|
||||
#include <linux/types.h> /* For bool */
|
||||
#include <linux/compiler.h> /* For __pure */
|
||||
|
||||
bool __pure glob_match(char const *pat, char const *str);
|
||||
|
||||
#endif /* _LINUX_GLOB_H */
|
||||
|
|
@ -16,32 +16,81 @@ struct device;
|
|||
*/
|
||||
struct gpio_desc;
|
||||
|
||||
#define GPIOD_FLAGS_BIT_DIR_SET BIT(0)
|
||||
#define GPIOD_FLAGS_BIT_DIR_OUT BIT(1)
|
||||
#define GPIOD_FLAGS_BIT_DIR_VAL BIT(2)
|
||||
|
||||
/**
|
||||
* Optional flags that can be passed to one of gpiod_* to configure direction
|
||||
* and output value. These values cannot be OR'd.
|
||||
*/
|
||||
enum gpiod_flags {
|
||||
GPIOD_ASIS = 0,
|
||||
GPIOD_IN = GPIOD_FLAGS_BIT_DIR_SET,
|
||||
GPIOD_OUT_LOW = GPIOD_FLAGS_BIT_DIR_SET | GPIOD_FLAGS_BIT_DIR_OUT,
|
||||
GPIOD_OUT_HIGH = GPIOD_FLAGS_BIT_DIR_SET | GPIOD_FLAGS_BIT_DIR_OUT |
|
||||
GPIOD_FLAGS_BIT_DIR_VAL,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_GPIOLIB
|
||||
|
||||
/* Acquire and dispose GPIOs */
|
||||
struct gpio_desc *__must_check gpiod_get(struct device *dev,
|
||||
const char *con_id);
|
||||
struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
|
||||
struct gpio_desc *__must_check __gpiod_get(struct device *dev,
|
||||
const char *con_id,
|
||||
enum gpiod_flags flags);
|
||||
#define __gpiod_get(dev, con_id, flags, ...) __gpiod_get(dev, con_id, flags)
|
||||
#define gpiod_get(varargs...) __gpiod_get(varargs, 0)
|
||||
struct gpio_desc *__must_check __gpiod_get_index(struct device *dev,
|
||||
const char *con_id,
|
||||
unsigned int idx);
|
||||
struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
|
||||
const char *con_id);
|
||||
struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
|
||||
unsigned int idx,
|
||||
enum gpiod_flags flags);
|
||||
#define __gpiod_get_index(dev, con_id, index, flags, ...) \
|
||||
__gpiod_get_index(dev, con_id, index, flags)
|
||||
#define gpiod_get_index(varargs...) __gpiod_get_index(varargs, 0)
|
||||
struct gpio_desc *__must_check __gpiod_get_optional(struct device *dev,
|
||||
const char *con_id,
|
||||
enum gpiod_flags flags);
|
||||
#define __gpiod_get_optional(dev, con_id, flags, ...) \
|
||||
__gpiod_get_optional(dev, con_id, flags)
|
||||
#define gpiod_get_optional(varargs...) __gpiod_get_optional(varargs, 0)
|
||||
struct gpio_desc *__must_check __gpiod_get_index_optional(struct device *dev,
|
||||
const char *con_id,
|
||||
unsigned int index);
|
||||
unsigned int index,
|
||||
enum gpiod_flags flags);
|
||||
#define __gpiod_get_index_optional(dev, con_id, index, flags, ...) \
|
||||
__gpiod_get_index_optional(dev, con_id, index, flags)
|
||||
#define gpiod_get_index_optional(varargs...) \
|
||||
__gpiod_get_index_optional(varargs, 0)
|
||||
|
||||
void gpiod_put(struct gpio_desc *desc);
|
||||
|
||||
struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
|
||||
const char *con_id);
|
||||
struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
|
||||
struct gpio_desc *__must_check __devm_gpiod_get(struct device *dev,
|
||||
const char *con_id,
|
||||
enum gpiod_flags flags);
|
||||
#define __devm_gpiod_get(dev, con_id, flags, ...) \
|
||||
__devm_gpiod_get(dev, con_id, flags)
|
||||
#define devm_gpiod_get(varargs...) __devm_gpiod_get(varargs, 0)
|
||||
struct gpio_desc *__must_check __devm_gpiod_get_index(struct device *dev,
|
||||
const char *con_id,
|
||||
unsigned int idx);
|
||||
struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev,
|
||||
const char *con_id);
|
||||
unsigned int idx,
|
||||
enum gpiod_flags flags);
|
||||
#define __devm_gpiod_get_index(dev, con_id, index, flags, ...) \
|
||||
__devm_gpiod_get_index(dev, con_id, index, flags)
|
||||
#define devm_gpiod_get_index(varargs...) __devm_gpiod_get_index(varargs, 0)
|
||||
struct gpio_desc *__must_check __devm_gpiod_get_optional(struct device *dev,
|
||||
const char *con_id,
|
||||
enum gpiod_flags flags);
|
||||
#define __devm_gpiod_get_optional(dev, con_id, flags, ...) \
|
||||
__devm_gpiod_get_optional(dev, con_id, flags)
|
||||
#define devm_gpiod_get_optional(varargs...) \
|
||||
__devm_gpiod_get_optional(varargs, 0)
|
||||
struct gpio_desc *__must_check
|
||||
devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
|
||||
unsigned int index);
|
||||
__devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
|
||||
unsigned int index, enum gpiod_flags flags);
|
||||
#define __devm_gpiod_get_index_optional(dev, con_id, index, flags, ...) \
|
||||
__devm_gpiod_get_index_optional(dev, con_id, index, flags)
|
||||
#define devm_gpiod_get_index_optional(varargs...) \
|
||||
__devm_gpiod_get_index_optional(varargs, 0)
|
||||
|
||||
void devm_gpiod_put(struct device *dev, struct gpio_desc *desc);
|
||||
|
||||
|
|
|
|||
|
|
@ -141,73 +141,16 @@ extern const char *gpiochip_is_requested(struct gpio_chip *chip,
|
|||
|
||||
/* add/remove chips */
|
||||
extern int gpiochip_add(struct gpio_chip *chip);
|
||||
extern int __must_check gpiochip_remove(struct gpio_chip *chip);
|
||||
extern int gpiochip_remove(struct gpio_chip *chip);
|
||||
extern struct gpio_chip *gpiochip_find(void *data,
|
||||
int (*match)(struct gpio_chip *chip, void *data));
|
||||
|
||||
/* lock/unlock as IRQ */
|
||||
int gpiod_lock_as_irq(struct gpio_desc *desc);
|
||||
void gpiod_unlock_as_irq(struct gpio_desc *desc);
|
||||
int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
|
||||
void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
|
||||
|
||||
struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
|
||||
|
||||
struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
|
||||
u16 hwnum);
|
||||
|
||||
enum gpio_lookup_flags {
|
||||
GPIO_ACTIVE_HIGH = (0 << 0),
|
||||
GPIO_ACTIVE_LOW = (1 << 0),
|
||||
GPIO_OPEN_DRAIN = (1 << 1),
|
||||
GPIO_OPEN_SOURCE = (1 << 2),
|
||||
};
|
||||
|
||||
/**
|
||||
* struct gpiod_lookup - lookup table
|
||||
* @chip_label: name of the chip the GPIO belongs to
|
||||
* @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO
|
||||
* @con_id: name of the GPIO from the device's point of view
|
||||
* @idx: index of the GPIO in case several GPIOs share the same name
|
||||
* @flags: mask of GPIO_* values
|
||||
*
|
||||
* gpiod_lookup is a lookup table for associating GPIOs to specific devices and
|
||||
* functions using platform data.
|
||||
*/
|
||||
struct gpiod_lookup {
|
||||
const char *chip_label;
|
||||
u16 chip_hwnum;
|
||||
const char *con_id;
|
||||
unsigned int idx;
|
||||
enum gpio_lookup_flags flags;
|
||||
};
|
||||
|
||||
struct gpiod_lookup_table {
|
||||
struct list_head list;
|
||||
const char *dev_id;
|
||||
struct gpiod_lookup table[];
|
||||
};
|
||||
|
||||
/*
|
||||
* Simple definition of a single GPIO under a con_id
|
||||
*/
|
||||
#define GPIO_LOOKUP(_chip_label, _chip_hwnum, _con_id, _flags) \
|
||||
GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, 0, _flags)
|
||||
|
||||
/*
|
||||
* Use this macro if you need to have several GPIOs under the same con_id.
|
||||
* Each GPIO needs to use a different index and can be accessed using
|
||||
* gpiod_get_index()
|
||||
*/
|
||||
#define GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, _idx, _flags) \
|
||||
{ \
|
||||
.chip_label = _chip_label, \
|
||||
.chip_hwnum = _chip_hwnum, \
|
||||
.con_id = _con_id, \
|
||||
.idx = _idx, \
|
||||
.flags = _flags, \
|
||||
}
|
||||
|
||||
void gpiod_add_lookup_table(struct gpiod_lookup_table *table);
|
||||
|
||||
#ifdef CONFIG_GPIOLIB_IRQCHIP
|
||||
|
||||
void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
|
||||
|
|
@ -223,6 +166,9 @@ int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
|
|||
|
||||
#endif /* CONFIG_GPIO_IRQCHIP */
|
||||
|
||||
int gpiochip_request_own_desc(struct gpio_desc *desc, const char *label);
|
||||
void gpiochip_free_own_desc(struct gpio_desc *desc);
|
||||
|
||||
#else /* CONFIG_GPIOLIB */
|
||||
|
||||
static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
|
||||
|
|
|
|||
61
include/linux/gpio/machine.h
Normal file
61
include/linux/gpio/machine.h
Normal file
|
|
@ -0,0 +1,61 @@
|
|||
#ifndef __LINUX_GPIO_MACHINE_H
|
||||
#define __LINUX_GPIO_MACHINE_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
enum gpio_lookup_flags {
|
||||
GPIO_ACTIVE_HIGH = (0 << 0),
|
||||
GPIO_ACTIVE_LOW = (1 << 0),
|
||||
GPIO_OPEN_DRAIN = (1 << 1),
|
||||
GPIO_OPEN_SOURCE = (1 << 2),
|
||||
};
|
||||
|
||||
/**
|
||||
* struct gpiod_lookup - lookup table
|
||||
* @chip_label: name of the chip the GPIO belongs to
|
||||
* @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO
|
||||
* @con_id: name of the GPIO from the device's point of view
|
||||
* @idx: index of the GPIO in case several GPIOs share the same name
|
||||
* @flags: mask of GPIO_* values
|
||||
*
|
||||
* gpiod_lookup is a lookup table for associating GPIOs to specific devices and
|
||||
* functions using platform data.
|
||||
*/
|
||||
struct gpiod_lookup {
|
||||
const char *chip_label;
|
||||
u16 chip_hwnum;
|
||||
const char *con_id;
|
||||
unsigned int idx;
|
||||
enum gpio_lookup_flags flags;
|
||||
};
|
||||
|
||||
struct gpiod_lookup_table {
|
||||
struct list_head list;
|
||||
const char *dev_id;
|
||||
struct gpiod_lookup table[];
|
||||
};
|
||||
|
||||
/*
|
||||
* Simple definition of a single GPIO under a con_id
|
||||
*/
|
||||
#define GPIO_LOOKUP(_chip_label, _chip_hwnum, _con_id, _flags) \
|
||||
GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, 0, _flags)
|
||||
|
||||
/*
|
||||
* Use this macro if you need to have several GPIOs under the same con_id.
|
||||
* Each GPIO needs to use a different index and can be accessed using
|
||||
* gpiod_get_index()
|
||||
*/
|
||||
#define GPIO_LOOKUP_IDX(_chip_label, _chip_hwnum, _con_id, _idx, _flags) \
|
||||
{ \
|
||||
.chip_label = _chip_label, \
|
||||
.chip_hwnum = _chip_hwnum, \
|
||||
.con_id = _con_id, \
|
||||
.idx = _idx, \
|
||||
.flags = _flags, \
|
||||
}
|
||||
|
||||
void gpiod_add_lookup_table(struct gpiod_lookup_table *table);
|
||||
|
||||
#endif /* __LINUX_GPIO_MACHINE_H */
|
||||
|
|
@ -265,6 +265,7 @@ struct hid_item {
|
|||
#define HID_CONNECT_HIDDEV 0x08
|
||||
#define HID_CONNECT_HIDDEV_FORCE 0x10
|
||||
#define HID_CONNECT_FF 0x20
|
||||
#define HID_CONNECT_DRIVER 0x40
|
||||
#define HID_CONNECT_DEFAULT (HID_CONNECT_HIDINPUT|HID_CONNECT_HIDRAW| \
|
||||
HID_CONNECT_HIDDEV|HID_CONNECT_FF)
|
||||
|
||||
|
|
@ -287,6 +288,7 @@ struct hid_item {
|
|||
#define HID_QUIRK_HIDINPUT_FORCE 0x00000080
|
||||
#define HID_QUIRK_NO_EMPTY_INPUT 0x00000100
|
||||
#define HID_QUIRK_NO_INIT_INPUT_REPORTS 0x00000200
|
||||
#define HID_QUIRK_ALWAYS_POLL 0x00000400
|
||||
#define HID_QUIRK_SKIP_OUTPUT_REPORTS 0x00010000
|
||||
#define HID_QUIRK_SKIP_OUTPUT_REPORT_ID 0x00020000
|
||||
#define HID_QUIRK_NO_OUTPUT_REPORTS_ON_INTR_EP 0x00040000
|
||||
|
|
@ -311,6 +313,11 @@ struct hid_item {
|
|||
*/
|
||||
#define HID_GROUP_RMI 0x0100
|
||||
|
||||
/*
|
||||
* Vendor specific HID device groups
|
||||
*/
|
||||
#define HID_GROUP_WACOM 0x0101
|
||||
|
||||
/*
|
||||
* This is the global environment of the parser. This information is
|
||||
* persistent for main-items. The global environment can be saved and
|
||||
|
|
@ -435,6 +442,7 @@ struct hid_output_fifo {
|
|||
#define HID_CLAIMED_INPUT 1
|
||||
#define HID_CLAIMED_HIDDEV 2
|
||||
#define HID_CLAIMED_HIDRAW 4
|
||||
#define HID_CLAIMED_DRIVER 8
|
||||
|
||||
#define HID_STAT_ADDED 1
|
||||
#define HID_STAT_PARSED 2
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ static inline int kmap_atomic_idx_push(void)
|
|||
|
||||
#ifdef CONFIG_DEBUG_HIGHMEM
|
||||
WARN_ON_ONCE(in_irq() && !irqs_disabled());
|
||||
BUG_ON(idx > KM_TYPE_NR);
|
||||
BUG_ON(idx >= KM_TYPE_NR);
|
||||
#endif
|
||||
return idx;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -164,12 +164,15 @@ int host1x_job_submit(struct host1x_job *job);
|
|||
*/
|
||||
|
||||
struct host1x_reloc {
|
||||
struct host1x_bo *cmdbuf;
|
||||
u32 cmdbuf_offset;
|
||||
struct host1x_bo *target;
|
||||
u32 target_offset;
|
||||
u32 shift;
|
||||
u32 pad;
|
||||
struct {
|
||||
struct host1x_bo *bo;
|
||||
unsigned long offset;
|
||||
} cmdbuf;
|
||||
struct {
|
||||
struct host1x_bo *bo;
|
||||
unsigned long offset;
|
||||
} target;
|
||||
unsigned long shift;
|
||||
};
|
||||
|
||||
struct host1x_job {
|
||||
|
|
|
|||
|
|
@ -93,10 +93,6 @@ extern bool is_vma_temporary_stack(struct vm_area_struct *vma);
|
|||
#endif /* CONFIG_DEBUG_VM */
|
||||
|
||||
extern unsigned long transparent_hugepage_flags;
|
||||
extern int copy_pte_range(struct mm_struct *dst_mm, struct mm_struct *src_mm,
|
||||
pmd_t *dst_pmd, pmd_t *src_pmd,
|
||||
struct vm_area_struct *vma,
|
||||
unsigned long addr, unsigned long end);
|
||||
extern int split_huge_page_to_list(struct page *page, struct list_head *list);
|
||||
static inline int split_huge_page(struct page *page)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -87,7 +87,6 @@ pte_t *huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud);
|
|||
#endif
|
||||
|
||||
extern unsigned long hugepages_treat_as_movable;
|
||||
extern const unsigned long hugetlb_zero, hugetlb_infinity;
|
||||
extern int sysctl_hugetlb_shm_group;
|
||||
extern struct list_head huge_boot_pages;
|
||||
|
||||
|
|
|
|||
|
|
@ -577,4 +577,20 @@ static inline struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node
|
|||
}
|
||||
#endif /* CONFIG_OF */
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
void acpi_i2c_register_devices(struct i2c_adapter *adap);
|
||||
#else
|
||||
static inline void acpi_i2c_register_devices(struct i2c_adapter *adap) { }
|
||||
#endif /* CONFIG_ACPI */
|
||||
|
||||
#ifdef CONFIG_ACPI_I2C_OPREGION
|
||||
int acpi_i2c_install_space_handler(struct i2c_adapter *adapter);
|
||||
void acpi_i2c_remove_space_handler(struct i2c_adapter *adapter);
|
||||
#else
|
||||
static inline void acpi_i2c_remove_space_handler(struct i2c_adapter *adapter)
|
||||
{ }
|
||||
static inline int acpi_i2c_install_space_handler(struct i2c_adapter *adapter)
|
||||
{ return 0; }
|
||||
#endif /* CONFIG_ACPI_I2C_OPREGION */
|
||||
|
||||
#endif /* _LINUX_I2C_H */
|
||||
|
|
|
|||
|
|
@ -17,9 +17,6 @@
|
|||
|
||||
/* The platform data for the Atmel maXTouch touchscreen driver */
|
||||
struct mxt_platform_data {
|
||||
const u8 *config;
|
||||
size_t config_length;
|
||||
u32 config_crc;
|
||||
unsigned long irqflags;
|
||||
u8 t19_num_keys;
|
||||
const unsigned int *t19_keymap;
|
||||
|
|
|
|||
|
|
@ -1,10 +0,0 @@
|
|||
#ifndef __LINUX_I2C_S6000_H
|
||||
#define __LINUX_I2C_S6000_H
|
||||
|
||||
struct s6_i2c_platform_data {
|
||||
const char *clock; /* the clock to use */
|
||||
int bus_num; /* the bus number to register */
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -187,7 +187,6 @@ vlan_dev_get_egress_qos_mask(struct net_device *dev, u32 skprio)
|
|||
}
|
||||
|
||||
extern bool vlan_do_receive(struct sk_buff **skb);
|
||||
extern struct sk_buff *vlan_untag(struct sk_buff *skb);
|
||||
|
||||
extern int vlan_vid_add(struct net_device *dev, __be16 proto, u16 vid);
|
||||
extern void vlan_vid_del(struct net_device *dev, __be16 proto, u16 vid);
|
||||
|
|
@ -241,11 +240,6 @@ static inline bool vlan_do_receive(struct sk_buff **skb)
|
|||
return false;
|
||||
}
|
||||
|
||||
static inline struct sk_buff *vlan_untag(struct sk_buff *skb)
|
||||
{
|
||||
return skb;
|
||||
}
|
||||
|
||||
static inline int vlan_vid_add(struct net_device *dev, __be16 proto, u16 vid)
|
||||
{
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -105,6 +105,7 @@ void input_mt_report_slot_state(struct input_dev *dev,
|
|||
|
||||
void input_mt_report_finger_count(struct input_dev *dev, int count);
|
||||
void input_mt_report_pointer_emulation(struct input_dev *dev, bool use_count);
|
||||
void input_mt_drop_unused(struct input_dev *dev);
|
||||
|
||||
void input_mt_sync_frame(struct input_dev *dev);
|
||||
|
||||
|
|
|
|||
|
|
@ -43,10 +43,22 @@ enum pixcir_int_mode {
|
|||
#define PIXCIR_INT_ENABLE (1UL << 3)
|
||||
#define PIXCIR_INT_POL_HIGH (1UL << 2)
|
||||
|
||||
/**
|
||||
* struct pixcir_irc_chip_data - chip related data
|
||||
* @max_fingers: Max number of fingers reported simultaneously by h/w
|
||||
* @has_hw_ids: Hardware supports finger tracking IDs
|
||||
*
|
||||
*/
|
||||
struct pixcir_i2c_chip_data {
|
||||
u8 max_fingers;
|
||||
bool has_hw_ids;
|
||||
};
|
||||
|
||||
struct pixcir_ts_platform_data {
|
||||
int x_max;
|
||||
int y_max;
|
||||
int gpio_attb; /* GPIO connected to ATTB line */
|
||||
struct pixcir_i2c_chip_data chip;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -237,6 +237,12 @@ extern int iomem_is_exclusive(u64 addr);
|
|||
extern int
|
||||
walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages,
|
||||
void *arg, int (*func)(unsigned long, unsigned long, void *));
|
||||
extern int
|
||||
walk_system_ram_res(u64 start, u64 end, void *arg,
|
||||
int (*func)(u64, u64, void *));
|
||||
extern int
|
||||
walk_iomem_res(char *name, unsigned long flags, u64 start, u64 end, void *arg,
|
||||
int (*func)(u64, u64, void *));
|
||||
|
||||
/* True if any part of r1 overlaps r2 */
|
||||
static inline bool resource_overlaps(struct resource *r1, struct resource *r2)
|
||||
|
|
|
|||
|
|
@ -470,6 +470,7 @@ extern enum system_states {
|
|||
#define TAINT_FIRMWARE_WORKAROUND 11
|
||||
#define TAINT_OOT_MODULE 12
|
||||
#define TAINT_UNSIGNED_MODULE 13
|
||||
#define TAINT_SOFTLOCKUP 14
|
||||
|
||||
extern const char hex_asc[];
|
||||
#define hex_asc_lo(x) hex_asc[((x) & 0x0f)]
|
||||
|
|
@ -493,11 +494,6 @@ static inline char *hex_byte_pack_upper(char *buf, u8 byte)
|
|||
return buf;
|
||||
}
|
||||
|
||||
static inline char * __deprecated pack_hex_byte(char *buf, u8 byte)
|
||||
{
|
||||
return hex_byte_pack(buf, byte);
|
||||
}
|
||||
|
||||
extern int hex_to_bin(char ch);
|
||||
extern int __must_check hex2bin(u8 *dst, const char *src, size_t count);
|
||||
|
||||
|
|
@ -849,5 +845,7 @@ static inline void ftrace_dump(enum ftrace_dump_mode oops_dump_mode) { }
|
|||
/* User perms >= group perms >= other perms */ \
|
||||
BUILD_BUG_ON_ZERO(((perms) >> 6) < (((perms) >> 3) & 7)) + \
|
||||
BUILD_BUG_ON_ZERO((((perms) >> 3) & 7) < ((perms) & 7)) + \
|
||||
/* Other writable? Generally considered a bad idea. */ \
|
||||
BUILD_BUG_ON_ZERO((perms) & 2) + \
|
||||
(perms))
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
#include <linux/ioport.h>
|
||||
#include <linux/elfcore.h>
|
||||
#include <linux/elf.h>
|
||||
#include <linux/module.h>
|
||||
#include <asm/kexec.h>
|
||||
|
||||
/* Verify architecture specific macros are defined */
|
||||
|
|
@ -69,7 +70,18 @@ typedef unsigned long kimage_entry_t;
|
|||
#define IND_SOURCE 0x8
|
||||
|
||||
struct kexec_segment {
|
||||
void __user *buf;
|
||||
/*
|
||||
* This pointer can point to user memory if kexec_load() system
|
||||
* call is used or will point to kernel memory if
|
||||
* kexec_file_load() system call is used.
|
||||
*
|
||||
* Use ->buf when expecting to deal with user memory and use ->kbuf
|
||||
* when expecting to deal with kernel memory.
|
||||
*/
|
||||
union {
|
||||
void __user *buf;
|
||||
void *kbuf;
|
||||
};
|
||||
size_t bufsz;
|
||||
unsigned long mem;
|
||||
size_t memsz;
|
||||
|
|
@ -84,6 +96,27 @@ struct compat_kexec_segment {
|
|||
};
|
||||
#endif
|
||||
|
||||
struct kexec_sha_region {
|
||||
unsigned long start;
|
||||
unsigned long len;
|
||||
};
|
||||
|
||||
struct purgatory_info {
|
||||
/* Pointer to elf header of read only purgatory */
|
||||
Elf_Ehdr *ehdr;
|
||||
|
||||
/* Pointer to purgatory sechdrs which are modifiable */
|
||||
Elf_Shdr *sechdrs;
|
||||
/*
|
||||
* Temporary buffer location where purgatory is loaded and relocated
|
||||
* This memory can be freed post image load
|
||||
*/
|
||||
void *purgatory_buf;
|
||||
|
||||
/* Address where purgatory is finally loaded and is executed from */
|
||||
unsigned long purgatory_load_addr;
|
||||
};
|
||||
|
||||
struct kimage {
|
||||
kimage_entry_t head;
|
||||
kimage_entry_t *entry;
|
||||
|
|
@ -100,7 +133,7 @@ struct kimage {
|
|||
|
||||
struct list_head control_pages;
|
||||
struct list_head dest_pages;
|
||||
struct list_head unuseable_pages;
|
||||
struct list_head unusable_pages;
|
||||
|
||||
/* Address of next control page to allocate for crash kernels. */
|
||||
unsigned long control_page;
|
||||
|
|
@ -110,13 +143,63 @@ struct kimage {
|
|||
#define KEXEC_TYPE_DEFAULT 0
|
||||
#define KEXEC_TYPE_CRASH 1
|
||||
unsigned int preserve_context : 1;
|
||||
/* If set, we are using file mode kexec syscall */
|
||||
unsigned int file_mode:1;
|
||||
|
||||
#ifdef ARCH_HAS_KIMAGE_ARCH
|
||||
struct kimage_arch arch;
|
||||
#endif
|
||||
|
||||
/* Additional fields for file based kexec syscall */
|
||||
void *kernel_buf;
|
||||
unsigned long kernel_buf_len;
|
||||
|
||||
void *initrd_buf;
|
||||
unsigned long initrd_buf_len;
|
||||
|
||||
char *cmdline_buf;
|
||||
unsigned long cmdline_buf_len;
|
||||
|
||||
/* File operations provided by image loader */
|
||||
struct kexec_file_ops *fops;
|
||||
|
||||
/* Image loader handling the kernel can store a pointer here */
|
||||
void *image_loader_data;
|
||||
|
||||
/* Information for loading purgatory */
|
||||
struct purgatory_info purgatory_info;
|
||||
};
|
||||
|
||||
/*
|
||||
* Keeps track of buffer parameters as provided by caller for requesting
|
||||
* memory placement of buffer.
|
||||
*/
|
||||
struct kexec_buf {
|
||||
struct kimage *image;
|
||||
char *buffer;
|
||||
unsigned long bufsz;
|
||||
unsigned long memsz;
|
||||
unsigned long buf_align;
|
||||
unsigned long buf_min;
|
||||
unsigned long buf_max;
|
||||
bool top_down; /* allocate from top of memory hole */
|
||||
};
|
||||
|
||||
typedef int (kexec_probe_t)(const char *kernel_buf, unsigned long kernel_size);
|
||||
typedef void *(kexec_load_t)(struct kimage *image, char *kernel_buf,
|
||||
unsigned long kernel_len, char *initrd,
|
||||
unsigned long initrd_len, char *cmdline,
|
||||
unsigned long cmdline_len);
|
||||
typedef int (kexec_cleanup_t)(void *loader_data);
|
||||
typedef int (kexec_verify_sig_t)(const char *kernel_buf,
|
||||
unsigned long kernel_len);
|
||||
|
||||
struct kexec_file_ops {
|
||||
kexec_probe_t *probe;
|
||||
kexec_load_t *load;
|
||||
kexec_cleanup_t *cleanup;
|
||||
kexec_verify_sig_t *verify_sig;
|
||||
};
|
||||
|
||||
/* kexec interface functions */
|
||||
extern void machine_kexec(struct kimage *image);
|
||||
|
|
@ -127,8 +210,21 @@ extern asmlinkage long sys_kexec_load(unsigned long entry,
|
|||
struct kexec_segment __user *segments,
|
||||
unsigned long flags);
|
||||
extern int kernel_kexec(void);
|
||||
extern int kexec_add_buffer(struct kimage *image, char *buffer,
|
||||
unsigned long bufsz, unsigned long memsz,
|
||||
unsigned long buf_align, unsigned long buf_min,
|
||||
unsigned long buf_max, bool top_down,
|
||||
unsigned long *load_addr);
|
||||
extern struct page *kimage_alloc_control_pages(struct kimage *image,
|
||||
unsigned int order);
|
||||
extern int kexec_load_purgatory(struct kimage *image, unsigned long min,
|
||||
unsigned long max, int top_down,
|
||||
unsigned long *load_addr);
|
||||
extern int kexec_purgatory_get_set_symbol(struct kimage *image,
|
||||
const char *name, void *buf,
|
||||
unsigned int size, bool get_value);
|
||||
extern void *kexec_purgatory_get_symbol_addr(struct kimage *image,
|
||||
const char *name);
|
||||
extern void crash_kexec(struct pt_regs *);
|
||||
int kexec_should_crash(struct task_struct *);
|
||||
void crash_save_cpu(struct pt_regs *regs, int cpu);
|
||||
|
|
@ -177,6 +273,10 @@ extern int kexec_load_disabled;
|
|||
#define KEXEC_FLAGS (KEXEC_ON_CRASH | KEXEC_PRESERVE_CONTEXT)
|
||||
#endif
|
||||
|
||||
/* List of defined/legal kexec file flags */
|
||||
#define KEXEC_FILE_FLAGS (KEXEC_FILE_UNLOAD | KEXEC_FILE_ON_CRASH | \
|
||||
KEXEC_FILE_NO_INITRAMFS)
|
||||
|
||||
#define VMCOREINFO_BYTES (4096)
|
||||
#define VMCOREINFO_NOTE_NAME "VMCOREINFO"
|
||||
#define VMCOREINFO_NOTE_NAME_BYTES ALIGN(sizeof(VMCOREINFO_NOTE_NAME), 4)
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ struct klist_node {
|
|||
|
||||
extern void klist_add_tail(struct klist_node *n, struct klist *k);
|
||||
extern void klist_add_head(struct klist_node *n, struct klist *k);
|
||||
extern void klist_add_after(struct klist_node *n, struct klist_node *pos);
|
||||
extern void klist_add_behind(struct klist_node *n, struct klist_node *pos);
|
||||
extern void klist_add_before(struct klist_node *n, struct klist_node *pos);
|
||||
|
||||
extern void klist_del(struct klist_node *n);
|
||||
|
|
|
|||
|
|
@ -325,24 +325,7 @@ struct kvm_kernel_irq_routing_entry {
|
|||
struct hlist_node link;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_HAVE_KVM_IRQ_ROUTING
|
||||
|
||||
struct kvm_irq_routing_table {
|
||||
int chip[KVM_NR_IRQCHIPS][KVM_IRQCHIP_NUM_PINS];
|
||||
struct kvm_kernel_irq_routing_entry *rt_entries;
|
||||
u32 nr_rt_entries;
|
||||
/*
|
||||
* Array indexed by gsi. Each entry contains list of irq chips
|
||||
* the gsi is connected to.
|
||||
*/
|
||||
struct hlist_head map[0];
|
||||
};
|
||||
|
||||
#else
|
||||
|
||||
struct kvm_irq_routing_table {};
|
||||
|
||||
#endif
|
||||
struct kvm_irq_routing_table;
|
||||
|
||||
#ifndef KVM_PRIVATE_MEM_SLOTS
|
||||
#define KVM_PRIVATE_MEM_SLOTS 0
|
||||
|
|
@ -401,11 +384,12 @@ struct kvm {
|
|||
struct mutex irq_lock;
|
||||
#ifdef CONFIG_HAVE_KVM_IRQCHIP
|
||||
/*
|
||||
* Update side is protected by irq_lock and,
|
||||
* if configured, irqfds.lock.
|
||||
* Update side is protected by irq_lock.
|
||||
*/
|
||||
struct kvm_irq_routing_table __rcu *irq_routing;
|
||||
struct hlist_head mask_notifier_list;
|
||||
#endif
|
||||
#ifdef CONFIG_HAVE_KVM_IRQFD
|
||||
struct hlist_head irq_ack_notifier_list;
|
||||
#endif
|
||||
|
||||
|
|
@ -455,7 +439,7 @@ void kvm_vcpu_uninit(struct kvm_vcpu *vcpu);
|
|||
int __must_check vcpu_load(struct kvm_vcpu *vcpu);
|
||||
void vcpu_put(struct kvm_vcpu *vcpu);
|
||||
|
||||
#ifdef CONFIG_HAVE_KVM_IRQ_ROUTING
|
||||
#ifdef CONFIG_HAVE_KVM_IRQFD
|
||||
int kvm_irqfd_init(void);
|
||||
void kvm_irqfd_exit(void);
|
||||
#else
|
||||
|
|
@ -602,7 +586,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
|
|||
unsigned int ioctl, unsigned long arg);
|
||||
int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf);
|
||||
|
||||
int kvm_dev_ioctl_check_extension(long ext);
|
||||
int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext);
|
||||
|
||||
int kvm_get_dirty_log(struct kvm *kvm,
|
||||
struct kvm_dirty_log *log, int *is_dirty);
|
||||
|
|
@ -752,6 +736,10 @@ void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
|
|||
void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
|
||||
bool mask);
|
||||
|
||||
int kvm_irq_map_gsi(struct kvm *kvm,
|
||||
struct kvm_kernel_irq_routing_entry *entries, int gsi);
|
||||
int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin);
|
||||
|
||||
int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
|
||||
bool line_status);
|
||||
int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level);
|
||||
|
|
@ -942,28 +930,27 @@ int kvm_set_irq_routing(struct kvm *kvm,
|
|||
const struct kvm_irq_routing_entry *entries,
|
||||
unsigned nr,
|
||||
unsigned flags);
|
||||
int kvm_set_routing_entry(struct kvm_irq_routing_table *rt,
|
||||
struct kvm_kernel_irq_routing_entry *e,
|
||||
int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
|
||||
const struct kvm_irq_routing_entry *ue);
|
||||
void kvm_free_irq_routing(struct kvm *kvm);
|
||||
|
||||
int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi);
|
||||
|
||||
#else
|
||||
|
||||
static inline void kvm_free_irq_routing(struct kvm *kvm) {}
|
||||
|
||||
#endif
|
||||
|
||||
int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi);
|
||||
|
||||
#ifdef CONFIG_HAVE_KVM_EVENTFD
|
||||
|
||||
void kvm_eventfd_init(struct kvm *kvm);
|
||||
int kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args);
|
||||
|
||||
#ifdef CONFIG_HAVE_KVM_IRQCHIP
|
||||
#ifdef CONFIG_HAVE_KVM_IRQFD
|
||||
int kvm_irqfd(struct kvm *kvm, struct kvm_irqfd *args);
|
||||
void kvm_irqfd_release(struct kvm *kvm);
|
||||
void kvm_irq_routing_update(struct kvm *, struct kvm_irq_routing_table *);
|
||||
void kvm_irq_routing_update(struct kvm *);
|
||||
#else
|
||||
static inline int kvm_irqfd(struct kvm *kvm, struct kvm_irqfd *args)
|
||||
{
|
||||
|
|
@ -985,10 +972,8 @@ static inline int kvm_irqfd(struct kvm *kvm, struct kvm_irqfd *args)
|
|||
static inline void kvm_irqfd_release(struct kvm *kvm) {}
|
||||
|
||||
#ifdef CONFIG_HAVE_KVM_IRQCHIP
|
||||
static inline void kvm_irq_routing_update(struct kvm *kvm,
|
||||
struct kvm_irq_routing_table *irq_rt)
|
||||
static inline void kvm_irq_routing_update(struct kvm *kvm)
|
||||
{
|
||||
rcu_assign_pointer(kvm->irq_routing, irq_rt);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@
|
|||
#include <linux/list.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/rwsem.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/workqueue.h>
|
||||
|
||||
struct device;
|
||||
|
|
@ -63,11 +62,13 @@ struct led_classdev {
|
|||
unsigned long *delay_off);
|
||||
|
||||
struct device *dev;
|
||||
const struct attribute_group **groups;
|
||||
|
||||
struct list_head node; /* LED Device list */
|
||||
const char *default_trigger; /* Trigger to use */
|
||||
|
||||
unsigned long blink_delay_on, blink_delay_off;
|
||||
struct timer_list blink_timer;
|
||||
struct delayed_work blink_work;
|
||||
int blink_brightness;
|
||||
|
||||
struct work_struct set_brightness_work;
|
||||
|
|
|
|||
|
|
@ -654,15 +654,15 @@ static inline void hlist_add_before(struct hlist_node *n,
|
|||
*(n->pprev) = n;
|
||||
}
|
||||
|
||||
static inline void hlist_add_after(struct hlist_node *n,
|
||||
struct hlist_node *next)
|
||||
static inline void hlist_add_behind(struct hlist_node *n,
|
||||
struct hlist_node *prev)
|
||||
{
|
||||
next->next = n->next;
|
||||
n->next = next;
|
||||
next->pprev = &n->next;
|
||||
n->next = prev->next;
|
||||
prev->next = n;
|
||||
n->pprev = &prev->next;
|
||||
|
||||
if(next->next)
|
||||
next->next->pprev = &next->next;
|
||||
if (n->next)
|
||||
n->next->pprev = &n->next;
|
||||
}
|
||||
|
||||
/* after that we'll appear to be on some hlist and hlist_del will work */
|
||||
|
|
|
|||
|
|
@ -249,7 +249,7 @@ phys_addr_t memblock_alloc(phys_addr_t size, phys_addr_t align);
|
|||
/*
|
||||
* Set the allocation direction to bottom-up or top-down.
|
||||
*/
|
||||
static inline void memblock_set_bottom_up(bool enable)
|
||||
static inline void __init memblock_set_bottom_up(bool enable)
|
||||
{
|
||||
memblock.bottom_up = enable;
|
||||
}
|
||||
|
|
@ -264,7 +264,7 @@ static inline bool memblock_bottom_up(void)
|
|||
return memblock.bottom_up;
|
||||
}
|
||||
#else
|
||||
static inline void memblock_set_bottom_up(bool enable) {}
|
||||
static inline void __init memblock_set_bottom_up(bool enable) {}
|
||||
static inline bool memblock_bottom_up(void) { return false; }
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -54,39 +54,20 @@ struct mem_cgroup_reclaim_cookie {
|
|||
};
|
||||
|
||||
#ifdef CONFIG_MEMCG
|
||||
/*
|
||||
* All "charge" functions with gfp_mask should use GFP_KERNEL or
|
||||
* (gfp_mask & GFP_RECLAIM_MASK). In current implementatin, memcg doesn't
|
||||
* alloc memory but reclaims memory from all available zones. So, "where I want
|
||||
* memory from" bits of gfp_mask has no meaning. So any bits of that field is
|
||||
* available but adding a rule is better. charge functions' gfp_mask should
|
||||
* be set to GFP_KERNEL or gfp_mask & GFP_RECLAIM_MASK for avoiding ambiguous
|
||||
* codes.
|
||||
* (Of course, if memcg does memory allocation in future, GFP_KERNEL is sane.)
|
||||
*/
|
||||
int mem_cgroup_try_charge(struct page *page, struct mm_struct *mm,
|
||||
gfp_t gfp_mask, struct mem_cgroup **memcgp);
|
||||
void mem_cgroup_commit_charge(struct page *page, struct mem_cgroup *memcg,
|
||||
bool lrucare);
|
||||
void mem_cgroup_cancel_charge(struct page *page, struct mem_cgroup *memcg);
|
||||
void mem_cgroup_uncharge(struct page *page);
|
||||
void mem_cgroup_uncharge_list(struct list_head *page_list);
|
||||
|
||||
extern int mem_cgroup_charge_anon(struct page *page, struct mm_struct *mm,
|
||||
gfp_t gfp_mask);
|
||||
/* for swap handling */
|
||||
extern int mem_cgroup_try_charge_swapin(struct mm_struct *mm,
|
||||
struct page *page, gfp_t mask, struct mem_cgroup **memcgp);
|
||||
extern void mem_cgroup_commit_charge_swapin(struct page *page,
|
||||
struct mem_cgroup *memcg);
|
||||
extern void mem_cgroup_cancel_charge_swapin(struct mem_cgroup *memcg);
|
||||
|
||||
extern int mem_cgroup_charge_file(struct page *page, struct mm_struct *mm,
|
||||
gfp_t gfp_mask);
|
||||
void mem_cgroup_migrate(struct page *oldpage, struct page *newpage,
|
||||
bool lrucare);
|
||||
|
||||
struct lruvec *mem_cgroup_zone_lruvec(struct zone *, struct mem_cgroup *);
|
||||
struct lruvec *mem_cgroup_page_lruvec(struct page *, struct zone *);
|
||||
|
||||
/* For coalescing uncharge for reducing memcg' overhead*/
|
||||
extern void mem_cgroup_uncharge_start(void);
|
||||
extern void mem_cgroup_uncharge_end(void);
|
||||
|
||||
extern void mem_cgroup_uncharge_page(struct page *page);
|
||||
extern void mem_cgroup_uncharge_cache_page(struct page *page);
|
||||
|
||||
bool __mem_cgroup_same_or_subtree(const struct mem_cgroup *root_memcg,
|
||||
struct mem_cgroup *memcg);
|
||||
bool task_in_mem_cgroup(struct task_struct *task,
|
||||
|
|
@ -113,12 +94,6 @@ bool mm_match_cgroup(const struct mm_struct *mm, const struct mem_cgroup *memcg)
|
|||
|
||||
extern struct cgroup_subsys_state *mem_cgroup_css(struct mem_cgroup *memcg);
|
||||
|
||||
extern void
|
||||
mem_cgroup_prepare_migration(struct page *page, struct page *newpage,
|
||||
struct mem_cgroup **memcgp);
|
||||
extern void mem_cgroup_end_migration(struct mem_cgroup *memcg,
|
||||
struct page *oldpage, struct page *newpage, bool migration_ok);
|
||||
|
||||
struct mem_cgroup *mem_cgroup_iter(struct mem_cgroup *,
|
||||
struct mem_cgroup *,
|
||||
struct mem_cgroup_reclaim_cookie *);
|
||||
|
|
@ -133,8 +108,6 @@ unsigned long mem_cgroup_get_lru_size(struct lruvec *lruvec, enum lru_list);
|
|||
void mem_cgroup_update_lru_size(struct lruvec *, enum lru_list, int);
|
||||
extern void mem_cgroup_print_oom_info(struct mem_cgroup *memcg,
|
||||
struct task_struct *p);
|
||||
extern void mem_cgroup_replace_page_cache(struct page *oldpage,
|
||||
struct page *newpage);
|
||||
|
||||
static inline void mem_cgroup_oom_enable(void)
|
||||
{
|
||||
|
|
@ -233,46 +206,36 @@ void mem_cgroup_print_bad_page(struct page *page);
|
|||
#else /* CONFIG_MEMCG */
|
||||
struct mem_cgroup;
|
||||
|
||||
static inline int mem_cgroup_charge_anon(struct page *page,
|
||||
struct mm_struct *mm, gfp_t gfp_mask)
|
||||
static inline int mem_cgroup_try_charge(struct page *page, struct mm_struct *mm,
|
||||
gfp_t gfp_mask,
|
||||
struct mem_cgroup **memcgp)
|
||||
{
|
||||
*memcgp = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int mem_cgroup_charge_file(struct page *page,
|
||||
struct mm_struct *mm, gfp_t gfp_mask)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int mem_cgroup_try_charge_swapin(struct mm_struct *mm,
|
||||
struct page *page, gfp_t gfp_mask, struct mem_cgroup **memcgp)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void mem_cgroup_commit_charge_swapin(struct page *page,
|
||||
struct mem_cgroup *memcg)
|
||||
static inline void mem_cgroup_commit_charge(struct page *page,
|
||||
struct mem_cgroup *memcg,
|
||||
bool lrucare)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void mem_cgroup_cancel_charge_swapin(struct mem_cgroup *memcg)
|
||||
static inline void mem_cgroup_cancel_charge(struct page *page,
|
||||
struct mem_cgroup *memcg)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void mem_cgroup_uncharge_start(void)
|
||||
static inline void mem_cgroup_uncharge(struct page *page)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void mem_cgroup_uncharge_end(void)
|
||||
static inline void mem_cgroup_uncharge_list(struct list_head *page_list)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void mem_cgroup_uncharge_page(struct page *page)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void mem_cgroup_uncharge_cache_page(struct page *page)
|
||||
static inline void mem_cgroup_migrate(struct page *oldpage,
|
||||
struct page *newpage,
|
||||
bool lrucare)
|
||||
{
|
||||
}
|
||||
|
||||
|
|
@ -311,17 +274,6 @@ static inline struct cgroup_subsys_state
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static inline void
|
||||
mem_cgroup_prepare_migration(struct page *page, struct page *newpage,
|
||||
struct mem_cgroup **memcgp)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void mem_cgroup_end_migration(struct mem_cgroup *memcg,
|
||||
struct page *oldpage, struct page *newpage, bool migration_ok)
|
||||
{
|
||||
}
|
||||
|
||||
static inline struct mem_cgroup *
|
||||
mem_cgroup_iter(struct mem_cgroup *root,
|
||||
struct mem_cgroup *prev,
|
||||
|
|
@ -417,10 +369,6 @@ static inline
|
|||
void mem_cgroup_count_vm_event(struct mm_struct *mm, enum vm_event_item idx)
|
||||
{
|
||||
}
|
||||
static inline void mem_cgroup_replace_page_cache(struct page *oldpage,
|
||||
struct page *newpage)
|
||||
{
|
||||
}
|
||||
#endif /* CONFIG_MEMCG */
|
||||
|
||||
#if !defined(CONFIG_MEMCG) || !defined(CONFIG_DEBUG_VM)
|
||||
|
|
|
|||
|
|
@ -26,11 +26,12 @@ enum {
|
|||
MEMORY_HOTPLUG_MAX_BOOTMEM_TYPE = NODE_INFO,
|
||||
};
|
||||
|
||||
/* Types for control the zone type of onlined memory */
|
||||
/* Types for control the zone type of onlined and offlined memory */
|
||||
enum {
|
||||
ONLINE_KEEP,
|
||||
ONLINE_KERNEL,
|
||||
ONLINE_MOVABLE,
|
||||
MMOP_OFFLINE = -1,
|
||||
MMOP_ONLINE_KEEP,
|
||||
MMOP_ONLINE_KERNEL,
|
||||
MMOP_ONLINE_MOVABLE,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -258,6 +259,7 @@ static inline void remove_memory(int nid, u64 start, u64 size) {}
|
|||
extern int walk_memory_range(unsigned long start_pfn, unsigned long end_pfn,
|
||||
void *arg, int (*func)(struct memory_block *, void *));
|
||||
extern int add_memory(int nid, u64 start, u64 size);
|
||||
extern int zone_for_memory(int nid, u64 start, u64 size, int zone_default);
|
||||
extern int arch_add_memory(int nid, u64 start, u64 size);
|
||||
extern int offline_pages(unsigned long start_pfn, unsigned long nr_pages);
|
||||
extern bool is_memblock_offlined(struct memory_block *mem);
|
||||
|
|
|
|||
|
|
@ -505,6 +505,7 @@ static inline int is_ab9540_2p0_or_earlier(struct ab8500 *ab)
|
|||
void ab8500_override_turn_on_stat(u8 mask, u8 set);
|
||||
|
||||
#ifdef CONFIG_AB8500_DEBUG
|
||||
extern int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size);
|
||||
void ab8500_dump_all_banks(struct device *dev);
|
||||
void ab8500_debug_register_interrupt(int line);
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@
|
|||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/mfd/arizona/pdata.h>
|
||||
|
||||
#define ARIZONA_MAX_CORE_SUPPLIES 3
|
||||
#define ARIZONA_MAX_CORE_SUPPLIES 2
|
||||
|
||||
enum arizona_type {
|
||||
WM5102 = 1,
|
||||
|
|
@ -46,8 +46,8 @@ enum arizona_type {
|
|||
#define ARIZONA_IRQ_DSP_IRQ6 17
|
||||
#define ARIZONA_IRQ_DSP_IRQ7 18
|
||||
#define ARIZONA_IRQ_DSP_IRQ8 19
|
||||
#define ARIZONA_IRQ_SPK_SHUTDOWN_WARN 20
|
||||
#define ARIZONA_IRQ_SPK_SHUTDOWN 21
|
||||
#define ARIZONA_IRQ_SPK_OVERHEAT_WARN 20
|
||||
#define ARIZONA_IRQ_SPK_OVERHEAT 21
|
||||
#define ARIZONA_IRQ_MICDET 22
|
||||
#define ARIZONA_IRQ_HPDET 23
|
||||
#define ARIZONA_IRQ_WSEQ_DONE 24
|
||||
|
|
@ -78,8 +78,31 @@ enum arizona_type {
|
|||
#define ARIZONA_IRQ_FLL1_CLOCK_OK 49
|
||||
#define ARIZONA_IRQ_MICD_CLAMP_RISE 50
|
||||
#define ARIZONA_IRQ_MICD_CLAMP_FALL 51
|
||||
#define ARIZONA_IRQ_HP3R_DONE 52
|
||||
#define ARIZONA_IRQ_HP3L_DONE 53
|
||||
#define ARIZONA_IRQ_HP2R_DONE 54
|
||||
#define ARIZONA_IRQ_HP2L_DONE 55
|
||||
#define ARIZONA_IRQ_HP1R_DONE 56
|
||||
#define ARIZONA_IRQ_HP1L_DONE 57
|
||||
#define ARIZONA_IRQ_ISRC3_CFG_ERR 58
|
||||
#define ARIZONA_IRQ_DSP_SHARED_WR_COLL 59
|
||||
#define ARIZONA_IRQ_SPK_SHUTDOWN 60
|
||||
#define ARIZONA_IRQ_SPK1R_SHORT 61
|
||||
#define ARIZONA_IRQ_SPK1L_SHORT 62
|
||||
#define ARIZONA_IRQ_HP3R_SC_NEG 63
|
||||
#define ARIZONA_IRQ_HP3R_SC_POS 64
|
||||
#define ARIZONA_IRQ_HP3L_SC_NEG 65
|
||||
#define ARIZONA_IRQ_HP3L_SC_POS 66
|
||||
#define ARIZONA_IRQ_HP2R_SC_NEG 67
|
||||
#define ARIZONA_IRQ_HP2R_SC_POS 68
|
||||
#define ARIZONA_IRQ_HP2L_SC_NEG 69
|
||||
#define ARIZONA_IRQ_HP2L_SC_POS 70
|
||||
#define ARIZONA_IRQ_HP1R_SC_NEG 71
|
||||
#define ARIZONA_IRQ_HP1R_SC_POS 72
|
||||
#define ARIZONA_IRQ_HP1L_SC_NEG 73
|
||||
#define ARIZONA_IRQ_HP1L_SC_POS 74
|
||||
|
||||
#define ARIZONA_NUM_IRQ 52
|
||||
#define ARIZONA_NUM_IRQ 75
|
||||
|
||||
struct snd_soc_dapm_context;
|
||||
|
||||
|
|
@ -109,6 +132,8 @@ struct arizona {
|
|||
struct mutex clk_lock;
|
||||
int clk32k_ref;
|
||||
|
||||
bool ctrlif_error;
|
||||
|
||||
struct snd_soc_dapm_context *dapm;
|
||||
|
||||
int tdm_width[ARIZONA_MAX_AIF];
|
||||
|
|
|
|||
|
|
@ -878,22 +878,26 @@
|
|||
#define ARIZONA_INTERRUPT_STATUS_3 0xD02
|
||||
#define ARIZONA_INTERRUPT_STATUS_4 0xD03
|
||||
#define ARIZONA_INTERRUPT_STATUS_5 0xD04
|
||||
#define ARIZONA_INTERRUPT_STATUS_6 0xD05
|
||||
#define ARIZONA_INTERRUPT_STATUS_1_MASK 0xD08
|
||||
#define ARIZONA_INTERRUPT_STATUS_2_MASK 0xD09
|
||||
#define ARIZONA_INTERRUPT_STATUS_3_MASK 0xD0A
|
||||
#define ARIZONA_INTERRUPT_STATUS_4_MASK 0xD0B
|
||||
#define ARIZONA_INTERRUPT_STATUS_5_MASK 0xD0C
|
||||
#define ARIZONA_INTERRUPT_STATUS_6_MASK 0xD0D
|
||||
#define ARIZONA_INTERRUPT_CONTROL 0xD0F
|
||||
#define ARIZONA_IRQ2_STATUS_1 0xD10
|
||||
#define ARIZONA_IRQ2_STATUS_2 0xD11
|
||||
#define ARIZONA_IRQ2_STATUS_3 0xD12
|
||||
#define ARIZONA_IRQ2_STATUS_4 0xD13
|
||||
#define ARIZONA_IRQ2_STATUS_5 0xD14
|
||||
#define ARIZONA_IRQ2_STATUS_6 0xD15
|
||||
#define ARIZONA_IRQ2_STATUS_1_MASK 0xD18
|
||||
#define ARIZONA_IRQ2_STATUS_2_MASK 0xD19
|
||||
#define ARIZONA_IRQ2_STATUS_3_MASK 0xD1A
|
||||
#define ARIZONA_IRQ2_STATUS_4_MASK 0xD1B
|
||||
#define ARIZONA_IRQ2_STATUS_5_MASK 0xD1C
|
||||
#define ARIZONA_IRQ2_STATUS_6_MASK 0xD1D
|
||||
#define ARIZONA_IRQ2_CONTROL 0xD1F
|
||||
#define ARIZONA_INTERRUPT_RAW_STATUS_2 0xD20
|
||||
#define ARIZONA_INTERRUPT_RAW_STATUS_3 0xD21
|
||||
|
|
@ -902,6 +906,7 @@
|
|||
#define ARIZONA_INTERRUPT_RAW_STATUS_6 0xD24
|
||||
#define ARIZONA_INTERRUPT_RAW_STATUS_7 0xD25
|
||||
#define ARIZONA_INTERRUPT_RAW_STATUS_8 0xD26
|
||||
#define ARIZONA_INTERRUPT_RAW_STATUS_9 0xD28
|
||||
#define ARIZONA_IRQ_PIN_STATUS 0xD40
|
||||
#define ARIZONA_ADSP2_IRQ0 0xD41
|
||||
#define ARIZONA_AOD_WKUP_AND_TRIG 0xD50
|
||||
|
|
@ -4691,14 +4696,14 @@
|
|||
/*
|
||||
* R3330 (0xD02) - Interrupt Status 3
|
||||
*/
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1 0x4000 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT 14 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT1 0x8000 /* SPK_OVERHEAT_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT1_MASK 0x8000 /* SPK_OVERHEAD_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT1_SHIFT 15 /* SPK_OVERHEAT_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT1 0x4000 /* SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT1_MASK 0x4000 /* SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT1_SHIFT 14 /* SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT1_WIDTH 1 /* SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_HPDET_EINT1 0x2000 /* HPDET_EINT1 */
|
||||
#define ARIZONA_HPDET_EINT1_MASK 0x2000 /* HPDET_EINT1 */
|
||||
#define ARIZONA_HPDET_EINT1_SHIFT 13 /* HPDET_EINT1 */
|
||||
|
|
@ -4795,6 +4800,77 @@
|
|||
#define ARIZONA_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_HP3R_DONE_EINT1 0x0020 /* HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_HP3R_DONE_EINT1_MASK 0x0020 /* HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_HP3R_DONE_EINT1_SHIFT 5 /* HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_HP3R_DONE_EINT1_WIDTH 1 /* HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_HP3L_DONE_EINT1 0x0010 /* HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_HP3L_DONE_EINT1_MASK 0x0010 /* HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_HP3L_DONE_EINT1_SHIFT 4 /* HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_HP3L_DONE_EINT1_WIDTH 1 /* HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_HP2R_DONE_EINT1 0x0008 /* HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_HP2R_DONE_EINT1_MASK 0x0008 /* HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_HP2R_DONE_EINT1_SHIFT 3 /* HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_HP2R_DONE_EINT1_WIDTH 1 /* HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_HP2L_DONE_EINT1 0x0004 /* HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_HP2L_DONE_EINT1_MASK 0x0004 /* HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_HP2L_DONE_EINT1_SHIFT 2 /* HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_HP2L_DONE_EINT1_WIDTH 1 /* HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_HP1R_DONE_EINT1 0x0002 /* HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_HP1R_DONE_EINT1_MASK 0x0002 /* HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_HP1R_DONE_EINT1_SHIFT 1 /* HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_HP1R_DONE_EINT1_WIDTH 1 /* HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_HP1L_DONE_EINT1 0x0001 /* HP1L_DONE_EINT1 */
|
||||
#define ARIZONA_HP1L_DONE_EINT1_MASK 0x0001 /* HP1L_DONE_EINT1 */
|
||||
#define ARIZONA_HP1L_DONE_EINT1_SHIFT 0 /* HP1L_DONE_EINT1 */
|
||||
#define ARIZONA_HP1L_DONE_EINT1_WIDTH 1 /* HP1L_DONE_EINT1 */
|
||||
|
||||
/*
|
||||
* R3331 (0xD03) - Interrupt Status 4 (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT1 0x8000 /* AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT1_MASK 0x8000 /* AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT1_SHIFT 15 /* AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT1_WIDTH 1 /* AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT1 0x4000 /* AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT1_MASK 0x4000 /* AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT1_SHIFT 14 /* AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT1_WIDTH 1 /* AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT1 0x2000 /* AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT1_MASK 0x2000 /* AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT1_SHIFT 13 /* AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT1_WIDTH 1 /* AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT1 0x1000 /* CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT1_MASK 0x1000 /* CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT1_SHIFT 12 /* CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT1_WIDTH 1 /* CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1 0x0800 /* MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 11 /* MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1 0x0400 /* ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 10 /* ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1 0x0200 /* SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_SHIFT 9 /* SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1 0x0100 /* ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_MASK 0x0100 /* ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_SHIFT 8 /* ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1 0x0080 /* ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_MASK 0x0080 /* ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_SHIFT 7 /* ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1 0x0040 /* ISRC3_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_MASK 0x0040 /* ISRC3_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_SHIFT 6 /* ISRC3_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT1_WIDTH 1 /* ISRC3_CFG_ERR_EINT1 */
|
||||
|
||||
/*
|
||||
* R3332 (0xD04) - Interrupt Status 5
|
||||
|
|
@ -4820,6 +4896,85 @@
|
|||
#define ARIZONA_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* FLL1_CLOCK_OK_EINT1 */
|
||||
#define ARIZONA_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* FLL1_CLOCK_OK_EINT1 */
|
||||
|
||||
/*
|
||||
* R3332 (0xD05) - Interrupt Status 5 (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT1 0x0008 /* ASRC_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT1_MASK 0x0008 /* ASRC_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT1_SHIFT 3 /* ASRC_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT1_WIDTH 1 /* ASRC_CFG_ERR_EINT1 */
|
||||
|
||||
/*
|
||||
* R3333 (0xD05) - Interrupt Status 6
|
||||
*/
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT1 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1 0x4000 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1_SHIFT 14 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT1_WIDTH 1 /* SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT1 0x2000 /* SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT1_MASK 0x2000 /* SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT1_SHIFT 13 /* SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT1_WIDTH 1 /* SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT1 0x1000 /* SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT1_MASK 0x1000 /* SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT1_SHIFT 12 /* SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT1_WIDTH 1 /* SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT1 0x0800 /* HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT1_MASK 0x0800 /* HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT1_SHIFT 11 /* HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT1_WIDTH 1 /* HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT1 0x0400 /* HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT1_MASK 0x0400 /* HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT1_SHIFT 10 /* HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT1_WIDTH 1 /* HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT1 0x0200 /* HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT1_MASK 0x0200 /* HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT1_SHIFT 9 /* HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT1_WIDTH 1 /* HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT1 0x0100 /* HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT1_MASK 0x0100 /* HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT1_SHIFT 8 /* HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT1_WIDTH 1 /* HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT1 0x0080 /* HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT1_MASK 0x0080 /* HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT1_SHIFT 7 /* HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT1_WIDTH 1 /* HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT1 0x0040 /* HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT1_MASK 0x0040 /* HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT1_SHIFT 6 /* HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT1_WIDTH 1 /* HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT1 0x0020 /* HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT1_MASK 0x0020 /* HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT1_SHIFT 5 /* HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT1_WIDTH 1 /* HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT1 0x0010 /* HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT1_MASK 0x0010 /* HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT1_SHIFT 4 /* HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT1_WIDTH 1 /* HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT1 0x0008 /* HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT1_MASK 0x0008 /* HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT1_SHIFT 3 /* HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT1_WIDTH 1 /* HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT1 0x0004 /* HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT1_MASK 0x0004 /* HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT1_SHIFT 2 /* HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT1_WIDTH 1 /* HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT1 0x0002 /* HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT1_MASK 0x0002 /* HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT1_SHIFT 1 /* HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT1_WIDTH 1 /* HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT1 0x0001 /* HP1L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT1_MASK 0x0001 /* HP1L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT1_SHIFT 0 /* HP1L_SC_POS_EINT1 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT1_WIDTH 1 /* HP1L_SC_POS_EINT1 */
|
||||
|
||||
/*
|
||||
* R3336 (0xD08) - Interrupt Status 1 Mask
|
||||
*/
|
||||
|
|
@ -4859,14 +5014,14 @@
|
|||
/*
|
||||
* R3338 (0xD0A) - Interrupt Status 3 Mask
|
||||
*/
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_MASK 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_SHIFT 15 /* IM_SPK_OVERHEAT_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT1 0x4000 /* IM_SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT1_MASK 0x4000 /* IM_SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT1_SHIFT 14 /* IM_SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT1_WIDTH 1 /* IM_SPK_OVERHEAT_EINT1 */
|
||||
#define ARIZONA_IM_HPDET_EINT1 0x2000 /* IM_HPDET_EINT1 */
|
||||
#define ARIZONA_IM_HPDET_EINT1_MASK 0x2000 /* IM_HPDET_EINT1 */
|
||||
#define ARIZONA_IM_HPDET_EINT1_SHIFT 13 /* IM_HPDET_EINT1 */
|
||||
|
|
@ -4963,6 +5118,77 @@
|
|||
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT1 0x0020 /* IM_HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT1_MASK 0x0020 /* IM_HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT1_SHIFT 5 /* IM_HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT1_WIDTH 1 /* IM_HP3R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT1 0x0010 /* IM_HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT1_MASK 0x0010 /* IM_HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT1_SHIFT 4 /* IM_HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT1_WIDTH 1 /* IM_HP3L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT1 0x0008 /* IM_HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT1_MASK 0x0008 /* IM_HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT1_SHIFT 3 /* IM_HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT1_WIDTH 1 /* IM_HP2R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT1 0x0004 /* IM_HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT1_MASK 0x0004 /* IM_HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT1_SHIFT 2 /* IM_HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT1_WIDTH 1 /* IM_HP2L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT1 0x0002 /* IM_HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT1_MASK 0x0002 /* IM_HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT1_SHIFT 1 /* IM_HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT1_WIDTH 1 /* IM_HP1R_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT1 0x0001 /* IM_HP1L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT1_MASK 0x0001 /* IM_HP1L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT1_SHIFT 0 /* IM_HP1L_DONE_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT1_WIDTH 1 /* IM_HP1L_DONE_EINT1 */
|
||||
|
||||
/*
|
||||
* R3339 (0xD0B) - Interrupt Status 4 Mask (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT1 0x8000 /* IM_AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT1_MASK 0x8000 /* IM_AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT1_SHIFT 15 /* IM_AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT1_WIDTH 1 /* IM_AIF3_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT1 0x4000 /* IM_AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT1_MASK 0x4000 /* IM_AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT1_SHIFT 14 /* IM_AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT1_WIDTH 1 /* IM_AIF2_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT1 0x2000 /* IM_AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT1_MASK 0x2000 /* IM_AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT1_SHIFT 13 /* IM_AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT1_WIDTH 1 /* IM_AIF1_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1 0x1000 /* IM_CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_MASK 0x1000 /* IM_CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_SHIFT 12 /* IM_CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT1_WIDTH 1 /* IM_CTRLIF_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_MASK 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_SHIFT 11 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT1_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT1 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_MASK 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_SHIFT 10 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT1_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1 0x0200 /* IM_SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_MASK 0x0200 /* IM_SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_SHIFT 9 /* IM_SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT1_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1 0x0100 /* IM_ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_MASK 0x0100 /* IM_ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_SHIFT 8 /* IM_ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1 0x0080 /* IM_ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_MASK 0x0080 /* IM_ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_SHIFT 7 /* IM_ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1 0x0040 /* IM_ISRC3_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_MASK 0x0040 /* IM_ISRC3_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_SHIFT 6 /* IM_ISRC3_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT1_WIDTH 1 /* IM_ISRC3_CFG_ERR_EINT1 */
|
||||
|
||||
/*
|
||||
* R3340 (0xD0C) - Interrupt Status 5 Mask
|
||||
|
|
@ -4988,6 +5214,85 @@
|
|||
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT1 */
|
||||
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT1_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT1 */
|
||||
|
||||
/*
|
||||
* R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1 0x0008 /* IM_ASRC_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_MASK 0x0008 /* IM_ASRC_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_SHIFT 3 /* IM_ASRC_CFG_ERR_EINT1 */
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT1_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT1 */
|
||||
|
||||
/*
|
||||
* R3341 (0xD0D) - Interrupt Status 6 Mask
|
||||
*/
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT1_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT1_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT1 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT1 0x2000 /* IM_SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT1_MASK 0x2000 /* IM_SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT1_SHIFT 13 /* IM_SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT1_WIDTH 1 /* IM_SPK1R_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT1 0x1000 /* IM_SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT1_MASK 0x1000 /* IM_SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT1_SHIFT 12 /* IM_SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT1_WIDTH 1 /* IM_SPK1L_SHORT_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT1 0x0800 /* IM_HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT1_MASK 0x0800 /* IM_HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT1_SHIFT 11 /* IM_HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT1_WIDTH 1 /* IM_HP3R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT1 0x0400 /* IM_HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT1_MASK 0x0400 /* IM_HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT1_SHIFT 10 /* IM_HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT1_WIDTH 1 /* IM_HP3R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT1 0x0200 /* IM_HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT1_MASK 0x0200 /* IM_HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT1_SHIFT 9 /* IM_HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT1_WIDTH 1 /* IM_HP3L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT1 0x0100 /* IM_HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT1_MASK 0x0100 /* IM_HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT1_SHIFT 8 /* IM_HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT1_WIDTH 1 /* IM_HP3L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT1 0x0080 /* IM_HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT1_MASK 0x0080 /* IM_HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT1_SHIFT 7 /* IM_HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT1_WIDTH 1 /* IM_HP2R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT1 0x0040 /* IM_HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT1_MASK 0x0040 /* IM_HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT1_SHIFT 6 /* IM_HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT1_WIDTH 1 /* IM_HP2R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT1 0x0020 /* IM_HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT1_MASK 0x0020 /* IM_HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT1_SHIFT 5 /* IM_HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT1_WIDTH 1 /* IM_HP2L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT1 0x0010 /* IM_HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT1_MASK 0x0010 /* IM_HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT1_SHIFT 4 /* IM_HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT1_WIDTH 1 /* IM_HP2L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT1 0x0008 /* IM_HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT1_MASK 0x0008 /* IM_HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT1_SHIFT 3 /* IM_HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT1_WIDTH 1 /* IM_HP1R_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT1 0x0004 /* IM_HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT1_MASK 0x0004 /* IM_HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT1_SHIFT 2 /* IM_HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT1_WIDTH 1 /* IM_HP1R_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT1 0x0002 /* IM_HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT1_MASK 0x0002 /* IM_HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT1_SHIFT 1 /* IM_HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT1_WIDTH 1 /* IM_HP1L_SC_NEG_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT1 0x0001 /* IM_HP1L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT1_MASK 0x0001 /* IM_HP1L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT1_SHIFT 0 /* IM_HP1L_SC_POS_EINT1 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT1_WIDTH 1 /* IM_HP1L_SC_POS_EINT1 */
|
||||
|
||||
/*
|
||||
* R3343 (0xD0F) - Interrupt Control
|
||||
*/
|
||||
|
|
@ -5035,14 +5340,14 @@
|
|||
/*
|
||||
* R3346 (0xD12) - IRQ2 Status 3
|
||||
*/
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2 0x4000 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT 14 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT2 0x8000 /* SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT2_MASK 0x8000 /* SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT2_SHIFT 15 /* SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT2 0x4000 /* SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT2_MASK 0x4000 /* SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT2_SHIFT 14 /* SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_SPK_OVERHEAT_EINT2_WIDTH 1 /* SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_HPDET_EINT2 0x2000 /* HPDET_EINT2 */
|
||||
#define ARIZONA_HPDET_EINT2_MASK 0x2000 /* HPDET_EINT2 */
|
||||
#define ARIZONA_HPDET_EINT2_SHIFT 13 /* HPDET_EINT2 */
|
||||
|
|
@ -5139,6 +5444,77 @@
|
|||
#define ARIZONA_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_HP3R_DONE_EINT2 0x0020 /* HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_HP3R_DONE_EINT2_MASK 0x0020 /* HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_HP3R_DONE_EINT2_SHIFT 5 /* HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_HP3R_DONE_EINT2_WIDTH 1 /* HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_HP3L_DONE_EINT2 0x0010 /* HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_HP3L_DONE_EINT2_MASK 0x0010 /* HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_HP3L_DONE_EINT2_SHIFT 4 /* HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_HP3L_DONE_EINT2_WIDTH 1 /* HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_HP2R_DONE_EINT2 0x0008 /* HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_HP2R_DONE_EINT2_MASK 0x0008 /* HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_HP2R_DONE_EINT2_SHIFT 3 /* HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_HP2R_DONE_EINT2_WIDTH 1 /* HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_HP2L_DONE_EINT2 0x0004 /* HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_HP2L_DONE_EINT2_MASK 0x0004 /* HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_HP2L_DONE_EINT2_SHIFT 2 /* HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_HP2L_DONE_EINT2_WIDTH 1 /* HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_HP1R_DONE_EINT2 0x0002 /* HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_HP1R_DONE_EINT2_MASK 0x0002 /* HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_HP1R_DONE_EINT2_SHIFT 1 /* HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_HP1R_DONE_EINT2_WIDTH 1 /* HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_HP1L_DONE_EINT2 0x0001 /* HP1L_DONE_EINT2 */
|
||||
#define ARIZONA_HP1L_DONE_EINT2_MASK 0x0001 /* HP1L_DONE_EINT2 */
|
||||
#define ARIZONA_HP1L_DONE_EINT2_SHIFT 0 /* HP1L_DONE_EINT2 */
|
||||
#define ARIZONA_HP1L_DONE_EINT2_WIDTH 1 /* HP1L_DONE_EINT2 */
|
||||
|
||||
/*
|
||||
* R3347 (0xD13) - IRQ2 Status 4 (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT2 0x8000 /* AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT2_MASK 0x8000 /* AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT2_SHIFT 15 /* AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF3_ERR_EINT2_WIDTH 1 /* AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT2 0x4000 /* AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT2_MASK 0x4000 /* AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT2_SHIFT 14 /* AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF2_ERR_EINT2_WIDTH 1 /* AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT2 0x2000 /* AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT2_MASK 0x2000 /* AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT2_SHIFT 13 /* AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_AIF1_ERR_EINT2_WIDTH 1 /* AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT2 0x1000 /* CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT2_MASK 0x1000 /* CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT2_SHIFT 12 /* CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_CTRLIF_ERR_EINT2_WIDTH 1 /* CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 11 /* MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 10 /* ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2 0x0200 /* SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_SHIFT 9 /* SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2 0x0100 /* ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_SHIFT 8 /* ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2 0x0080 /* ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_SHIFT 7 /* ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2 0x0040 /* ISRC3_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* ISRC3_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_SHIFT 6 /* ISRC3_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ISRC3_CFG_ERR_EINT2_WIDTH 1 /* ISRC3_CFG_ERR_EINT2 */
|
||||
|
||||
/*
|
||||
* R3348 (0xD14) - IRQ2 Status 5
|
||||
|
|
@ -5164,6 +5540,85 @@
|
|||
#define ARIZONA_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* FLL1_CLOCK_OK_EINT2 */
|
||||
#define ARIZONA_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* FLL1_CLOCK_OK_EINT2 */
|
||||
|
||||
/*
|
||||
* R3348 (0xD14) - IRQ2 Status 5 (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT2 0x0008 /* ASRC_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT2_MASK 0x0008 /* ASRC_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT2_SHIFT 3 /* ASRC_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_ASRC_CFG_ERR_EINT2_WIDTH 1 /* ASRC_CFG_ERR_EINT2 */
|
||||
|
||||
/*
|
||||
* R3349 (0xD15) - IRQ2 Status 6
|
||||
*/
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT2 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2 0x4000 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2_SHIFT 14 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK_SHUTDOWN_EINT2_WIDTH 1 /* SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT2 0x2000 /* SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT2_MASK 0x2000 /* SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT2_SHIFT 13 /* SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_SPK1R_SHORT_EINT2_WIDTH 1 /* SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT2 0x1000 /* SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT2_MASK 0x1000 /* SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT2_SHIFT 12 /* SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_SPK1L_SHORT_EINT2_WIDTH 1 /* SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT2 0x0800 /* HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT2_MASK 0x0800 /* HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT2_SHIFT 11 /* HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_NEG_EINT2_WIDTH 1 /* HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT2 0x0400 /* HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT2_MASK 0x0400 /* HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT2_SHIFT 10 /* HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP3R_SC_POS_EINT2_WIDTH 1 /* HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT2 0x0200 /* HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT2_MASK 0x0200 /* HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT2_SHIFT 9 /* HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_NEG_EINT2_WIDTH 1 /* HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT2 0x0100 /* HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT2_MASK 0x0100 /* HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT2_SHIFT 8 /* HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP3L_SC_POS_EINT2_WIDTH 1 /* HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT2 0x0080 /* HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT2_MASK 0x0080 /* HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT2_SHIFT 7 /* HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_NEG_EINT2_WIDTH 1 /* HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT2 0x0040 /* HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT2_MASK 0x0040 /* HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT2_SHIFT 6 /* HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2R_SC_POS_EINT2_WIDTH 1 /* HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT2 0x0020 /* HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT2_MASK 0x0020 /* HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT2_SHIFT 5 /* HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_NEG_EINT2_WIDTH 1 /* HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT2 0x0010 /* HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT2_MASK 0x0010 /* HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT2_SHIFT 4 /* HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP2L_SC_POS_EINT2_WIDTH 1 /* HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT2 0x0008 /* HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT2_MASK 0x0008 /* HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT2_SHIFT 3 /* HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_NEG_EINT2_WIDTH 1 /* HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT2 0x0004 /* HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT2_MASK 0x0004 /* HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT2_SHIFT 2 /* HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1R_SC_POS_EINT2_WIDTH 1 /* HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT2 0x0002 /* HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT2_MASK 0x0002 /* HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT2_SHIFT 1 /* HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_NEG_EINT2_WIDTH 1 /* HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT2 0x0001 /* HP1L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT2_MASK 0x0001 /* HP1L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT2_SHIFT 0 /* HP1L_SC_POS_EINT2 */
|
||||
#define ARIZONA_HP1L_SC_POS_EINT2_WIDTH 1 /* HP1L_SC_POS_EINT2 */
|
||||
|
||||
/*
|
||||
* R3352 (0xD18) - IRQ2 Status 1 Mask
|
||||
*/
|
||||
|
|
@ -5203,14 +5658,14 @@
|
|||
/*
|
||||
* R3354 (0xD1A) - IRQ2 Status 3 Mask
|
||||
*/
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_MASK 0x8000 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_SHIFT 15 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_WARN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_MASK 0x8000 /* IM_SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_SHIFT 15 /* IM_SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_WARN_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_WARN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT2 0x4000 /* IM_SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT2_MASK 0x4000 /* IM_SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT2_SHIFT 14 /* IM_SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_IM_SPK_OVERHEAT_EINT2_WIDTH 1 /* IM_SPK_OVERHEAT_EINT2 */
|
||||
#define ARIZONA_IM_HPDET_EINT2 0x2000 /* IM_HPDET_EINT2 */
|
||||
#define ARIZONA_IM_HPDET_EINT2_MASK 0x2000 /* IM_HPDET_EINT2 */
|
||||
#define ARIZONA_IM_HPDET_EINT2_SHIFT 13 /* IM_HPDET_EINT2 */
|
||||
|
|
@ -5307,6 +5762,77 @@
|
|||
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT2 0x0020 /* IM_HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT2_MASK 0x0020 /* IM_HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT2_SHIFT 5 /* IM_HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_DONE_EINT2_WIDTH 1 /* IM_HP3R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT2 0x0010 /* IM_HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT2_MASK 0x0010 /* IM_HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT2_SHIFT 4 /* IM_HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_DONE_EINT2_WIDTH 1 /* IM_HP3L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT2 0x0008 /* IM_HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT2_MASK 0x0008 /* IM_HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT2_SHIFT 3 /* IM_HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_DONE_EINT2_WIDTH 1 /* IM_HP2R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT2 0x0004 /* IM_HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT2_MASK 0x0004 /* IM_HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT2_SHIFT 2 /* IM_HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_DONE_EINT2_WIDTH 1 /* IM_HP2L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT2 0x0002 /* IM_HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT2_MASK 0x0002 /* IM_HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT2_SHIFT 1 /* IM_HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_DONE_EINT2_WIDTH 1 /* IM_HP1R_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT2 0x0001 /* IM_HP1L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT2_MASK 0x0001 /* IM_HP1L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT2_SHIFT 0 /* IM_HP1L_DONE_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_DONE_EINT2_WIDTH 1 /* IM_HP1L_DONE_EINT2 */
|
||||
|
||||
/*
|
||||
* R3355 (0xD1B) - IRQ2 Status 4 Mask (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT2 0x8000 /* IM_AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT2_MASK 0x8000 /* IM_AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT2_SHIFT 15 /* IM_AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF3_ERR_EINT2_WIDTH 1 /* IM_AIF3_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT2 0x4000 /* IM_AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT2_MASK 0x4000 /* IM_AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT2_SHIFT 14 /* IM_AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF2_ERR_EINT2_WIDTH 1 /* IM_AIF2_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT2 0x2000 /* IM_AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT2_MASK 0x2000 /* IM_AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT2_SHIFT 13 /* IM_AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_AIF1_ERR_EINT2_WIDTH 1 /* IM_AIF1_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2 0x1000 /* IM_CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_MASK 0x1000 /* IM_CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_SHIFT 12 /* IM_CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_CTRLIF_ERR_EINT2_WIDTH 1 /* IM_CTRLIF_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_MASK 0x0800 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_SHIFT 11 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_IM_MIXER_DROPPED_SAMPLE_EINT2_WIDTH 1 /* IM_MIXER_DROPPED_SAMPLE_EINT2 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_MASK 0x0400 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_SHIFT 10 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_ASYNC_CLK_ENA_LOW_EINT2_WIDTH 1 /* IM_ASYNC_CLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2 0x0200 /* IM_SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_MASK 0x0200 /* IM_SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_SHIFT 9 /* IM_SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_SYSCLK_ENA_LOW_EINT2_WIDTH 1 /* IM_SYSCLK_ENA_LOW_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2 0x0100 /* IM_ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_MASK 0x0100 /* IM_ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_SHIFT 8 /* IM_ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC1_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC1_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2 0x0080 /* IM_ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_MASK 0x0080 /* IM_ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_SHIFT 7 /* IM_ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC2_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC2_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2 0x0040 /* IM_ISRC3_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_MASK 0x0040 /* IM_ISRC3_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_SHIFT 6 /* IM_ISRC3_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ISRC3_CFG_ERR_EINT2_WIDTH 1 /* IM_ISRC3_CFG_ERR_EINT2 */
|
||||
|
||||
/*
|
||||
* R3356 (0xD1C) - IRQ2 Status 5 Mask
|
||||
|
|
@ -5333,6 +5859,85 @@
|
|||
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_SHIFT 0 /* IM_FLL1_CLOCK_OK_EINT2 */
|
||||
#define ARIZONA_IM_FLL1_CLOCK_OK_EINT2_WIDTH 1 /* IM_FLL1_CLOCK_OK_EINT2 */
|
||||
|
||||
/*
|
||||
* R3340 (0xD0C) - Interrupt Status 5 Mask (Alternate layout)
|
||||
*
|
||||
* Alternate layout used on later devices, note only fields that have moved
|
||||
* are specified
|
||||
*/
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2 0x0008 /* IM_ASRC_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_MASK 0x0008 /* IM_ASRC_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_SHIFT 3 /* IM_ASRC_CFG_ERR_EINT2 */
|
||||
#define ARIZONA_V2_IM_ASRC_CFG_ERR_EINT2_WIDTH 1 /* IM_ASRC_CFG_ERR_EINT2 */
|
||||
|
||||
/*
|
||||
* R3357 (0xD1D) - IRQ2 Status 6 Mask
|
||||
*/
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_MASK 0x8000 /* IM_DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_SHIFT 15 /* IM_DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_IM_DSP_SHARED_WR_COLL_EINT2_WIDTH 1 /* IM_DSP_SHARED_WR_COLL_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_MASK 0x4000 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_SHIFT 14 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK_SHUTDOWN_EINT2_WIDTH 1 /* IM_SPK_SHUTDOWN_EINT2 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT2 0x2000 /* IM_SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT2_MASK 0x2000 /* IM_SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT2_SHIFT 13 /* IM_SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_SPK1R_SHORT_EINT2_WIDTH 1 /* IM_SPK1R_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT2 0x1000 /* IM_SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT2_MASK 0x1000 /* IM_SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT2_SHIFT 12 /* IM_SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_SPK1L_SHORT_EINT2_WIDTH 1 /* IM_SPK1L_SHORT_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT2 0x0800 /* IM_HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT2_MASK 0x0800 /* IM_HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT2_SHIFT 11 /* IM_HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_NEG_EINT2_WIDTH 1 /* IM_HP3R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT2 0x0400 /* IM_HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT2_MASK 0x0400 /* IM_HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT2_SHIFT 10 /* IM_HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP3R_SC_POS_EINT2_WIDTH 1 /* IM_HP3R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT2 0x0200 /* IM_HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT2_MASK 0x0200 /* IM_HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT2_SHIFT 9 /* IM_HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_NEG_EINT2_WIDTH 1 /* IM_HP3L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT2 0x0100 /* IM_HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT2_MASK 0x0100 /* IM_HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT2_SHIFT 8 /* IM_HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP3L_SC_POS_EINT2_WIDTH 1 /* IM_HP3L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT2 0x0080 /* IM_HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT2_MASK 0x0080 /* IM_HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT2_SHIFT 7 /* IM_HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_NEG_EINT2_WIDTH 1 /* IM_HP2R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT2 0x0040 /* IM_HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT2_MASK 0x0040 /* IM_HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT2_SHIFT 6 /* IM_HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2R_SC_POS_EINT2_WIDTH 1 /* IM_HP2R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT2 0x0020 /* IM_HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT2_MASK 0x0020 /* IM_HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT2_SHIFT 5 /* IM_HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_NEG_EINT2_WIDTH 1 /* IM_HP2L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT2 0x0010 /* IM_HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT2_MASK 0x0010 /* IM_HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT2_SHIFT 4 /* IM_HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP2L_SC_POS_EINT2_WIDTH 1 /* IM_HP2L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT2 0x0008 /* IM_HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT2_MASK 0x0008 /* IM_HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT2_SHIFT 3 /* IM_HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_NEG_EINT2_WIDTH 1 /* IM_HP1R_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT2 0x0004 /* IM_HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT2_MASK 0x0004 /* IM_HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT2_SHIFT 2 /* IM_HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1R_SC_POS_EINT2_WIDTH 1 /* IM_HP1R_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT2 0x0002 /* IM_HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT2_MASK 0x0002 /* IM_HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT2_SHIFT 1 /* IM_HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_NEG_EINT2_WIDTH 1 /* IM_HP1L_SC_NEG_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT2 0x0001 /* IM_HP1L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT2_MASK 0x0001 /* IM_HP1L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT2_SHIFT 0 /* IM_HP1L_SC_POS_EINT2 */
|
||||
#define ARIZONA_IM_HP1L_SC_POS_EINT2_WIDTH 1 /* IM_HP1L_SC_POS_EINT2 */
|
||||
|
||||
/*
|
||||
* R3359 (0xD1F) - IRQ2 Control
|
||||
*/
|
||||
|
|
@ -5360,14 +5965,14 @@
|
|||
/*
|
||||
* R3361 (0xD21) - Interrupt Raw Status 3
|
||||
*/
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_STS 0x8000 /* SPK_SHUTDOWN_WARN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_STS_MASK 0x8000 /* SPK_SHUTDOWN_WARN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_STS_SHIFT 15 /* SPK_SHUTDOWN_WARN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_WARN_STS_WIDTH 1 /* SPK_SHUTDOWN_WARN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS_SHIFT 14 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS_WIDTH 1 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_STS 0x8000 /* SPK_OVERHEAT_WARN_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_STS_MASK 0x8000 /* SPK_OVERHEAT_WARN_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_STS_SHIFT 15 /* SPK_OVERHEAT_WARN_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_WARN_STS_WIDTH 1 /* SPK_OVERHEAT_WARN_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_STS 0x4000 /* SPK_OVERHEAT_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_STS_MASK 0x4000 /* SPK_OVERHEAT_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_STS_SHIFT 14 /* SPK_OVERHEAT_STS */
|
||||
#define ARIZONA_SPK_OVERHEAT_STS_WIDTH 1 /* SPK_OVERHEAT_STS */
|
||||
#define ARIZONA_HPDET_STS 0x2000 /* HPDET_STS */
|
||||
#define ARIZONA_HPDET_STS_MASK 0x2000 /* HPDET_STS */
|
||||
#define ARIZONA_HPDET_STS_SHIFT 13 /* HPDET_STS */
|
||||
|
|
@ -5464,6 +6069,30 @@
|
|||
#define ARIZONA_ISRC2_CFG_ERR_STS_MASK 0x0040 /* ISRC2_CFG_ERR_STS */
|
||||
#define ARIZONA_ISRC2_CFG_ERR_STS_SHIFT 6 /* ISRC2_CFG_ERR_STS */
|
||||
#define ARIZONA_ISRC2_CFG_ERR_STS_WIDTH 1 /* ISRC2_CFG_ERR_STS */
|
||||
#define ARIZONA_HP3R_DONE_STS 0x0020 /* HP3R_DONE_STS */
|
||||
#define ARIZONA_HP3R_DONE_STS_MASK 0x0020 /* HP3R_DONE_STS */
|
||||
#define ARIZONA_HP3R_DONE_STS_SHIFT 5 /* HP3R_DONE_STS */
|
||||
#define ARIZONA_HP3R_DONE_STS_WIDTH 1 /* HP3R_DONE_STS */
|
||||
#define ARIZONA_HP3L_DONE_STS 0x0010 /* HP3L_DONE_STS */
|
||||
#define ARIZONA_HP3L_DONE_STS_MASK 0x0010 /* HP3L_DONE_STS */
|
||||
#define ARIZONA_HP3L_DONE_STS_SHIFT 4 /* HP3L_DONE_STS */
|
||||
#define ARIZONA_HP3L_DONE_STS_WIDTH 1 /* HP3L_DONE_STS */
|
||||
#define ARIZONA_HP2R_DONE_STS 0x0008 /* HP2R_DONE_STS */
|
||||
#define ARIZONA_HP2R_DONE_STS_MASK 0x0008 /* HP2R_DONE_STS */
|
||||
#define ARIZONA_HP2R_DONE_STS_SHIFT 3 /* HP2R_DONE_STS */
|
||||
#define ARIZONA_HP2R_DONE_STS_WIDTH 1 /* HP2R_DONE_STS */
|
||||
#define ARIZONA_HP2L_DONE_STS 0x0004 /* HP2L_DONE_STS */
|
||||
#define ARIZONA_HP2L_DONE_STS_MASK 0x0004 /* HP2L_DONE_STS */
|
||||
#define ARIZONA_HP2L_DONE_STS_SHIFT 2 /* HP2L_DONE_STS */
|
||||
#define ARIZONA_HP2L_DONE_STS_WIDTH 1 /* HP2L_DONE_STS */
|
||||
#define ARIZONA_HP1R_DONE_STS 0x0002 /* HP1R_DONE_STS */
|
||||
#define ARIZONA_HP1R_DONE_STS_MASK 0x0002 /* HP1R_DONE_STS */
|
||||
#define ARIZONA_HP1R_DONE_STS_SHIFT 1 /* HP1R_DONE_STS */
|
||||
#define ARIZONA_HP1R_DONE_STS_WIDTH 1 /* HP1R_DONE_STS */
|
||||
#define ARIZONA_HP1L_DONE_STS 0x0001 /* HP1L_DONE_STS */
|
||||
#define ARIZONA_HP1L_DONE_STS_MASK 0x0001 /* HP1L_DONE_STS */
|
||||
#define ARIZONA_HP1L_DONE_STS_SHIFT 0 /* HP1L_DONE_STS */
|
||||
#define ARIZONA_HP1L_DONE_STS_WIDTH 1 /* HP1L_DONE_STS */
|
||||
|
||||
/*
|
||||
* R3363 (0xD23) - Interrupt Raw Status 5
|
||||
|
|
@ -5580,6 +6209,10 @@
|
|||
#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_MASK 0x0008 /* ADSP2_1_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_SHIFT 3 /* ADSP2_1_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ADSP2_1_OVERCLOCKED_STS_WIDTH 1 /* ADSP2_1_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_OVERCLOCKED_STS 0x0004 /* ISRC3_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_OVERCLOCKED_STS_MASK 0x0004 /* ISRC3_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_OVERCLOCKED_STS_SHIFT 2 /* ISRC3_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_OVERCLOCKED_STS_WIDTH 1 /* ISRC3_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC2_OVERCLOCKED_STS 0x0002 /* ISRC2_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC2_OVERCLOCKED_STS_MASK 0x0002 /* ISRC2_OVERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC2_OVERCLOCKED_STS_SHIFT 1 /* ISRC2_OVERCLOCKED_STS */
|
||||
|
|
@ -5604,6 +6237,10 @@
|
|||
#define ARIZONA_AIF1_UNDERCLOCKED_STS_MASK 0x0100 /* AIF1_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_AIF1_UNDERCLOCKED_STS_SHIFT 8 /* AIF1_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_AIF1_UNDERCLOCKED_STS_WIDTH 1 /* AIF1_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_UNDERCLOCKED_STS 0x0080 /* ISRC3_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_UNDERCLOCKED_STS_MASK 0x0080 /* ISRC3_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_UNDERCLOCKED_STS_SHIFT 7 /* ISRC3_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC3_UNDERCLOCKED_STS_WIDTH 1 /* ISRC3_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC2_UNDERCLOCKED_STS 0x0040 /* ISRC2_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC2_UNDERCLOCKED_STS_MASK 0x0040 /* ISRC2_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_ISRC2_UNDERCLOCKED_STS_SHIFT 6 /* ISRC2_UNDERCLOCKED_STS */
|
||||
|
|
@ -5633,6 +6270,74 @@
|
|||
#define ARIZONA_MIXER_UNDERCLOCKED_STS_SHIFT 0 /* MIXER_UNDERCLOCKED_STS */
|
||||
#define ARIZONA_MIXER_UNDERCLOCKED_STS_WIDTH 1 /* MIXER_UNDERCLOCKED_STS */
|
||||
|
||||
/*
|
||||
* R3368 (0xD28) - Interrupt Raw Status 9
|
||||
*/
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_STS 0x8000 /* DSP_SHARED_WR_COLL_STS */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_STS_MASK 0x8000 /* DSP_SHARED_WR_COLL_STS */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_STS_SHIFT 15 /* DSP_SHARED_WR_COLL_STS */
|
||||
#define ARIZONA_DSP_SHARED_WR_COLL_STS_WIDTH 1 /* DSP_SHARED_WR_COLL_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS 0x4000 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS_MASK 0x4000 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS_SHIFT 14 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK_SHUTDOWN_STS_WIDTH 1 /* SPK_SHUTDOWN_STS */
|
||||
#define ARIZONA_SPK1R_SHORT_STS 0x2000 /* SPK1R_SHORT_STS */
|
||||
#define ARIZONA_SPK1R_SHORT_STS_MASK 0x2000 /* SPK1R_SHORT_STS */
|
||||
#define ARIZONA_SPK1R_SHORT_STS_SHIFT 13 /* SPK1R_SHORT_STS */
|
||||
#define ARIZONA_SPK1R_SHORT_STS_WIDTH 1 /* SPK1R_SHORT_STS */
|
||||
#define ARIZONA_SPK1L_SHORT_STS 0x1000 /* SPK1L_SHORT_STS */
|
||||
#define ARIZONA_SPK1L_SHORT_STS_MASK 0x1000 /* SPK1L_SHORT_STS */
|
||||
#define ARIZONA_SPK1L_SHORT_STS_SHIFT 12 /* SPK1L_SHORT_STS */
|
||||
#define ARIZONA_SPK1L_SHORT_STS_WIDTH 1 /* SPK1L_SHORT_STS */
|
||||
#define ARIZONA_HP3R_SC_NEG_STS 0x0800 /* HP3R_SC_NEG_STS */
|
||||
#define ARIZONA_HP3R_SC_NEG_STS_MASK 0x0800 /* HP3R_SC_NEG_STS */
|
||||
#define ARIZONA_HP3R_SC_NEG_STS_SHIFT 11 /* HP3R_SC_NEG_STS */
|
||||
#define ARIZONA_HP3R_SC_NEG_STS_WIDTH 1 /* HP3R_SC_NEG_STS */
|
||||
#define ARIZONA_HP3R_SC_POS_STS 0x0400 /* HP3R_SC_POS_STS */
|
||||
#define ARIZONA_HP3R_SC_POS_STS_MASK 0x0400 /* HP3R_SC_POS_STS */
|
||||
#define ARIZONA_HP3R_SC_POS_STS_SHIFT 10 /* HP3R_SC_POS_STS */
|
||||
#define ARIZONA_HP3R_SC_POS_STS_WIDTH 1 /* HP3R_SC_POS_STS */
|
||||
#define ARIZONA_HP3L_SC_NEG_STS 0x0200 /* HP3L_SC_NEG_STS */
|
||||
#define ARIZONA_HP3L_SC_NEG_STS_MASK 0x0200 /* HP3L_SC_NEG_STS */
|
||||
#define ARIZONA_HP3L_SC_NEG_STS_SHIFT 9 /* HP3L_SC_NEG_STS */
|
||||
#define ARIZONA_HP3L_SC_NEG_STS_WIDTH 1 /* HP3L_SC_NEG_STS */
|
||||
#define ARIZONA_HP3L_SC_POS_STS 0x0100 /* HP3L_SC_POS_STS */
|
||||
#define ARIZONA_HP3L_SC_POS_STS_MASK 0x0100 /* HP3L_SC_POS_STS */
|
||||
#define ARIZONA_HP3L_SC_POS_STS_SHIFT 8 /* HP3L_SC_POS_STS */
|
||||
#define ARIZONA_HP3L_SC_POS_STS_WIDTH 1 /* HP3L_SC_POS_STS */
|
||||
#define ARIZONA_HP2R_SC_NEG_STS 0x0080 /* HP2R_SC_NEG_STS */
|
||||
#define ARIZONA_HP2R_SC_NEG_STS_MASK 0x0080 /* HP2R_SC_NEG_STS */
|
||||
#define ARIZONA_HP2R_SC_NEG_STS_SHIFT 7 /* HP2R_SC_NEG_STS */
|
||||
#define ARIZONA_HP2R_SC_NEG_STS_WIDTH 1 /* HP2R_SC_NEG_STS */
|
||||
#define ARIZONA_HP2R_SC_POS_STS 0x0040 /* HP2R_SC_POS_STS */
|
||||
#define ARIZONA_HP2R_SC_POS_STS_MASK 0x0040 /* HP2R_SC_POS_STS */
|
||||
#define ARIZONA_HP2R_SC_POS_STS_SHIFT 6 /* HP2R_SC_POS_STS */
|
||||
#define ARIZONA_HP2R_SC_POS_STS_WIDTH 1 /* HP2R_SC_POS_STS */
|
||||
#define ARIZONA_HP2L_SC_NEG_STS 0x0020 /* HP2L_SC_NEG_STS */
|
||||
#define ARIZONA_HP2L_SC_NEG_STS_MASK 0x0020 /* HP2L_SC_NEG_STS */
|
||||
#define ARIZONA_HP2L_SC_NEG_STS_SHIFT 5 /* HP2L_SC_NEG_STS */
|
||||
#define ARIZONA_HP2L_SC_NEG_STS_WIDTH 1 /* HP2L_SC_NEG_STS */
|
||||
#define ARIZONA_HP2L_SC_POS_STS 0x0010 /* HP2L_SC_POS_STS */
|
||||
#define ARIZONA_HP2L_SC_POS_STS_MASK 0x0010 /* HP2L_SC_POS_STS */
|
||||
#define ARIZONA_HP2L_SC_POS_STS_SHIFT 4 /* HP2L_SC_POS_STS */
|
||||
#define ARIZONA_HP2L_SC_POS_STS_WIDTH 1 /* HP2L_SC_POS_STS */
|
||||
#define ARIZONA_HP1R_SC_NEG_STS 0x0008 /* HP1R_SC_NEG_STS */
|
||||
#define ARIZONA_HP1R_SC_NEG_STS_MASK 0x0008 /* HP1R_SC_NEG_STS */
|
||||
#define ARIZONA_HP1R_SC_NEG_STS_SHIFT 3 /* HP1R_SC_NEG_STS */
|
||||
#define ARIZONA_HP1R_SC_NEG_STS_WIDTH 1 /* HP1R_SC_NEG_STS */
|
||||
#define ARIZONA_HP1R_SC_POS_STS 0x0004 /* HP1R_SC_POS_STS */
|
||||
#define ARIZONA_HP1R_SC_POS_STS_MASK 0x0004 /* HP1R_SC_POS_STS */
|
||||
#define ARIZONA_HP1R_SC_POS_STS_SHIFT 2 /* HP1R_SC_POS_STS */
|
||||
#define ARIZONA_HP1R_SC_POS_STS_WIDTH 1 /* HP1R_SC_POS_STS */
|
||||
#define ARIZONA_HP1L_SC_NEG_STS 0x0002 /* HP1L_SC_NEG_STS */
|
||||
#define ARIZONA_HP1L_SC_NEG_STS_MASK 0x0002 /* HP1L_SC_NEG_STS */
|
||||
#define ARIZONA_HP1L_SC_NEG_STS_SHIFT 1 /* HP1L_SC_NEG_STS */
|
||||
#define ARIZONA_HP1L_SC_NEG_STS_WIDTH 1 /* HP1L_SC_NEG_STS */
|
||||
#define ARIZONA_HP1L_SC_POS_STS 0x0001 /* HP1L_SC_POS_STS */
|
||||
#define ARIZONA_HP1L_SC_POS_STS_MASK 0x0001 /* HP1L_SC_POS_STS */
|
||||
#define ARIZONA_HP1L_SC_POS_STS_SHIFT 0 /* HP1L_SC_POS_STS */
|
||||
#define ARIZONA_HP1L_SC_POS_STS_WIDTH 1 /* HP1L_SC_POS_STS */
|
||||
|
||||
/*
|
||||
* R3392 (0xD40) - IRQ Pin Status
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -16,7 +16,9 @@
|
|||
#ifndef __LINUX_MFD_CROS_EC_H
|
||||
#define __LINUX_MFD_CROS_EC_H
|
||||
|
||||
#include <linux/notifier.h>
|
||||
#include <linux/mfd/cros_ec_commands.h>
|
||||
#include <linux/mutex.h>
|
||||
|
||||
/*
|
||||
* Command interface between EC and AP, for LPC, I2C and SPI interfaces.
|
||||
|
|
@ -33,83 +35,76 @@ enum {
|
|||
EC_MSG_TX_PROTO_BYTES,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct cros_ec_msg - A message sent to the EC, and its reply
|
||||
*
|
||||
/*
|
||||
* @version: Command version number (often 0)
|
||||
* @cmd: Command to send (EC_CMD_...)
|
||||
* @out_buf: Outgoing payload (to EC)
|
||||
* @outlen: Outgoing length
|
||||
* @in_buf: Incoming payload (from EC)
|
||||
* @in_len: Incoming length
|
||||
* @command: Command to send (EC_CMD_...)
|
||||
* @outdata: Outgoing data to EC
|
||||
* @outsize: Outgoing length in bytes
|
||||
* @indata: Where to put the incoming data from EC
|
||||
* @insize: Max number of bytes to accept from EC
|
||||
* @result: EC's response to the command (separate from communication failure)
|
||||
*/
|
||||
struct cros_ec_msg {
|
||||
u8 version;
|
||||
u8 cmd;
|
||||
uint8_t *out_buf;
|
||||
int out_len;
|
||||
uint8_t *in_buf;
|
||||
int in_len;
|
||||
struct cros_ec_command {
|
||||
uint32_t version;
|
||||
uint32_t command;
|
||||
uint8_t *outdata;
|
||||
uint32_t outsize;
|
||||
uint8_t *indata;
|
||||
uint32_t insize;
|
||||
uint32_t result;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct cros_ec_device - Information about a ChromeOS EC device
|
||||
*
|
||||
* @name: Name of this EC interface
|
||||
* @ec_name: name of EC device (e.g. 'chromeos-ec')
|
||||
* @phys_name: name of physical comms layer (e.g. 'i2c-4')
|
||||
* @dev: Device pointer
|
||||
* @was_wake_device: true if this device was set to wake the system from
|
||||
* sleep at the last suspend
|
||||
* @cmd_xfer: send command to EC and get response
|
||||
* Returns the number of bytes received if the communication succeeded, but
|
||||
* that doesn't mean the EC was happy with the command. The caller
|
||||
* should check msg.result for the EC's result code.
|
||||
*
|
||||
* @priv: Private data
|
||||
* @irq: Interrupt to use
|
||||
* @din: input buffer (from EC)
|
||||
* @dout: output buffer (to EC)
|
||||
* @din: input buffer (for data from EC)
|
||||
* @dout: output buffer (for data to EC)
|
||||
* \note
|
||||
* These two buffers will always be dword-aligned and include enough
|
||||
* space for up to 7 word-alignment bytes also, so we can ensure that
|
||||
* the body of the message is always dword-aligned (64-bit).
|
||||
*
|
||||
* We use this alignment to keep ARM and x86 happy. Probably word
|
||||
* alignment would be OK, there might be a small performance advantage
|
||||
* to using dword.
|
||||
* @din_size: size of din buffer
|
||||
* @dout_size: size of dout buffer
|
||||
* @command_send: send a command
|
||||
* @command_recv: receive a command
|
||||
* @ec_name: name of EC device (e.g. 'chromeos-ec')
|
||||
* @phys_name: name of physical comms layer (e.g. 'i2c-4')
|
||||
* @din_size: size of din buffer to allocate (zero to use static din)
|
||||
* @dout_size: size of dout buffer to allocate (zero to use static dout)
|
||||
* @parent: pointer to parent device (e.g. i2c or spi device)
|
||||
* @dev: Device pointer
|
||||
* dev_lock: Lock to prevent concurrent access
|
||||
* @wake_enabled: true if this device can wake the system from sleep
|
||||
* @was_wake_device: true if this device was set to wake the system from
|
||||
* sleep at the last suspend
|
||||
* @event_notifier: interrupt event notifier for transport devices
|
||||
* @lock: one transaction at a time
|
||||
*/
|
||||
struct cros_ec_device {
|
||||
const char *name;
|
||||
|
||||
/* These are used by other drivers that want to talk to the EC */
|
||||
const char *ec_name;
|
||||
const char *phys_name;
|
||||
struct device *dev;
|
||||
bool was_wake_device;
|
||||
struct class *cros_class;
|
||||
int (*cmd_xfer)(struct cros_ec_device *ec,
|
||||
struct cros_ec_command *msg);
|
||||
|
||||
/* These are used to implement the platform-specific interface */
|
||||
void *priv;
|
||||
int irq;
|
||||
uint8_t *din;
|
||||
uint8_t *dout;
|
||||
int din_size;
|
||||
int dout_size;
|
||||
int (*command_send)(struct cros_ec_device *ec,
|
||||
uint16_t cmd, void *out_buf, int out_len);
|
||||
int (*command_recv)(struct cros_ec_device *ec,
|
||||
uint16_t cmd, void *in_buf, int in_len);
|
||||
int (*command_sendrecv)(struct cros_ec_device *ec,
|
||||
uint16_t cmd, void *out_buf, int out_len,
|
||||
void *in_buf, int in_len);
|
||||
int (*command_xfer)(struct cros_ec_device *ec,
|
||||
struct cros_ec_msg *msg);
|
||||
|
||||
const char *ec_name;
|
||||
const char *phys_name;
|
||||
struct device *parent;
|
||||
|
||||
/* These are --private-- fields - do not assign */
|
||||
struct device *dev;
|
||||
struct mutex dev_lock;
|
||||
bool wake_enabled;
|
||||
bool was_wake_device;
|
||||
struct blocking_notifier_head event_notifier;
|
||||
struct mutex lock;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -143,13 +138,24 @@ int cros_ec_resume(struct cros_ec_device *ec_dev);
|
|||
* @msg: Message to write
|
||||
*/
|
||||
int cros_ec_prepare_tx(struct cros_ec_device *ec_dev,
|
||||
struct cros_ec_msg *msg);
|
||||
struct cros_ec_command *msg);
|
||||
|
||||
/**
|
||||
* cros_ec_check_result - Check ec_msg->result
|
||||
*
|
||||
* This is used by ChromeOS EC drivers to check the ec_msg->result for
|
||||
* errors and to warn about them.
|
||||
*
|
||||
* @ec_dev: EC device
|
||||
* @msg: Message to check
|
||||
*/
|
||||
int cros_ec_check_result(struct cros_ec_device *ec_dev,
|
||||
struct cros_ec_command *msg);
|
||||
|
||||
/**
|
||||
* cros_ec_remove - Remove a ChromeOS EC
|
||||
*
|
||||
* Call this to deregister a ChromeOS EC. After this you should call
|
||||
* cros_ec_free().
|
||||
* Call this to deregister a ChromeOS EC, then clean up any private data.
|
||||
*
|
||||
* @ec_dev: Device to register
|
||||
* @return 0 if ok, -ve on error
|
||||
|
|
|
|||
|
|
@ -34,7 +34,8 @@ enum da9063_models {
|
|||
};
|
||||
|
||||
enum da9063_variant_codes {
|
||||
PMIC_DA9063_BB = 0x5
|
||||
PMIC_DA9063_AD = 0x3,
|
||||
PMIC_DA9063_BB = 0x5,
|
||||
};
|
||||
|
||||
/* Interrupts */
|
||||
|
|
|
|||
|
|
@ -104,16 +104,27 @@
|
|||
#define DA9063_REG_COUNT_D 0x43
|
||||
#define DA9063_REG_COUNT_MO 0x44
|
||||
#define DA9063_REG_COUNT_Y 0x45
|
||||
#define DA9063_REG_ALARM_S 0x46
|
||||
#define DA9063_REG_ALARM_MI 0x47
|
||||
#define DA9063_REG_ALARM_H 0x48
|
||||
#define DA9063_REG_ALARM_D 0x49
|
||||
#define DA9063_REG_ALARM_MO 0x4A
|
||||
#define DA9063_REG_ALARM_Y 0x4B
|
||||
#define DA9063_REG_SECOND_A 0x4C
|
||||
#define DA9063_REG_SECOND_B 0x4D
|
||||
#define DA9063_REG_SECOND_C 0x4E
|
||||
#define DA9063_REG_SECOND_D 0x4F
|
||||
|
||||
#define DA9063_AD_REG_ALARM_MI 0x46
|
||||
#define DA9063_AD_REG_ALARM_H 0x47
|
||||
#define DA9063_AD_REG_ALARM_D 0x48
|
||||
#define DA9063_AD_REG_ALARM_MO 0x49
|
||||
#define DA9063_AD_REG_ALARM_Y 0x4A
|
||||
#define DA9063_AD_REG_SECOND_A 0x4B
|
||||
#define DA9063_AD_REG_SECOND_B 0x4C
|
||||
#define DA9063_AD_REG_SECOND_C 0x4D
|
||||
#define DA9063_AD_REG_SECOND_D 0x4E
|
||||
|
||||
#define DA9063_BB_REG_ALARM_S 0x46
|
||||
#define DA9063_BB_REG_ALARM_MI 0x47
|
||||
#define DA9063_BB_REG_ALARM_H 0x48
|
||||
#define DA9063_BB_REG_ALARM_D 0x49
|
||||
#define DA9063_BB_REG_ALARM_MO 0x4A
|
||||
#define DA9063_BB_REG_ALARM_Y 0x4B
|
||||
#define DA9063_BB_REG_SECOND_A 0x4C
|
||||
#define DA9063_BB_REG_SECOND_B 0x4D
|
||||
#define DA9063_BB_REG_SECOND_C 0x4E
|
||||
#define DA9063_BB_REG_SECOND_D 0x4F
|
||||
|
||||
/* Sequencer Control Registers */
|
||||
#define DA9063_REG_SEQ 0x81
|
||||
|
|
@ -223,37 +234,67 @@
|
|||
#define DA9063_REG_CONFIG_J 0x10F
|
||||
#define DA9063_REG_CONFIG_K 0x110
|
||||
#define DA9063_REG_CONFIG_L 0x111
|
||||
#define DA9063_REG_CONFIG_M 0x112
|
||||
#define DA9063_REG_CONFIG_N 0x113
|
||||
|
||||
#define DA9063_REG_MON_REG_1 0x114
|
||||
#define DA9063_REG_MON_REG_2 0x115
|
||||
#define DA9063_REG_MON_REG_3 0x116
|
||||
#define DA9063_REG_MON_REG_4 0x117
|
||||
#define DA9063_REG_MON_REG_5 0x11E
|
||||
#define DA9063_REG_MON_REG_6 0x11F
|
||||
#define DA9063_REG_TRIM_CLDR 0x120
|
||||
#define DA9063_AD_REG_MON_REG_1 0x112
|
||||
#define DA9063_AD_REG_MON_REG_2 0x113
|
||||
#define DA9063_AD_REG_MON_REG_3 0x114
|
||||
#define DA9063_AD_REG_MON_REG_4 0x115
|
||||
#define DA9063_AD_REG_MON_REG_5 0x116
|
||||
#define DA9063_AD_REG_MON_REG_6 0x117
|
||||
#define DA9063_AD_REG_TRIM_CLDR 0x118
|
||||
|
||||
#define DA9063_AD_REG_GP_ID_0 0x119
|
||||
#define DA9063_AD_REG_GP_ID_1 0x11A
|
||||
#define DA9063_AD_REG_GP_ID_2 0x11B
|
||||
#define DA9063_AD_REG_GP_ID_3 0x11C
|
||||
#define DA9063_AD_REG_GP_ID_4 0x11D
|
||||
#define DA9063_AD_REG_GP_ID_5 0x11E
|
||||
#define DA9063_AD_REG_GP_ID_6 0x11F
|
||||
#define DA9063_AD_REG_GP_ID_7 0x120
|
||||
#define DA9063_AD_REG_GP_ID_8 0x121
|
||||
#define DA9063_AD_REG_GP_ID_9 0x122
|
||||
#define DA9063_AD_REG_GP_ID_10 0x123
|
||||
#define DA9063_AD_REG_GP_ID_11 0x124
|
||||
#define DA9063_AD_REG_GP_ID_12 0x125
|
||||
#define DA9063_AD_REG_GP_ID_13 0x126
|
||||
#define DA9063_AD_REG_GP_ID_14 0x127
|
||||
#define DA9063_AD_REG_GP_ID_15 0x128
|
||||
#define DA9063_AD_REG_GP_ID_16 0x129
|
||||
#define DA9063_AD_REG_GP_ID_17 0x12A
|
||||
#define DA9063_AD_REG_GP_ID_18 0x12B
|
||||
#define DA9063_AD_REG_GP_ID_19 0x12C
|
||||
|
||||
#define DA9063_BB_REG_CONFIG_M 0x112
|
||||
#define DA9063_BB_REG_CONFIG_N 0x113
|
||||
|
||||
#define DA9063_BB_REG_MON_REG_1 0x114
|
||||
#define DA9063_BB_REG_MON_REG_2 0x115
|
||||
#define DA9063_BB_REG_MON_REG_3 0x116
|
||||
#define DA9063_BB_REG_MON_REG_4 0x117
|
||||
#define DA9063_BB_REG_MON_REG_5 0x11E
|
||||
#define DA9063_BB_REG_MON_REG_6 0x11F
|
||||
#define DA9063_BB_REG_TRIM_CLDR 0x120
|
||||
/* General Purpose Registers */
|
||||
#define DA9063_REG_GP_ID_0 0x121
|
||||
#define DA9063_REG_GP_ID_1 0x122
|
||||
#define DA9063_REG_GP_ID_2 0x123
|
||||
#define DA9063_REG_GP_ID_3 0x124
|
||||
#define DA9063_REG_GP_ID_4 0x125
|
||||
#define DA9063_REG_GP_ID_5 0x126
|
||||
#define DA9063_REG_GP_ID_6 0x127
|
||||
#define DA9063_REG_GP_ID_7 0x128
|
||||
#define DA9063_REG_GP_ID_8 0x129
|
||||
#define DA9063_REG_GP_ID_9 0x12A
|
||||
#define DA9063_REG_GP_ID_10 0x12B
|
||||
#define DA9063_REG_GP_ID_11 0x12C
|
||||
#define DA9063_REG_GP_ID_12 0x12D
|
||||
#define DA9063_REG_GP_ID_13 0x12E
|
||||
#define DA9063_REG_GP_ID_14 0x12F
|
||||
#define DA9063_REG_GP_ID_15 0x130
|
||||
#define DA9063_REG_GP_ID_16 0x131
|
||||
#define DA9063_REG_GP_ID_17 0x132
|
||||
#define DA9063_REG_GP_ID_18 0x133
|
||||
#define DA9063_REG_GP_ID_19 0x134
|
||||
#define DA9063_BB_REG_GP_ID_0 0x121
|
||||
#define DA9063_BB_REG_GP_ID_1 0x122
|
||||
#define DA9063_BB_REG_GP_ID_2 0x123
|
||||
#define DA9063_BB_REG_GP_ID_3 0x124
|
||||
#define DA9063_BB_REG_GP_ID_4 0x125
|
||||
#define DA9063_BB_REG_GP_ID_5 0x126
|
||||
#define DA9063_BB_REG_GP_ID_6 0x127
|
||||
#define DA9063_BB_REG_GP_ID_7 0x128
|
||||
#define DA9063_BB_REG_GP_ID_8 0x129
|
||||
#define DA9063_BB_REG_GP_ID_9 0x12A
|
||||
#define DA9063_BB_REG_GP_ID_10 0x12B
|
||||
#define DA9063_BB_REG_GP_ID_11 0x12C
|
||||
#define DA9063_BB_REG_GP_ID_12 0x12D
|
||||
#define DA9063_BB_REG_GP_ID_13 0x12E
|
||||
#define DA9063_BB_REG_GP_ID_14 0x12F
|
||||
#define DA9063_BB_REG_GP_ID_15 0x130
|
||||
#define DA9063_BB_REG_GP_ID_16 0x131
|
||||
#define DA9063_BB_REG_GP_ID_17 0x132
|
||||
#define DA9063_BB_REG_GP_ID_18 0x133
|
||||
#define DA9063_BB_REG_GP_ID_19 0x134
|
||||
|
||||
/* Chip ID and variant */
|
||||
#define DA9063_REG_CHIP_ID 0x181
|
||||
|
|
@ -404,10 +445,10 @@
|
|||
/* DA9063_REG_CONTROL_B (addr=0x0F) */
|
||||
#define DA9063_CHG_SEL 0x01
|
||||
#define DA9063_WATCHDOG_PD 0x02
|
||||
#define DA9063_RESET_BLINKING 0x04
|
||||
#define DA9063_BB_RESET_BLINKING 0x04
|
||||
#define DA9063_NRES_MODE 0x08
|
||||
#define DA9063_NONKEY_LOCK 0x10
|
||||
#define DA9063_BUCK_SLOWSTART 0x80
|
||||
#define DA9063_BB_BUCK_SLOWSTART 0x80
|
||||
|
||||
/* DA9063_REG_CONTROL_C (addr=0x10) */
|
||||
#define DA9063_DEBOUNCING_MASK 0x07
|
||||
|
|
@ -467,7 +508,7 @@
|
|||
#define DA9063_GPADC_PAUSE 0x02
|
||||
#define DA9063_PMIF_DIS 0x04
|
||||
#define DA9063_HS2WIRE_DIS 0x08
|
||||
#define DA9063_CLDR_PAUSE 0x10
|
||||
#define DA9063_BB_CLDR_PAUSE 0x10
|
||||
#define DA9063_BBAT_DIS 0x20
|
||||
#define DA9063_OUT_32K_PAUSE 0x40
|
||||
#define DA9063_PMCONT_DIS 0x80
|
||||
|
|
@ -844,7 +885,7 @@
|
|||
#define DA9063_MONITOR 0x40
|
||||
|
||||
/* DA9063_REG_ALARM_S (addr=0x46) */
|
||||
#define DA9063_ALARM_S_MASK 0x3F
|
||||
#define DA9063_BB_ALARM_S_MASK 0x3F
|
||||
#define DA9063_ALARM_STATUS_ALARM 0x80
|
||||
#define DA9063_ALARM_STATUS_TICK 0x40
|
||||
/* DA9063_REG_ALARM_MI (addr=0x47) */
|
||||
|
|
|
|||
30
include/linux/mfd/intel_soc_pmic.h
Normal file
30
include/linux/mfd/intel_soc_pmic.h
Normal file
|
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
* intel_soc_pmic.h - Intel SoC PMIC Driver
|
||||
*
|
||||
* Copyright (C) 2012-2014 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License version
|
||||
* 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Author: Yang, Bin <bin.yang@intel.com>
|
||||
* Author: Zhu, Lejun <lejun.zhu@linux.intel.com>
|
||||
*/
|
||||
|
||||
#ifndef __INTEL_SOC_PMIC_H__
|
||||
#define __INTEL_SOC_PMIC_H__
|
||||
|
||||
#include <linux/regmap.h>
|
||||
|
||||
struct intel_soc_pmic {
|
||||
int irq;
|
||||
struct regmap *regmap;
|
||||
struct regmap_irq_chip_data *irq_chip_data;
|
||||
};
|
||||
|
||||
#endif /* __INTEL_SOC_PMIC_H__ */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* max77686-private.h - Voltage regulator driver for the Maxim 77686
|
||||
* max77686-private.h - Voltage regulator driver for the Maxim 77686/802
|
||||
*
|
||||
* Copyright (C) 2012 Samsung Electrnoics
|
||||
* Chiwoong Byun <woong.byun@samsung.com>
|
||||
|
|
@ -28,6 +28,7 @@
|
|||
|
||||
#define MAX77686_REG_INVALID (0xff)
|
||||
|
||||
/* MAX77686 PMIC registers */
|
||||
enum max77686_pmic_reg {
|
||||
MAX77686_REG_DEVICE_ID = 0x00,
|
||||
MAX77686_REG_INTSRC = 0x01,
|
||||
|
|
@ -181,8 +182,209 @@ enum max77686_rtc_reg {
|
|||
MAX77686_ALARM2_DATE = 0x1B,
|
||||
};
|
||||
|
||||
#define MAX77686_IRQSRC_PMIC (0)
|
||||
#define MAX77686_IRQSRC_RTC (1 << 0)
|
||||
/* MAX77802 PMIC registers */
|
||||
enum max77802_pmic_reg {
|
||||
MAX77802_REG_DEVICE_ID = 0x00,
|
||||
MAX77802_REG_INTSRC = 0x01,
|
||||
MAX77802_REG_INT1 = 0x02,
|
||||
MAX77802_REG_INT2 = 0x03,
|
||||
|
||||
MAX77802_REG_INT1MSK = 0x04,
|
||||
MAX77802_REG_INT2MSK = 0x05,
|
||||
|
||||
MAX77802_REG_STATUS1 = 0x06,
|
||||
MAX77802_REG_STATUS2 = 0x07,
|
||||
|
||||
MAX77802_REG_PWRON = 0x08,
|
||||
/* Reserved: 0x09 */
|
||||
MAX77802_REG_MRSTB = 0x0A,
|
||||
MAX77802_REG_EPWRHOLD = 0x0B,
|
||||
/* Reserved: 0x0C-0x0D */
|
||||
MAX77802_REG_BOOSTCTRL = 0x0E,
|
||||
MAX77802_REG_BOOSTOUT = 0x0F,
|
||||
|
||||
MAX77802_REG_BUCK1CTRL = 0x10,
|
||||
MAX77802_REG_BUCK1DVS1 = 0x11,
|
||||
MAX77802_REG_BUCK1DVS2 = 0x12,
|
||||
MAX77802_REG_BUCK1DVS3 = 0x13,
|
||||
MAX77802_REG_BUCK1DVS4 = 0x14,
|
||||
MAX77802_REG_BUCK1DVS5 = 0x15,
|
||||
MAX77802_REG_BUCK1DVS6 = 0x16,
|
||||
MAX77802_REG_BUCK1DVS7 = 0x17,
|
||||
MAX77802_REG_BUCK1DVS8 = 0x18,
|
||||
/* Reserved: 0x19 */
|
||||
MAX77802_REG_BUCK2CTRL1 = 0x1A,
|
||||
MAX77802_REG_BUCK2CTRL2 = 0x1B,
|
||||
MAX77802_REG_BUCK2PHTRAN = 0x1C,
|
||||
MAX77802_REG_BUCK2DVS1 = 0x1D,
|
||||
MAX77802_REG_BUCK2DVS2 = 0x1E,
|
||||
MAX77802_REG_BUCK2DVS3 = 0x1F,
|
||||
MAX77802_REG_BUCK2DVS4 = 0x20,
|
||||
MAX77802_REG_BUCK2DVS5 = 0x21,
|
||||
MAX77802_REG_BUCK2DVS6 = 0x22,
|
||||
MAX77802_REG_BUCK2DVS7 = 0x23,
|
||||
MAX77802_REG_BUCK2DVS8 = 0x24,
|
||||
/* Reserved: 0x25-0x26 */
|
||||
MAX77802_REG_BUCK3CTRL1 = 0x27,
|
||||
MAX77802_REG_BUCK3DVS1 = 0x28,
|
||||
MAX77802_REG_BUCK3DVS2 = 0x29,
|
||||
MAX77802_REG_BUCK3DVS3 = 0x2A,
|
||||
MAX77802_REG_BUCK3DVS4 = 0x2B,
|
||||
MAX77802_REG_BUCK3DVS5 = 0x2C,
|
||||
MAX77802_REG_BUCK3DVS6 = 0x2D,
|
||||
MAX77802_REG_BUCK3DVS7 = 0x2E,
|
||||
MAX77802_REG_BUCK3DVS8 = 0x2F,
|
||||
/* Reserved: 0x30-0x36 */
|
||||
MAX77802_REG_BUCK4CTRL1 = 0x37,
|
||||
MAX77802_REG_BUCK4DVS1 = 0x38,
|
||||
MAX77802_REG_BUCK4DVS2 = 0x39,
|
||||
MAX77802_REG_BUCK4DVS3 = 0x3A,
|
||||
MAX77802_REG_BUCK4DVS4 = 0x3B,
|
||||
MAX77802_REG_BUCK4DVS5 = 0x3C,
|
||||
MAX77802_REG_BUCK4DVS6 = 0x3D,
|
||||
MAX77802_REG_BUCK4DVS7 = 0x3E,
|
||||
MAX77802_REG_BUCK4DVS8 = 0x3F,
|
||||
/* Reserved: 0x40 */
|
||||
MAX77802_REG_BUCK5CTRL = 0x41,
|
||||
MAX77802_REG_BUCK5OUT = 0x42,
|
||||
/* Reserved: 0x43 */
|
||||
MAX77802_REG_BUCK6CTRL = 0x44,
|
||||
MAX77802_REG_BUCK6DVS1 = 0x45,
|
||||
MAX77802_REG_BUCK6DVS2 = 0x46,
|
||||
MAX77802_REG_BUCK6DVS3 = 0x47,
|
||||
MAX77802_REG_BUCK6DVS4 = 0x48,
|
||||
MAX77802_REG_BUCK6DVS5 = 0x49,
|
||||
MAX77802_REG_BUCK6DVS6 = 0x4A,
|
||||
MAX77802_REG_BUCK6DVS7 = 0x4B,
|
||||
MAX77802_REG_BUCK6DVS8 = 0x4C,
|
||||
/* Reserved: 0x4D */
|
||||
MAX77802_REG_BUCK7CTRL = 0x4E,
|
||||
MAX77802_REG_BUCK7OUT = 0x4F,
|
||||
/* Reserved: 0x50 */
|
||||
MAX77802_REG_BUCK8CTRL = 0x51,
|
||||
MAX77802_REG_BUCK8OUT = 0x52,
|
||||
/* Reserved: 0x53 */
|
||||
MAX77802_REG_BUCK9CTRL = 0x54,
|
||||
MAX77802_REG_BUCK9OUT = 0x55,
|
||||
/* Reserved: 0x56 */
|
||||
MAX77802_REG_BUCK10CTRL = 0x57,
|
||||
MAX77802_REG_BUCK10OUT = 0x58,
|
||||
|
||||
/* Reserved: 0x59-0x5F */
|
||||
|
||||
MAX77802_REG_LDO1CTRL1 = 0x60,
|
||||
MAX77802_REG_LDO2CTRL1 = 0x61,
|
||||
MAX77802_REG_LDO3CTRL1 = 0x62,
|
||||
MAX77802_REG_LDO4CTRL1 = 0x63,
|
||||
MAX77802_REG_LDO5CTRL1 = 0x64,
|
||||
MAX77802_REG_LDO6CTRL1 = 0x65,
|
||||
MAX77802_REG_LDO7CTRL1 = 0x66,
|
||||
MAX77802_REG_LDO8CTRL1 = 0x67,
|
||||
MAX77802_REG_LDO9CTRL1 = 0x68,
|
||||
MAX77802_REG_LDO10CTRL1 = 0x69,
|
||||
MAX77802_REG_LDO11CTRL1 = 0x6A,
|
||||
MAX77802_REG_LDO12CTRL1 = 0x6B,
|
||||
MAX77802_REG_LDO13CTRL1 = 0x6C,
|
||||
MAX77802_REG_LDO14CTRL1 = 0x6D,
|
||||
MAX77802_REG_LDO15CTRL1 = 0x6E,
|
||||
/* Reserved: 0x6F */
|
||||
MAX77802_REG_LDO17CTRL1 = 0x70,
|
||||
MAX77802_REG_LDO18CTRL1 = 0x71,
|
||||
MAX77802_REG_LDO19CTRL1 = 0x72,
|
||||
MAX77802_REG_LDO20CTRL1 = 0x73,
|
||||
MAX77802_REG_LDO21CTRL1 = 0x74,
|
||||
MAX77802_REG_LDO22CTRL1 = 0x75,
|
||||
MAX77802_REG_LDO23CTRL1 = 0x76,
|
||||
MAX77802_REG_LDO24CTRL1 = 0x77,
|
||||
MAX77802_REG_LDO25CTRL1 = 0x78,
|
||||
MAX77802_REG_LDO26CTRL1 = 0x79,
|
||||
MAX77802_REG_LDO27CTRL1 = 0x7A,
|
||||
MAX77802_REG_LDO28CTRL1 = 0x7B,
|
||||
MAX77802_REG_LDO29CTRL1 = 0x7C,
|
||||
MAX77802_REG_LDO30CTRL1 = 0x7D,
|
||||
/* Reserved: 0x7E */
|
||||
MAX77802_REG_LDO32CTRL1 = 0x7F,
|
||||
MAX77802_REG_LDO33CTRL1 = 0x80,
|
||||
MAX77802_REG_LDO34CTRL1 = 0x81,
|
||||
MAX77802_REG_LDO35CTRL1 = 0x82,
|
||||
/* Reserved: 0x83-0x8F */
|
||||
MAX77802_REG_LDO1CTRL2 = 0x90,
|
||||
MAX77802_REG_LDO2CTRL2 = 0x91,
|
||||
MAX77802_REG_LDO3CTRL2 = 0x92,
|
||||
MAX77802_REG_LDO4CTRL2 = 0x93,
|
||||
MAX77802_REG_LDO5CTRL2 = 0x94,
|
||||
MAX77802_REG_LDO6CTRL2 = 0x95,
|
||||
MAX77802_REG_LDO7CTRL2 = 0x96,
|
||||
MAX77802_REG_LDO8CTRL2 = 0x97,
|
||||
MAX77802_REG_LDO9CTRL2 = 0x98,
|
||||
MAX77802_REG_LDO10CTRL2 = 0x99,
|
||||
MAX77802_REG_LDO11CTRL2 = 0x9A,
|
||||
MAX77802_REG_LDO12CTRL2 = 0x9B,
|
||||
MAX77802_REG_LDO13CTRL2 = 0x9C,
|
||||
MAX77802_REG_LDO14CTRL2 = 0x9D,
|
||||
MAX77802_REG_LDO15CTRL2 = 0x9E,
|
||||
/* Reserved: 0x9F */
|
||||
MAX77802_REG_LDO17CTRL2 = 0xA0,
|
||||
MAX77802_REG_LDO18CTRL2 = 0xA1,
|
||||
MAX77802_REG_LDO19CTRL2 = 0xA2,
|
||||
MAX77802_REG_LDO20CTRL2 = 0xA3,
|
||||
MAX77802_REG_LDO21CTRL2 = 0xA4,
|
||||
MAX77802_REG_LDO22CTRL2 = 0xA5,
|
||||
MAX77802_REG_LDO23CTRL2 = 0xA6,
|
||||
MAX77802_REG_LDO24CTRL2 = 0xA7,
|
||||
MAX77802_REG_LDO25CTRL2 = 0xA8,
|
||||
MAX77802_REG_LDO26CTRL2 = 0xA9,
|
||||
MAX77802_REG_LDO27CTRL2 = 0xAA,
|
||||
MAX77802_REG_LDO28CTRL2 = 0xAB,
|
||||
MAX77802_REG_LDO29CTRL2 = 0xAC,
|
||||
MAX77802_REG_LDO30CTRL2 = 0xAD,
|
||||
/* Reserved: 0xAE */
|
||||
MAX77802_REG_LDO32CTRL2 = 0xAF,
|
||||
MAX77802_REG_LDO33CTRL2 = 0xB0,
|
||||
MAX77802_REG_LDO34CTRL2 = 0xB1,
|
||||
MAX77802_REG_LDO35CTRL2 = 0xB2,
|
||||
/* Reserved: 0xB3 */
|
||||
|
||||
MAX77802_REG_BBAT_CHG = 0xB4,
|
||||
MAX77802_REG_32KHZ = 0xB5,
|
||||
|
||||
MAX77802_REG_PMIC_END = 0xB6,
|
||||
};
|
||||
|
||||
enum max77802_rtc_reg {
|
||||
MAX77802_RTC_INT = 0xC0,
|
||||
MAX77802_RTC_INTM = 0xC1,
|
||||
MAX77802_RTC_CONTROLM = 0xC2,
|
||||
MAX77802_RTC_CONTROL = 0xC3,
|
||||
MAX77802_RTC_UPDATE0 = 0xC4,
|
||||
MAX77802_RTC_UPDATE1 = 0xC5,
|
||||
MAX77802_WTSR_SMPL_CNTL = 0xC6,
|
||||
MAX77802_RTC_SEC = 0xC7,
|
||||
MAX77802_RTC_MIN = 0xC8,
|
||||
MAX77802_RTC_HOUR = 0xC9,
|
||||
MAX77802_RTC_WEEKDAY = 0xCA,
|
||||
MAX77802_RTC_MONTH = 0xCB,
|
||||
MAX77802_RTC_YEAR = 0xCC,
|
||||
MAX77802_RTC_DATE = 0xCD,
|
||||
MAX77802_RTC_AE1 = 0xCE,
|
||||
MAX77802_ALARM1_SEC = 0xCF,
|
||||
MAX77802_ALARM1_MIN = 0xD0,
|
||||
MAX77802_ALARM1_HOUR = 0xD1,
|
||||
MAX77802_ALARM1_WEEKDAY = 0xD2,
|
||||
MAX77802_ALARM1_MONTH = 0xD3,
|
||||
MAX77802_ALARM1_YEAR = 0xD4,
|
||||
MAX77802_ALARM1_DATE = 0xD5,
|
||||
MAX77802_RTC_AE2 = 0xD6,
|
||||
MAX77802_ALARM2_SEC = 0xD7,
|
||||
MAX77802_ALARM2_MIN = 0xD8,
|
||||
MAX77802_ALARM2_HOUR = 0xD9,
|
||||
MAX77802_ALARM2_WEEKDAY = 0xDA,
|
||||
MAX77802_ALARM2_MONTH = 0xDB,
|
||||
MAX77802_ALARM2_YEAR = 0xDC,
|
||||
MAX77802_ALARM2_DATE = 0xDD,
|
||||
|
||||
MAX77802_RTC_END = 0xDF,
|
||||
};
|
||||
|
||||
enum max77686_irq_source {
|
||||
PMIC_INT1 = 0,
|
||||
|
|
@ -205,30 +407,46 @@ enum max77686_irq {
|
|||
MAX77686_PMICIRQ_140C,
|
||||
MAX77686_PMICIRQ_120C,
|
||||
|
||||
MAX77686_RTCIRQ_RTC60S,
|
||||
MAX77686_RTCIRQ_RTC60S = 0,
|
||||
MAX77686_RTCIRQ_RTCA1,
|
||||
MAX77686_RTCIRQ_RTCA2,
|
||||
MAX77686_RTCIRQ_SMPL,
|
||||
MAX77686_RTCIRQ_RTC1S,
|
||||
MAX77686_RTCIRQ_WTSR,
|
||||
|
||||
MAX77686_IRQ_NR,
|
||||
};
|
||||
|
||||
#define MAX77686_INT1_PWRONF_MSK BIT(0)
|
||||
#define MAX77686_INT1_PWRONR_MSK BIT(1)
|
||||
#define MAX77686_INT1_JIGONBF_MSK BIT(2)
|
||||
#define MAX77686_INT1_JIGONBR_MSK BIT(3)
|
||||
#define MAX77686_INT1_ACOKBF_MSK BIT(4)
|
||||
#define MAX77686_INT1_ACOKBR_MSK BIT(5)
|
||||
#define MAX77686_INT1_ONKEY1S_MSK BIT(6)
|
||||
#define MAX77686_INT1_MRSTB_MSK BIT(7)
|
||||
|
||||
#define MAX77686_INT2_140C_MSK BIT(0)
|
||||
#define MAX77686_INT2_120C_MSK BIT(1)
|
||||
|
||||
#define MAX77686_RTCINT_RTC60S_MSK BIT(0)
|
||||
#define MAX77686_RTCINT_RTCA1_MSK BIT(1)
|
||||
#define MAX77686_RTCINT_RTCA2_MSK BIT(2)
|
||||
#define MAX77686_RTCINT_SMPL_MSK BIT(3)
|
||||
#define MAX77686_RTCINT_RTC1S_MSK BIT(4)
|
||||
#define MAX77686_RTCINT_WTSR_MSK BIT(5)
|
||||
|
||||
struct max77686_dev {
|
||||
struct device *dev;
|
||||
struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
|
||||
struct i2c_client *rtc; /* slave addr 0x0c */
|
||||
|
||||
int type;
|
||||
unsigned long type;
|
||||
|
||||
struct regmap *regmap; /* regmap for mfd */
|
||||
struct regmap *rtc_regmap; /* regmap for rtc */
|
||||
|
||||
struct irq_domain *irq_domain;
|
||||
struct regmap_irq_chip_data *irq_data;
|
||||
struct regmap_irq_chip_data *rtc_irq_data;
|
||||
|
||||
int irq;
|
||||
int irq_gpio;
|
||||
bool wakeup;
|
||||
struct mutex irqlock;
|
||||
int irq_masks_cur[MAX77686_IRQ_GROUP_NR];
|
||||
|
|
@ -237,6 +455,7 @@ struct max77686_dev {
|
|||
|
||||
enum max77686_types {
|
||||
TYPE_MAX77686,
|
||||
TYPE_MAX77802,
|
||||
};
|
||||
|
||||
extern int max77686_irq_init(struct max77686_dev *max77686);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* max77686.h - Driver for the Maxim 77686
|
||||
* max77686.h - Driver for the Maxim 77686/802
|
||||
*
|
||||
* Copyright (C) 2012 Samsung Electrnoics
|
||||
* Chiwoong Byun <woong.byun@samsung.com>
|
||||
|
|
@ -71,6 +71,54 @@ enum max77686_regulators {
|
|||
MAX77686_REG_MAX,
|
||||
};
|
||||
|
||||
/* MAX77802 regulator IDs */
|
||||
enum max77802_regulators {
|
||||
MAX77802_BUCK1 = 0,
|
||||
MAX77802_BUCK2,
|
||||
MAX77802_BUCK3,
|
||||
MAX77802_BUCK4,
|
||||
MAX77802_BUCK5,
|
||||
MAX77802_BUCK6,
|
||||
MAX77802_BUCK7,
|
||||
MAX77802_BUCK8,
|
||||
MAX77802_BUCK9,
|
||||
MAX77802_BUCK10,
|
||||
MAX77802_LDO1,
|
||||
MAX77802_LDO2,
|
||||
MAX77802_LDO3,
|
||||
MAX77802_LDO4,
|
||||
MAX77802_LDO5,
|
||||
MAX77802_LDO6,
|
||||
MAX77802_LDO7,
|
||||
MAX77802_LDO8,
|
||||
MAX77802_LDO9,
|
||||
MAX77802_LDO10,
|
||||
MAX77802_LDO11,
|
||||
MAX77802_LDO12,
|
||||
MAX77802_LDO13,
|
||||
MAX77802_LDO14,
|
||||
MAX77802_LDO15,
|
||||
MAX77802_LDO17,
|
||||
MAX77802_LDO18,
|
||||
MAX77802_LDO19,
|
||||
MAX77802_LDO20,
|
||||
MAX77802_LDO21,
|
||||
MAX77802_LDO23,
|
||||
MAX77802_LDO24,
|
||||
MAX77802_LDO25,
|
||||
MAX77802_LDO26,
|
||||
MAX77802_LDO27,
|
||||
MAX77802_LDO28,
|
||||
MAX77802_LDO29,
|
||||
MAX77802_LDO30,
|
||||
MAX77802_LDO32,
|
||||
MAX77802_LDO33,
|
||||
MAX77802_LDO34,
|
||||
MAX77802_LDO35,
|
||||
|
||||
MAX77802_REG_MAX,
|
||||
};
|
||||
|
||||
struct max77686_regulator_data {
|
||||
int id;
|
||||
struct regulator_init_data *initdata;
|
||||
|
|
@ -83,14 +131,19 @@ enum max77686_opmode {
|
|||
MAX77686_OPMODE_STANDBY,
|
||||
};
|
||||
|
||||
enum max77802_opmode {
|
||||
MAX77802_OPMODE_OFF,
|
||||
MAX77802_OPMODE_STANDBY,
|
||||
MAX77802_OPMODE_LP,
|
||||
MAX77802_OPMODE_NORMAL,
|
||||
};
|
||||
|
||||
struct max77686_opmode_data {
|
||||
int id;
|
||||
int mode;
|
||||
};
|
||||
|
||||
struct max77686_platform_data {
|
||||
/* IRQ */
|
||||
int irq_gpio;
|
||||
int ono;
|
||||
int wakeup;
|
||||
|
||||
|
|
|
|||
|
|
@ -86,6 +86,5 @@
|
|||
#define MC13783_IRQ_HSL 43
|
||||
#define MC13783_IRQ_ALSPTH 44
|
||||
#define MC13783_IRQ_AHSSHORT 45
|
||||
#define MC13783_NUM_IRQ MC13XXX_NUM_IRQ
|
||||
|
||||
#endif /* ifndef __LINUX_MFD_MC13783_H */
|
||||
|
|
|
|||
|
|
@ -23,15 +23,10 @@ int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
|
|||
|
||||
int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
|
||||
irq_handler_t handler, const char *name, void *dev);
|
||||
int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq,
|
||||
irq_handler_t handler, const char *name, void *dev);
|
||||
int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev);
|
||||
|
||||
int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq);
|
||||
int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq);
|
||||
int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
|
||||
int *enabled, int *pending);
|
||||
int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq);
|
||||
|
||||
int mc13xxx_get_flags(struct mc13xxx *mc13xxx);
|
||||
|
||||
|
|
@ -39,6 +34,22 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx,
|
|||
unsigned int mode, unsigned int channel,
|
||||
u8 ato, bool atox, unsigned int *sample);
|
||||
|
||||
/* Deprecated calls */
|
||||
static inline int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq,
|
||||
irq_handler_t handler,
|
||||
const char *name, void *dev)
|
||||
{
|
||||
return mc13xxx_irq_request(mc13xxx, irq, handler, name, dev);
|
||||
}
|
||||
|
||||
int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq);
|
||||
int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq);
|
||||
|
||||
#define MC13783_AUDIO_RX0 36
|
||||
#define MC13783_AUDIO_RX1 37
|
||||
#define MC13783_AUDIO_TX 38
|
||||
|
|
@ -68,8 +79,6 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx,
|
|||
#define MC13XXX_IRQ_THWARNH 37
|
||||
#define MC13XXX_IRQ_CLK 38
|
||||
|
||||
#define MC13XXX_NUM_IRQ 46
|
||||
|
||||
struct regulator_init_data;
|
||||
|
||||
struct mc13xxx_regulator_init_data {
|
||||
|
|
|
|||
|
|
@ -943,6 +943,12 @@ void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr);
|
|||
int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout);
|
||||
int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
|
||||
int num_sg, bool read, int timeout);
|
||||
int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
|
||||
int num_sg, bool read);
|
||||
void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
|
||||
int num_sg, bool read);
|
||||
int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
|
||||
int count, bool read, int timeout);
|
||||
int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
|
||||
int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
|
||||
int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card);
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ enum sec_device_type {
|
|||
S2MPA01,
|
||||
S2MPS11X,
|
||||
S2MPS14X,
|
||||
S2MPU02,
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -129,6 +129,30 @@ enum s2mps14_irq {
|
|||
S2MPS14_IRQ_NR,
|
||||
};
|
||||
|
||||
enum s2mpu02_irq {
|
||||
S2MPU02_IRQ_PWRONF,
|
||||
S2MPU02_IRQ_PWRONR,
|
||||
S2MPU02_IRQ_JIGONBF,
|
||||
S2MPU02_IRQ_JIGONBR,
|
||||
S2MPU02_IRQ_ACOKBF,
|
||||
S2MPU02_IRQ_ACOKBR,
|
||||
S2MPU02_IRQ_PWRON1S,
|
||||
S2MPU02_IRQ_MRB,
|
||||
|
||||
S2MPU02_IRQ_RTC60S,
|
||||
S2MPU02_IRQ_RTCA1,
|
||||
S2MPU02_IRQ_RTCA0,
|
||||
S2MPU02_IRQ_SMPL,
|
||||
S2MPU02_IRQ_RTC1S,
|
||||
S2MPU02_IRQ_WTSR,
|
||||
|
||||
S2MPU02_IRQ_INT120C,
|
||||
S2MPU02_IRQ_INT140C,
|
||||
S2MPU02_IRQ_TSD,
|
||||
|
||||
S2MPU02_IRQ_NR,
|
||||
};
|
||||
|
||||
/* Masks for interrupts are the same as in s2mps11 */
|
||||
#define S2MPS14_IRQ_TSD_MASK (1 << 2)
|
||||
|
||||
|
|
|
|||
201
include/linux/mfd/samsung/s2mpu02.h
Normal file
201
include/linux/mfd/samsung/s2mpu02.h
Normal file
|
|
@ -0,0 +1,201 @@
|
|||
/*
|
||||
* s2mpu02.h
|
||||
*
|
||||
* Copyright (c) 2014 Samsung Electronics Co., Ltd
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_MFD_S2MPU02_H
|
||||
#define __LINUX_MFD_S2MPU02_H
|
||||
|
||||
/* S2MPU02 registers */
|
||||
enum S2MPU02_reg {
|
||||
S2MPU02_REG_ID,
|
||||
S2MPU02_REG_INT1,
|
||||
S2MPU02_REG_INT2,
|
||||
S2MPU02_REG_INT3,
|
||||
S2MPU02_REG_INT1M,
|
||||
S2MPU02_REG_INT2M,
|
||||
S2MPU02_REG_INT3M,
|
||||
S2MPU02_REG_ST1,
|
||||
S2MPU02_REG_ST2,
|
||||
S2MPU02_REG_PWRONSRC,
|
||||
S2MPU02_REG_OFFSRC,
|
||||
S2MPU02_REG_BU_CHG,
|
||||
S2MPU02_REG_RTCCTRL,
|
||||
S2MPU02_REG_PMCTRL1,
|
||||
S2MPU02_REG_RSVD1,
|
||||
S2MPU02_REG_RSVD2,
|
||||
S2MPU02_REG_RSVD3,
|
||||
S2MPU02_REG_RSVD4,
|
||||
S2MPU02_REG_RSVD5,
|
||||
S2MPU02_REG_RSVD6,
|
||||
S2MPU02_REG_RSVD7,
|
||||
S2MPU02_REG_WRSTEN,
|
||||
S2MPU02_REG_RSVD8,
|
||||
S2MPU02_REG_RSVD9,
|
||||
S2MPU02_REG_RSVD10,
|
||||
S2MPU02_REG_B1CTRL1,
|
||||
S2MPU02_REG_B1CTRL2,
|
||||
S2MPU02_REG_B2CTRL1,
|
||||
S2MPU02_REG_B2CTRL2,
|
||||
S2MPU02_REG_B3CTRL1,
|
||||
S2MPU02_REG_B3CTRL2,
|
||||
S2MPU02_REG_B4CTRL1,
|
||||
S2MPU02_REG_B4CTRL2,
|
||||
S2MPU02_REG_B5CTRL1,
|
||||
S2MPU02_REG_B5CTRL2,
|
||||
S2MPU02_REG_B5CTRL3,
|
||||
S2MPU02_REG_B5CTRL4,
|
||||
S2MPU02_REG_B5CTRL5,
|
||||
S2MPU02_REG_B6CTRL1,
|
||||
S2MPU02_REG_B6CTRL2,
|
||||
S2MPU02_REG_B7CTRL1,
|
||||
S2MPU02_REG_B7CTRL2,
|
||||
S2MPU02_REG_RAMP1,
|
||||
S2MPU02_REG_RAMP2,
|
||||
S2MPU02_REG_L1CTRL,
|
||||
S2MPU02_REG_L2CTRL1,
|
||||
S2MPU02_REG_L2CTRL2,
|
||||
S2MPU02_REG_L2CTRL3,
|
||||
S2MPU02_REG_L2CTRL4,
|
||||
S2MPU02_REG_L3CTRL,
|
||||
S2MPU02_REG_L4CTRL,
|
||||
S2MPU02_REG_L5CTRL,
|
||||
S2MPU02_REG_L6CTRL,
|
||||
S2MPU02_REG_L7CTRL,
|
||||
S2MPU02_REG_L8CTRL,
|
||||
S2MPU02_REG_L9CTRL,
|
||||
S2MPU02_REG_L10CTRL,
|
||||
S2MPU02_REG_L11CTRL,
|
||||
S2MPU02_REG_L12CTRL,
|
||||
S2MPU02_REG_L13CTRL,
|
||||
S2MPU02_REG_L14CTRL,
|
||||
S2MPU02_REG_L15CTRL,
|
||||
S2MPU02_REG_L16CTRL,
|
||||
S2MPU02_REG_L17CTRL,
|
||||
S2MPU02_REG_L18CTRL,
|
||||
S2MPU02_REG_L19CTRL,
|
||||
S2MPU02_REG_L20CTRL,
|
||||
S2MPU02_REG_L21CTRL,
|
||||
S2MPU02_REG_L22CTRL,
|
||||
S2MPU02_REG_L23CTRL,
|
||||
S2MPU02_REG_L24CTRL,
|
||||
S2MPU02_REG_L25CTRL,
|
||||
S2MPU02_REG_L26CTRL,
|
||||
S2MPU02_REG_L27CTRL,
|
||||
S2MPU02_REG_L28CTRL,
|
||||
S2MPU02_REG_LDODSCH1,
|
||||
S2MPU02_REG_LDODSCH2,
|
||||
S2MPU02_REG_LDODSCH3,
|
||||
S2MPU02_REG_LDODSCH4,
|
||||
S2MPU02_REG_SELMIF,
|
||||
S2MPU02_REG_RSVD11,
|
||||
S2MPU02_REG_RSVD12,
|
||||
S2MPU02_REG_RSVD13,
|
||||
S2MPU02_REG_DVSSEL,
|
||||
S2MPU02_REG_DVSPTR,
|
||||
S2MPU02_REG_DVSDATA,
|
||||
};
|
||||
|
||||
/* S2MPU02 regulator ids */
|
||||
enum S2MPU02_regulators {
|
||||
S2MPU02_LDO1,
|
||||
S2MPU02_LDO2,
|
||||
S2MPU02_LDO3,
|
||||
S2MPU02_LDO4,
|
||||
S2MPU02_LDO5,
|
||||
S2MPU02_LDO6,
|
||||
S2MPU02_LDO7,
|
||||
S2MPU02_LDO8,
|
||||
S2MPU02_LDO9,
|
||||
S2MPU02_LDO10,
|
||||
S2MPU02_LDO11,
|
||||
S2MPU02_LDO12,
|
||||
S2MPU02_LDO13,
|
||||
S2MPU02_LDO14,
|
||||
S2MPU02_LDO15,
|
||||
S2MPU02_LDO16,
|
||||
S2MPU02_LDO17,
|
||||
S2MPU02_LDO18,
|
||||
S2MPU02_LDO19,
|
||||
S2MPU02_LDO20,
|
||||
S2MPU02_LDO21,
|
||||
S2MPU02_LDO22,
|
||||
S2MPU02_LDO23,
|
||||
S2MPU02_LDO24,
|
||||
S2MPU02_LDO25,
|
||||
S2MPU02_LDO26,
|
||||
S2MPU02_LDO27,
|
||||
S2MPU02_LDO28,
|
||||
S2MPU02_BUCK1,
|
||||
S2MPU02_BUCK2,
|
||||
S2MPU02_BUCK3,
|
||||
S2MPU02_BUCK4,
|
||||
S2MPU02_BUCK5,
|
||||
S2MPU02_BUCK6,
|
||||
S2MPU02_BUCK7,
|
||||
|
||||
S2MPU02_REGULATOR_MAX,
|
||||
};
|
||||
|
||||
/* Regulator constraints for BUCKx */
|
||||
#define S2MPU02_BUCK1234_MIN_600MV 600000
|
||||
#define S2MPU02_BUCK5_MIN_1081_25MV 1081250
|
||||
#define S2MPU02_BUCK6_MIN_1700MV 1700000
|
||||
#define S2MPU02_BUCK7_MIN_900MV 900000
|
||||
|
||||
#define S2MPU02_BUCK1234_STEP_6_25MV 6250
|
||||
#define S2MPU02_BUCK5_STEP_6_25MV 6250
|
||||
#define S2MPU02_BUCK6_STEP_2_50MV 2500
|
||||
#define S2MPU02_BUCK7_STEP_6_25MV 6250
|
||||
|
||||
#define S2MPU02_BUCK1234_START_SEL 0x00
|
||||
#define S2MPU02_BUCK5_START_SEL 0x4D
|
||||
#define S2MPU02_BUCK6_START_SEL 0x28
|
||||
#define S2MPU02_BUCK7_START_SEL 0x30
|
||||
|
||||
#define S2MPU02_BUCK_RAMP_DELAY 12500
|
||||
|
||||
/* Regulator constraints for different types of LDOx */
|
||||
#define S2MPU02_LDO_MIN_900MV 900000
|
||||
#define S2MPU02_LDO_MIN_1050MV 1050000
|
||||
#define S2MPU02_LDO_MIN_1600MV 1600000
|
||||
#define S2MPU02_LDO_STEP_12_5MV 12500
|
||||
#define S2MPU02_LDO_STEP_25MV 25000
|
||||
#define S2MPU02_LDO_STEP_50MV 50000
|
||||
|
||||
#define S2MPU02_LDO_GROUP1_START_SEL 0x8
|
||||
#define S2MPU02_LDO_GROUP2_START_SEL 0xA
|
||||
#define S2MPU02_LDO_GROUP3_START_SEL 0x10
|
||||
|
||||
#define S2MPU02_LDO_VSEL_MASK 0x3F
|
||||
#define S2MPU02_BUCK_VSEL_MASK 0xFF
|
||||
#define S2MPU02_ENABLE_MASK (0x03 << S2MPU02_ENABLE_SHIFT)
|
||||
#define S2MPU02_ENABLE_SHIFT 6
|
||||
|
||||
/* On/Off controlled by PWREN */
|
||||
#define S2MPU02_ENABLE_SUSPEND (0x01 << S2MPU02_ENABLE_SHIFT)
|
||||
#define S2MPU02_DISABLE_SUSPEND (0x11 << S2MPU02_ENABLE_SHIFT)
|
||||
#define S2MPU02_LDO_N_VOLTAGES (S2MPU02_LDO_VSEL_MASK + 1)
|
||||
#define S2MPU02_BUCK_N_VOLTAGES (S2MPU02_BUCK_VSEL_MASK + 1)
|
||||
|
||||
/* RAMP delay for BUCK1234*/
|
||||
#define S2MPU02_BUCK1_RAMP_SHIFT 6
|
||||
#define S2MPU02_BUCK2_RAMP_SHIFT 4
|
||||
#define S2MPU02_BUCK3_RAMP_SHIFT 2
|
||||
#define S2MPU02_BUCK4_RAMP_SHIFT 0
|
||||
#define S2MPU02_BUCK1234_RAMP_MASK 0x3
|
||||
|
||||
#endif /* __LINUX_MFD_S2MPU02_H */
|
||||
|
|
@ -892,7 +892,7 @@ struct tps65910 {
|
|||
struct device *dev;
|
||||
struct i2c_client *i2c_client;
|
||||
struct regmap *regmap;
|
||||
unsigned int id;
|
||||
unsigned long id;
|
||||
|
||||
/* Client devices */
|
||||
struct tps65910_pmic *pmic;
|
||||
|
|
|
|||
|
|
@ -116,6 +116,7 @@ enum {
|
|||
/* special QP and management commands */
|
||||
MLX4_CMD_CONF_SPECIAL_QP = 0x23,
|
||||
MLX4_CMD_MAD_IFC = 0x24,
|
||||
MLX4_CMD_MAD_DEMUX = 0x203,
|
||||
|
||||
/* multicast commands */
|
||||
MLX4_CMD_READ_MCG = 0x25,
|
||||
|
|
@ -185,6 +186,12 @@ enum {
|
|||
MLX4_SET_PORT_VXLAN = 0xB
|
||||
};
|
||||
|
||||
enum {
|
||||
MLX4_CMD_MAD_DEMUX_CONFIG = 0,
|
||||
MLX4_CMD_MAD_DEMUX_QUERY_STATE = 1,
|
||||
MLX4_CMD_MAD_DEMUX_QUERY_RESTR = 2, /* Query mad demux restrictions */
|
||||
};
|
||||
|
||||
enum {
|
||||
MLX4_CMD_WRAPPED,
|
||||
MLX4_CMD_NATIVE
|
||||
|
|
|
|||
|
|
@ -183,6 +183,7 @@ enum {
|
|||
MLX4_DEV_CAP_FLAG2_UPDATE_QP = 1LL << 8,
|
||||
MLX4_DEV_CAP_FLAG2_DMFS_IPOIB = 1LL << 9,
|
||||
MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS = 1LL << 10,
|
||||
MLX4_DEV_CAP_FLAG2_MAD_DEMUX = 1LL << 11,
|
||||
};
|
||||
|
||||
enum {
|
||||
|
|
@ -273,6 +274,7 @@ enum {
|
|||
MLX4_PERM_REMOTE_WRITE = 1 << 13,
|
||||
MLX4_PERM_ATOMIC = 1 << 14,
|
||||
MLX4_PERM_BIND_MW = 1 << 15,
|
||||
MLX4_PERM_MASK = 0xFC00
|
||||
};
|
||||
|
||||
enum {
|
||||
|
|
@ -1254,6 +1256,21 @@ int mlx4_vf_smi_enabled(struct mlx4_dev *dev, int slave, int port);
|
|||
int mlx4_vf_get_enable_smi_admin(struct mlx4_dev *dev, int slave, int port);
|
||||
int mlx4_vf_set_enable_smi_admin(struct mlx4_dev *dev, int slave, int port,
|
||||
int enable);
|
||||
int mlx4_mr_hw_get_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
|
||||
struct mlx4_mpt_entry ***mpt_entry);
|
||||
int mlx4_mr_hw_write_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
|
||||
struct mlx4_mpt_entry **mpt_entry);
|
||||
int mlx4_mr_hw_change_pd(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry,
|
||||
u32 pdn);
|
||||
int mlx4_mr_hw_change_access(struct mlx4_dev *dev,
|
||||
struct mlx4_mpt_entry *mpt_entry,
|
||||
u32 access);
|
||||
void mlx4_mr_hw_put_mpt(struct mlx4_dev *dev,
|
||||
struct mlx4_mpt_entry **mpt_entry);
|
||||
void mlx4_mr_rereg_mem_cleanup(struct mlx4_dev *dev, struct mlx4_mr *mr);
|
||||
int mlx4_mr_rereg_mem_write(struct mlx4_dev *dev, struct mlx4_mr *mr,
|
||||
u64 iova, u64 size, int npages,
|
||||
int page_shift, struct mlx4_mpt_entry *mpt_entry);
|
||||
|
||||
/* Returns true if running in low memory profile (kdump kernel) */
|
||||
static inline bool mlx4_low_memory_profile(void)
|
||||
|
|
|
|||
|
|
@ -2014,13 +2014,20 @@ static inline bool kernel_page_present(struct page *page) { return true; }
|
|||
#endif /* CONFIG_HIBERNATION */
|
||||
#endif
|
||||
|
||||
#ifdef __HAVE_ARCH_GATE_AREA
|
||||
extern struct vm_area_struct *get_gate_vma(struct mm_struct *mm);
|
||||
#ifdef __HAVE_ARCH_GATE_AREA
|
||||
int in_gate_area_no_mm(unsigned long addr);
|
||||
int in_gate_area(struct mm_struct *mm, unsigned long addr);
|
||||
extern int in_gate_area_no_mm(unsigned long addr);
|
||||
extern int in_gate_area(struct mm_struct *mm, unsigned long addr);
|
||||
#else
|
||||
int in_gate_area_no_mm(unsigned long addr);
|
||||
#define in_gate_area(mm, addr) ({(void)mm; in_gate_area_no_mm(addr);})
|
||||
static inline struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
static inline int in_gate_area_no_mm(unsigned long addr) { return 0; }
|
||||
static inline int in_gate_area(struct mm_struct *mm, unsigned long addr)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* __HAVE_ARCH_GATE_AREA */
|
||||
|
||||
#ifdef CONFIG_SYSCTL
|
||||
|
|
|
|||
|
|
@ -461,6 +461,7 @@ static inline void mm_init_cpumask(struct mm_struct *mm)
|
|||
#ifdef CONFIG_CPUMASK_OFFSTACK
|
||||
mm->cpu_vm_mask_var = &mm->cpumask_allocation;
|
||||
#endif
|
||||
cpumask_clear(mm->cpu_vm_mask_var);
|
||||
}
|
||||
|
||||
/* Future-safe accessor for struct mm_struct's cpu_vm_mask. */
|
||||
|
|
|
|||
|
|
@ -213,6 +213,8 @@ struct dw_mci_dma_ops {
|
|||
#define DW_MCI_QUIRK_HIGHSPEED BIT(2)
|
||||
/* Unreliable card detection */
|
||||
#define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3)
|
||||
/* No write protect */
|
||||
#define DW_MCI_QUIRK_NO_WRITE_PROTECT BIT(4)
|
||||
|
||||
/* Slot level quirks */
|
||||
/* This slot has no write protect */
|
||||
|
|
|
|||
|
|
@ -104,9 +104,6 @@ struct sdhci_host {
|
|||
|
||||
const struct sdhci_ops *ops; /* Low level hw interface */
|
||||
|
||||
struct regulator *vmmc; /* Power regulator (vmmc) */
|
||||
struct regulator *vqmmc; /* Signaling regulator (vccq) */
|
||||
|
||||
/* Internal data */
|
||||
struct mmc_host *mmc; /* MMC structure */
|
||||
u64 dma_mask; /* custom DMA mask */
|
||||
|
|
|
|||
|
|
@ -20,11 +20,13 @@ extern void dump_page_badflags(struct page *page, const char *reason,
|
|||
} while (0)
|
||||
#define VM_WARN_ON(cond) WARN_ON(cond)
|
||||
#define VM_WARN_ON_ONCE(cond) WARN_ON_ONCE(cond)
|
||||
#define VM_WARN_ONCE(cond, format...) WARN_ONCE(cond, format)
|
||||
#else
|
||||
#define VM_BUG_ON(cond) BUILD_BUG_ON_INVALID(cond)
|
||||
#define VM_BUG_ON_PAGE(cond, page) VM_BUG_ON(cond)
|
||||
#define VM_WARN_ON(cond) BUILD_BUG_ON_INVALID(cond)
|
||||
#define VM_WARN_ON_ONCE(cond) BUILD_BUG_ON_INVALID(cond)
|
||||
#define VM_WARN_ONCE(cond, format...) BUILD_BUG_ON_INVALID(cond)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_VIRTUAL
|
||||
|
|
|
|||
|
|
@ -170,6 +170,8 @@ extern int __mmu_notifier_register(struct mmu_notifier *mn,
|
|||
struct mm_struct *mm);
|
||||
extern void mmu_notifier_unregister(struct mmu_notifier *mn,
|
||||
struct mm_struct *mm);
|
||||
extern void mmu_notifier_unregister_no_release(struct mmu_notifier *mn,
|
||||
struct mm_struct *mm);
|
||||
extern void __mmu_notifier_mm_destroy(struct mm_struct *mm);
|
||||
extern void __mmu_notifier_release(struct mm_struct *mm);
|
||||
extern int __mmu_notifier_clear_flush_young(struct mm_struct *mm,
|
||||
|
|
@ -288,6 +290,10 @@ static inline void mmu_notifier_mm_destroy(struct mm_struct *mm)
|
|||
set_pte_at(___mm, ___address, __ptep, ___pte); \
|
||||
})
|
||||
|
||||
extern void mmu_notifier_call_srcu(struct rcu_head *rcu,
|
||||
void (*func)(struct rcu_head *rcu));
|
||||
extern void mmu_notifier_synchronize(void);
|
||||
|
||||
#else /* CONFIG_MMU_NOTIFIER */
|
||||
|
||||
static inline void mmu_notifier_release(struct mm_struct *mm)
|
||||
|
|
|
|||
|
|
@ -143,6 +143,7 @@ enum zone_stat_item {
|
|||
NR_SHMEM, /* shmem pages (included tmpfs/GEM pages) */
|
||||
NR_DIRTIED, /* page dirtyings since bootup */
|
||||
NR_WRITTEN, /* page writings since bootup */
|
||||
NR_PAGES_SCANNED, /* pages scanned since last reclaim */
|
||||
#ifdef CONFIG_NUMA
|
||||
NUMA_HIT, /* allocated in intended node */
|
||||
NUMA_MISS, /* allocated in non intended node */
|
||||
|
|
@ -324,18 +325,11 @@ enum zone_type {
|
|||
#ifndef __GENERATING_BOUNDS_H
|
||||
|
||||
struct zone {
|
||||
/* Fields commonly accessed by the page allocator */
|
||||
/* Read-mostly fields */
|
||||
|
||||
/* zone watermarks, access with *_wmark_pages(zone) macros */
|
||||
unsigned long watermark[NR_WMARK];
|
||||
|
||||
/*
|
||||
* When free pages are below this point, additional steps are taken
|
||||
* when reading the number of free pages to avoid per-cpu counter
|
||||
* drift allowing watermarks to be breached
|
||||
*/
|
||||
unsigned long percpu_drift_mark;
|
||||
|
||||
/*
|
||||
* We don't know if the memory that we're going to allocate will be freeable
|
||||
* or/and it will be released eventually, so to avoid totally wasting several
|
||||
|
|
@ -344,7 +338,20 @@ struct zone {
|
|||
* on the higher zones). This array is recalculated at runtime if the
|
||||
* sysctl_lowmem_reserve_ratio sysctl changes.
|
||||
*/
|
||||
unsigned long lowmem_reserve[MAX_NR_ZONES];
|
||||
long lowmem_reserve[MAX_NR_ZONES];
|
||||
|
||||
#ifdef CONFIG_NUMA
|
||||
int node;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The target ratio of ACTIVE_ANON to INACTIVE_ANON pages on
|
||||
* this zone's LRU. Maintained by the pageout code.
|
||||
*/
|
||||
unsigned int inactive_ratio;
|
||||
|
||||
struct pglist_data *zone_pgdat;
|
||||
struct per_cpu_pageset __percpu *pageset;
|
||||
|
||||
/*
|
||||
* This is a per-zone reserve of pages that should not be
|
||||
|
|
@ -352,34 +359,6 @@ struct zone {
|
|||
*/
|
||||
unsigned long dirty_balance_reserve;
|
||||
|
||||
#ifdef CONFIG_NUMA
|
||||
int node;
|
||||
/*
|
||||
* zone reclaim becomes active if more unmapped pages exist.
|
||||
*/
|
||||
unsigned long min_unmapped_pages;
|
||||
unsigned long min_slab_pages;
|
||||
#endif
|
||||
struct per_cpu_pageset __percpu *pageset;
|
||||
/*
|
||||
* free areas of different sizes
|
||||
*/
|
||||
spinlock_t lock;
|
||||
#if defined CONFIG_COMPACTION || defined CONFIG_CMA
|
||||
/* Set to true when the PG_migrate_skip bits should be cleared */
|
||||
bool compact_blockskip_flush;
|
||||
|
||||
/* pfn where compaction free scanner should start */
|
||||
unsigned long compact_cached_free_pfn;
|
||||
/* pfn where async and sync compaction migration scanner should start */
|
||||
unsigned long compact_cached_migrate_pfn[2];
|
||||
#endif
|
||||
#ifdef CONFIG_MEMORY_HOTPLUG
|
||||
/* see spanned/present_pages for more description */
|
||||
seqlock_t span_seqlock;
|
||||
#endif
|
||||
struct free_area free_area[MAX_ORDER];
|
||||
|
||||
#ifndef CONFIG_SPARSEMEM
|
||||
/*
|
||||
* Flags for a pageblock_nr_pages block. See pageblock-flags.h.
|
||||
|
|
@ -388,74 +367,14 @@ struct zone {
|
|||
unsigned long *pageblock_flags;
|
||||
#endif /* CONFIG_SPARSEMEM */
|
||||
|
||||
#ifdef CONFIG_COMPACTION
|
||||
#ifdef CONFIG_NUMA
|
||||
/*
|
||||
* On compaction failure, 1<<compact_defer_shift compactions
|
||||
* are skipped before trying again. The number attempted since
|
||||
* last failure is tracked with compact_considered.
|
||||
* zone reclaim becomes active if more unmapped pages exist.
|
||||
*/
|
||||
unsigned int compact_considered;
|
||||
unsigned int compact_defer_shift;
|
||||
int compact_order_failed;
|
||||
#endif
|
||||
unsigned long min_unmapped_pages;
|
||||
unsigned long min_slab_pages;
|
||||
#endif /* CONFIG_NUMA */
|
||||
|
||||
ZONE_PADDING(_pad1_)
|
||||
|
||||
/* Fields commonly accessed by the page reclaim scanner */
|
||||
spinlock_t lru_lock;
|
||||
struct lruvec lruvec;
|
||||
|
||||
/* Evictions & activations on the inactive file list */
|
||||
atomic_long_t inactive_age;
|
||||
|
||||
unsigned long pages_scanned; /* since last reclaim */
|
||||
unsigned long flags; /* zone flags, see below */
|
||||
|
||||
/* Zone statistics */
|
||||
atomic_long_t vm_stat[NR_VM_ZONE_STAT_ITEMS];
|
||||
|
||||
/*
|
||||
* The target ratio of ACTIVE_ANON to INACTIVE_ANON pages on
|
||||
* this zone's LRU. Maintained by the pageout code.
|
||||
*/
|
||||
unsigned int inactive_ratio;
|
||||
|
||||
|
||||
ZONE_PADDING(_pad2_)
|
||||
/* Rarely used or read-mostly fields */
|
||||
|
||||
/*
|
||||
* wait_table -- the array holding the hash table
|
||||
* wait_table_hash_nr_entries -- the size of the hash table array
|
||||
* wait_table_bits -- wait_table_size == (1 << wait_table_bits)
|
||||
*
|
||||
* The purpose of all these is to keep track of the people
|
||||
* waiting for a page to become available and make them
|
||||
* runnable again when possible. The trouble is that this
|
||||
* consumes a lot of space, especially when so few things
|
||||
* wait on pages at a given time. So instead of using
|
||||
* per-page waitqueues, we use a waitqueue hash table.
|
||||
*
|
||||
* The bucket discipline is to sleep on the same queue when
|
||||
* colliding and wake all in that wait queue when removing.
|
||||
* When something wakes, it must check to be sure its page is
|
||||
* truly available, a la thundering herd. The cost of a
|
||||
* collision is great, but given the expected load of the
|
||||
* table, they should be so rare as to be outweighed by the
|
||||
* benefits from the saved space.
|
||||
*
|
||||
* __wait_on_page_locked() and unlock_page() in mm/filemap.c, are the
|
||||
* primary users of these fields, and in mm/page_alloc.c
|
||||
* free_area_init_core() performs the initialization of them.
|
||||
*/
|
||||
wait_queue_head_t * wait_table;
|
||||
unsigned long wait_table_hash_nr_entries;
|
||||
unsigned long wait_table_bits;
|
||||
|
||||
/*
|
||||
* Discontig memory support fields.
|
||||
*/
|
||||
struct pglist_data *zone_pgdat;
|
||||
/* zone_start_pfn == zone_start_paddr >> PAGE_SHIFT */
|
||||
unsigned long zone_start_pfn;
|
||||
|
||||
|
|
@ -500,9 +419,11 @@ struct zone {
|
|||
* adjust_managed_page_count() should be used instead of directly
|
||||
* touching zone->managed_pages and totalram_pages.
|
||||
*/
|
||||
unsigned long managed_pages;
|
||||
unsigned long spanned_pages;
|
||||
unsigned long present_pages;
|
||||
unsigned long managed_pages;
|
||||
|
||||
const char *name;
|
||||
|
||||
/*
|
||||
* Number of MIGRATE_RESEVE page block. To maintain for just
|
||||
|
|
@ -510,10 +431,94 @@ struct zone {
|
|||
*/
|
||||
int nr_migrate_reserve_block;
|
||||
|
||||
#ifdef CONFIG_MEMORY_HOTPLUG
|
||||
/* see spanned/present_pages for more description */
|
||||
seqlock_t span_seqlock;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* rarely used fields:
|
||||
* wait_table -- the array holding the hash table
|
||||
* wait_table_hash_nr_entries -- the size of the hash table array
|
||||
* wait_table_bits -- wait_table_size == (1 << wait_table_bits)
|
||||
*
|
||||
* The purpose of all these is to keep track of the people
|
||||
* waiting for a page to become available and make them
|
||||
* runnable again when possible. The trouble is that this
|
||||
* consumes a lot of space, especially when so few things
|
||||
* wait on pages at a given time. So instead of using
|
||||
* per-page waitqueues, we use a waitqueue hash table.
|
||||
*
|
||||
* The bucket discipline is to sleep on the same queue when
|
||||
* colliding and wake all in that wait queue when removing.
|
||||
* When something wakes, it must check to be sure its page is
|
||||
* truly available, a la thundering herd. The cost of a
|
||||
* collision is great, but given the expected load of the
|
||||
* table, they should be so rare as to be outweighed by the
|
||||
* benefits from the saved space.
|
||||
*
|
||||
* __wait_on_page_locked() and unlock_page() in mm/filemap.c, are the
|
||||
* primary users of these fields, and in mm/page_alloc.c
|
||||
* free_area_init_core() performs the initialization of them.
|
||||
*/
|
||||
const char *name;
|
||||
wait_queue_head_t *wait_table;
|
||||
unsigned long wait_table_hash_nr_entries;
|
||||
unsigned long wait_table_bits;
|
||||
|
||||
ZONE_PADDING(_pad1_)
|
||||
|
||||
/* Write-intensive fields used from the page allocator */
|
||||
spinlock_t lock;
|
||||
|
||||
/* free areas of different sizes */
|
||||
struct free_area free_area[MAX_ORDER];
|
||||
|
||||
/* zone flags, see below */
|
||||
unsigned long flags;
|
||||
|
||||
ZONE_PADDING(_pad2_)
|
||||
|
||||
/* Write-intensive fields used by page reclaim */
|
||||
|
||||
/* Fields commonly accessed by the page reclaim scanner */
|
||||
spinlock_t lru_lock;
|
||||
struct lruvec lruvec;
|
||||
|
||||
/* Evictions & activations on the inactive file list */
|
||||
atomic_long_t inactive_age;
|
||||
|
||||
/*
|
||||
* When free pages are below this point, additional steps are taken
|
||||
* when reading the number of free pages to avoid per-cpu counter
|
||||
* drift allowing watermarks to be breached
|
||||
*/
|
||||
unsigned long percpu_drift_mark;
|
||||
|
||||
#if defined CONFIG_COMPACTION || defined CONFIG_CMA
|
||||
/* pfn where compaction free scanner should start */
|
||||
unsigned long compact_cached_free_pfn;
|
||||
/* pfn where async and sync compaction migration scanner should start */
|
||||
unsigned long compact_cached_migrate_pfn[2];
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_COMPACTION
|
||||
/*
|
||||
* On compaction failure, 1<<compact_defer_shift compactions
|
||||
* are skipped before trying again. The number attempted since
|
||||
* last failure is tracked with compact_considered.
|
||||
*/
|
||||
unsigned int compact_considered;
|
||||
unsigned int compact_defer_shift;
|
||||
int compact_order_failed;
|
||||
#endif
|
||||
|
||||
#if defined CONFIG_COMPACTION || defined CONFIG_CMA
|
||||
/* Set to true when the PG_migrate_skip bits should be cleared */
|
||||
bool compact_blockskip_flush;
|
||||
#endif
|
||||
|
||||
ZONE_PADDING(_pad3_)
|
||||
/* Zone statistics */
|
||||
atomic_long_t vm_stat[NR_VM_ZONE_STAT_ITEMS];
|
||||
} ____cacheline_internodealigned_in_smp;
|
||||
|
||||
typedef enum {
|
||||
|
|
@ -529,6 +534,7 @@ typedef enum {
|
|||
ZONE_WRITEBACK, /* reclaim scanning has recently found
|
||||
* many pages under writeback
|
||||
*/
|
||||
ZONE_FAIR_DEPLETED, /* fair zone policy batch depleted */
|
||||
} zone_flags_t;
|
||||
|
||||
static inline void zone_set_flag(struct zone *zone, zone_flags_t flag)
|
||||
|
|
@ -566,6 +572,11 @@ static inline int zone_is_reclaim_locked(const struct zone *zone)
|
|||
return test_bit(ZONE_RECLAIM_LOCKED, &zone->flags);
|
||||
}
|
||||
|
||||
static inline int zone_is_fair_depleted(const struct zone *zone)
|
||||
{
|
||||
return test_bit(ZONE_FAIR_DEPLETED, &zone->flags);
|
||||
}
|
||||
|
||||
static inline int zone_is_oom_locked(const struct zone *zone)
|
||||
{
|
||||
return test_bit(ZONE_OOM_LOCKED, &zone->flags);
|
||||
|
|
@ -872,6 +883,8 @@ static inline int zone_movable_is_highmem(void)
|
|||
{
|
||||
#if defined(CONFIG_HIGHMEM) && defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP)
|
||||
return movable_zone == ZONE_HIGHMEM;
|
||||
#elif defined(CONFIG_HIGHMEM)
|
||||
return (ZONE_MOVABLE - 1) == ZONE_HIGHMEM;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -396,18 +396,25 @@ bool is_module_address(unsigned long addr);
|
|||
bool is_module_percpu_address(unsigned long addr);
|
||||
bool is_module_text_address(unsigned long addr);
|
||||
|
||||
static inline int within_module_core(unsigned long addr, const struct module *mod)
|
||||
static inline bool within_module_core(unsigned long addr,
|
||||
const struct module *mod)
|
||||
{
|
||||
return (unsigned long)mod->module_core <= addr &&
|
||||
addr < (unsigned long)mod->module_core + mod->core_size;
|
||||
}
|
||||
|
||||
static inline int within_module_init(unsigned long addr, const struct module *mod)
|
||||
static inline bool within_module_init(unsigned long addr,
|
||||
const struct module *mod)
|
||||
{
|
||||
return (unsigned long)mod->module_init <= addr &&
|
||||
addr < (unsigned long)mod->module_init + mod->init_size;
|
||||
}
|
||||
|
||||
static inline bool within_module(unsigned long addr, const struct module *mod)
|
||||
{
|
||||
return within_module_init(addr, mod) || within_module_core(addr, mod);
|
||||
}
|
||||
|
||||
/* Search for module by name: must hold module_mutex. */
|
||||
struct module *find_module(const char *name);
|
||||
|
||||
|
|
|
|||
|
|
@ -45,7 +45,8 @@ static inline int apply_relocate(Elf_Shdr *sechdrs,
|
|||
unsigned int relsec,
|
||||
struct module *me)
|
||||
{
|
||||
printk(KERN_ERR "module %s: REL relocation unsupported\n", me->name);
|
||||
printk(KERN_ERR "module %s: REL relocation unsupported\n",
|
||||
module_name(me));
|
||||
return -ENOEXEC;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -67,7 +68,8 @@ static inline int apply_relocate_add(Elf_Shdr *sechdrs,
|
|||
unsigned int relsec,
|
||||
struct module *me)
|
||||
{
|
||||
printk(KERN_ERR "module %s: REL relocation unsupported\n", me->name);
|
||||
printk(KERN_ERR "module %s: REL relocation unsupported\n",
|
||||
module_name(me));
|
||||
return -ENOEXEC;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -42,13 +42,20 @@ struct mnt_namespace;
|
|||
* flag, consider how it interacts with shared mounts.
|
||||
*/
|
||||
#define MNT_SHARED_MASK (MNT_UNBINDABLE)
|
||||
#define MNT_PROPAGATION_MASK (MNT_SHARED | MNT_UNBINDABLE)
|
||||
#define MNT_USER_SETTABLE_MASK (MNT_NOSUID | MNT_NODEV | MNT_NOEXEC \
|
||||
| MNT_NOATIME | MNT_NODIRATIME | MNT_RELATIME \
|
||||
| MNT_READONLY)
|
||||
#define MNT_ATIME_MASK (MNT_NOATIME | MNT_NODIRATIME | MNT_RELATIME )
|
||||
|
||||
#define MNT_INTERNAL_FLAGS (MNT_SHARED | MNT_WRITE_HOLD | MNT_INTERNAL | \
|
||||
MNT_DOOMED | MNT_SYNC_UMOUNT | MNT_MARKED)
|
||||
|
||||
#define MNT_INTERNAL 0x4000
|
||||
|
||||
#define MNT_LOCK_ATIME 0x040000
|
||||
#define MNT_LOCK_NOEXEC 0x080000
|
||||
#define MNT_LOCK_NOSUID 0x100000
|
||||
#define MNT_LOCK_NODEV 0x200000
|
||||
#define MNT_LOCK_READONLY 0x400000
|
||||
#define MNT_LOCKED 0x800000
|
||||
#define MNT_DOOMED 0x1000000
|
||||
|
|
@ -62,6 +69,7 @@ struct vfsmount {
|
|||
};
|
||||
|
||||
struct file; /* forward dec */
|
||||
struct path;
|
||||
|
||||
extern int mnt_want_write(struct vfsmount *mnt);
|
||||
extern int mnt_want_write_file(struct file *file);
|
||||
|
|
@ -70,8 +78,7 @@ extern void mnt_drop_write(struct vfsmount *mnt);
|
|||
extern void mnt_drop_write_file(struct file *file);
|
||||
extern void mntput(struct vfsmount *mnt);
|
||||
extern struct vfsmount *mntget(struct vfsmount *mnt);
|
||||
extern void mnt_pin(struct vfsmount *mnt);
|
||||
extern void mnt_unpin(struct vfsmount *mnt);
|
||||
extern struct vfsmount *mnt_clone_internal(struct path *path);
|
||||
extern int __mnt_is_readonly(struct vfsmount *mnt);
|
||||
|
||||
struct file_system_type;
|
||||
|
|
|
|||
|
|
@ -222,6 +222,7 @@ struct mtd_info {
|
|||
int (*_lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
int (*_unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
int (*_is_locked) (struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
int (*_block_isreserved) (struct mtd_info *mtd, loff_t ofs);
|
||||
int (*_block_isbad) (struct mtd_info *mtd, loff_t ofs);
|
||||
int (*_block_markbad) (struct mtd_info *mtd, loff_t ofs);
|
||||
int (*_suspend) (struct mtd_info *mtd);
|
||||
|
|
@ -302,6 +303,7 @@ static inline void mtd_sync(struct mtd_info *mtd)
|
|||
int mtd_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
int mtd_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
int mtd_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
int mtd_block_isreserved(struct mtd_info *mtd, loff_t ofs);
|
||||
int mtd_block_isbad(struct mtd_info *mtd, loff_t ofs);
|
||||
int mtd_block_markbad(struct mtd_info *mtd, loff_t ofs);
|
||||
|
||||
|
|
|
|||
|
|
@ -810,6 +810,7 @@ extern struct nand_manufacturers nand_manuf_ids[];
|
|||
extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
|
||||
extern int nand_default_bbt(struct mtd_info *mtd);
|
||||
extern int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs);
|
||||
extern int nand_isreserved_bbt(struct mtd_info *mtd, loff_t offs);
|
||||
extern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt);
|
||||
extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
|
||||
int allowbbt);
|
||||
|
|
@ -947,4 +948,56 @@ static inline int jedec_feature(struct nand_chip *chip)
|
|||
return chip->jedec_version ? le16_to_cpu(chip->jedec_params.features)
|
||||
: 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* struct nand_sdr_timings - SDR NAND chip timings
|
||||
*
|
||||
* This struct defines the timing requirements of a SDR NAND chip.
|
||||
* These informations can be found in every NAND datasheets and the timings
|
||||
* meaning are described in the ONFI specifications:
|
||||
* www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
|
||||
* Parameters)
|
||||
*
|
||||
* All these timings are expressed in picoseconds.
|
||||
*/
|
||||
|
||||
struct nand_sdr_timings {
|
||||
u32 tALH_min;
|
||||
u32 tADL_min;
|
||||
u32 tALS_min;
|
||||
u32 tAR_min;
|
||||
u32 tCEA_max;
|
||||
u32 tCEH_min;
|
||||
u32 tCH_min;
|
||||
u32 tCHZ_max;
|
||||
u32 tCLH_min;
|
||||
u32 tCLR_min;
|
||||
u32 tCLS_min;
|
||||
u32 tCOH_min;
|
||||
u32 tCS_min;
|
||||
u32 tDH_min;
|
||||
u32 tDS_min;
|
||||
u32 tFEAT_max;
|
||||
u32 tIR_min;
|
||||
u32 tITC_max;
|
||||
u32 tRC_min;
|
||||
u32 tREA_max;
|
||||
u32 tREH_min;
|
||||
u32 tRHOH_min;
|
||||
u32 tRHW_min;
|
||||
u32 tRHZ_max;
|
||||
u32 tRLOH_min;
|
||||
u32 tRP_min;
|
||||
u32 tRR_min;
|
||||
u64 tRST_max;
|
||||
u32 tWB_max;
|
||||
u32 tWC_min;
|
||||
u32 tWH_min;
|
||||
u32 tWHR_min;
|
||||
u32 tWP_min;
|
||||
u32 tWW_min;
|
||||
};
|
||||
|
||||
/* get timing characteristics from ONFI timing mode. */
|
||||
const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode);
|
||||
#endif /* __LINUX_MTD_NAND_H */
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
#define SPINOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */
|
||||
#define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */
|
||||
#define SPINOR_OP_RDCR 0x35 /* Read configuration register */
|
||||
#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */
|
||||
|
||||
/* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
|
||||
#define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */
|
||||
|
|
@ -66,6 +67,9 @@
|
|||
|
||||
#define SR_QUAD_EN_MX 0x40 /* Macronix Quad I/O */
|
||||
|
||||
/* Flag Status Register bits */
|
||||
#define FSR_READY 0x80
|
||||
|
||||
/* Configuration Register bits. */
|
||||
#define CR_QUAD_EN_SPAN 0x2 /* Spansion Quad I/O */
|
||||
|
||||
|
|
|
|||
20
include/linux/mvebu-pmsu.h
Normal file
20
include/linux/mvebu-pmsu.h
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Marvell
|
||||
*
|
||||
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#ifndef __MVEBU_PMSU_H__
|
||||
#define __MVEBU_PMSU_H__
|
||||
|
||||
#ifdef CONFIG_MACH_MVEBU_V7
|
||||
int mvebu_pmsu_dfs_request(int cpu);
|
||||
#else
|
||||
static inline int mvebu_pmsu_dfs_request(int cpu) { return -ENODEV; }
|
||||
#endif
|
||||
|
||||
#endif /* __MVEBU_PMSU_H__ */
|
||||
|
|
@ -52,6 +52,7 @@ struct nfs_access_entry {
|
|||
unsigned long jiffies;
|
||||
struct rpc_cred * cred;
|
||||
int mask;
|
||||
struct rcu_head rcu_head;
|
||||
};
|
||||
|
||||
struct nfs_lockowner {
|
||||
|
|
@ -352,6 +353,7 @@ extern int nfs_release(struct inode *, struct file *);
|
|||
extern int nfs_attribute_timeout(struct inode *inode);
|
||||
extern int nfs_attribute_cache_expired(struct inode *inode);
|
||||
extern int nfs_revalidate_inode(struct nfs_server *server, struct inode *inode);
|
||||
extern int nfs_revalidate_inode_rcu(struct nfs_server *server, struct inode *inode);
|
||||
extern int __nfs_revalidate_inode(struct nfs_server *, struct inode *);
|
||||
extern int nfs_revalidate_mapping(struct inode *inode, struct address_space *mapping);
|
||||
extern int nfs_setattr(struct dentry *, struct iattr *);
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@ struct nfs_client {
|
|||
struct sockaddr_storage cl_addr; /* server identifier */
|
||||
size_t cl_addrlen;
|
||||
char * cl_hostname; /* hostname of server */
|
||||
char * cl_acceptor; /* GSSAPI acceptor name */
|
||||
struct list_head cl_share_link; /* link in global client list */
|
||||
struct list_head cl_superblocks; /* List of nfs_server structs */
|
||||
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ enum {
|
|||
PG_MAPPED, /* page private set for buffered io */
|
||||
PG_CLEAN, /* write succeeded */
|
||||
PG_COMMIT_TO_DS, /* used by pnfs layouts */
|
||||
PG_INODE_REF, /* extra ref held by inode (head req only) */
|
||||
PG_INODE_REF, /* extra ref held by inode when in writeback */
|
||||
PG_HEADLOCK, /* page group lock of wb_head */
|
||||
PG_TEARDOWN, /* page group sync for destroy */
|
||||
PG_UNLOCKPAGE, /* page group sync bit in read path */
|
||||
|
|
@ -62,12 +62,13 @@ struct nfs_pageio_ops {
|
|||
|
||||
struct nfs_rw_ops {
|
||||
const fmode_t rw_mode;
|
||||
struct nfs_rw_header *(*rw_alloc_header)(void);
|
||||
void (*rw_free_header)(struct nfs_rw_header *);
|
||||
void (*rw_release)(struct nfs_pgio_data *);
|
||||
int (*rw_done)(struct rpc_task *, struct nfs_pgio_data *, struct inode *);
|
||||
void (*rw_result)(struct rpc_task *, struct nfs_pgio_data *);
|
||||
void (*rw_initiate)(struct nfs_pgio_data *, struct rpc_message *,
|
||||
struct nfs_pgio_header *(*rw_alloc_header)(void);
|
||||
void (*rw_free_header)(struct nfs_pgio_header *);
|
||||
void (*rw_release)(struct nfs_pgio_header *);
|
||||
int (*rw_done)(struct rpc_task *, struct nfs_pgio_header *,
|
||||
struct inode *);
|
||||
void (*rw_result)(struct rpc_task *, struct nfs_pgio_header *);
|
||||
void (*rw_initiate)(struct nfs_pgio_header *, struct rpc_message *,
|
||||
struct rpc_task_setup *, int);
|
||||
};
|
||||
|
||||
|
|
@ -111,6 +112,8 @@ extern void nfs_pageio_init(struct nfs_pageio_descriptor *desc,
|
|||
int how);
|
||||
extern int nfs_pageio_add_request(struct nfs_pageio_descriptor *,
|
||||
struct nfs_page *);
|
||||
extern int nfs_pageio_resend(struct nfs_pageio_descriptor *,
|
||||
struct nfs_pgio_header *);
|
||||
extern void nfs_pageio_complete(struct nfs_pageio_descriptor *desc);
|
||||
extern void nfs_pageio_cond_complete(struct nfs_pageio_descriptor *, pgoff_t);
|
||||
extern size_t nfs_generic_pg_test(struct nfs_pageio_descriptor *desc,
|
||||
|
|
@ -119,7 +122,8 @@ extern size_t nfs_generic_pg_test(struct nfs_pageio_descriptor *desc,
|
|||
extern int nfs_wait_on_request(struct nfs_page *);
|
||||
extern void nfs_unlock_request(struct nfs_page *req);
|
||||
extern void nfs_unlock_and_release_request(struct nfs_page *);
|
||||
extern void nfs_page_group_lock(struct nfs_page *);
|
||||
extern int nfs_page_group_lock(struct nfs_page *, bool);
|
||||
extern void nfs_page_group_lock_wait(struct nfs_page *);
|
||||
extern void nfs_page_group_unlock(struct nfs_page *);
|
||||
extern bool nfs_page_group_sync_on_bit(struct nfs_page *, unsigned int);
|
||||
|
||||
|
|
|
|||
|
|
@ -993,6 +993,7 @@ struct nfs4_setclientid {
|
|||
unsigned int sc_uaddr_len;
|
||||
char sc_uaddr[RPCBIND_MAXUADDRLEN + 1];
|
||||
u32 sc_cb_ident;
|
||||
struct rpc_cred *sc_cred;
|
||||
};
|
||||
|
||||
struct nfs4_setclientid_res {
|
||||
|
|
@ -1253,18 +1254,12 @@ enum {
|
|||
NFS_IOHDR_ERROR = 0,
|
||||
NFS_IOHDR_EOF,
|
||||
NFS_IOHDR_REDO,
|
||||
NFS_IOHDR_NEED_COMMIT,
|
||||
NFS_IOHDR_NEED_RESCHED,
|
||||
};
|
||||
|
||||
struct nfs_pgio_data;
|
||||
|
||||
struct nfs_pgio_header {
|
||||
struct inode *inode;
|
||||
struct rpc_cred *cred;
|
||||
struct list_head pages;
|
||||
struct nfs_pgio_data *data;
|
||||
atomic_t refcnt;
|
||||
struct nfs_page *req;
|
||||
struct nfs_writeverf verf; /* Used for writes */
|
||||
struct pnfs_layout_segment *lseg;
|
||||
|
|
@ -1281,28 +1276,22 @@ struct nfs_pgio_header {
|
|||
int error; /* merge with pnfs_error */
|
||||
unsigned long good_bytes; /* boundary of good data */
|
||||
unsigned long flags;
|
||||
};
|
||||
|
||||
struct nfs_pgio_data {
|
||||
struct nfs_pgio_header *header;
|
||||
/*
|
||||
* rpc data
|
||||
*/
|
||||
struct rpc_task task;
|
||||
struct nfs_fattr fattr;
|
||||
struct nfs_writeverf verf; /* Used for writes */
|
||||
struct nfs_pgio_args args; /* argument struct */
|
||||
struct nfs_pgio_res res; /* result struct */
|
||||
unsigned long timestamp; /* For lease renewal */
|
||||
int (*pgio_done_cb) (struct rpc_task *task, struct nfs_pgio_data *data);
|
||||
int (*pgio_done_cb)(struct rpc_task *, struct nfs_pgio_header *);
|
||||
__u64 mds_offset; /* Filelayout dense stripe */
|
||||
struct nfs_page_array pages;
|
||||
struct nfs_page_array page_array;
|
||||
struct nfs_client *ds_clp; /* pNFS data server */
|
||||
int ds_idx; /* ds index if ds_clp is set */
|
||||
};
|
||||
|
||||
struct nfs_rw_header {
|
||||
struct nfs_pgio_header header;
|
||||
struct nfs_pgio_data rpc_data;
|
||||
};
|
||||
|
||||
struct nfs_mds_commit_info {
|
||||
atomic_t rpcs_out;
|
||||
unsigned long ncommit;
|
||||
|
|
@ -1432,11 +1421,12 @@ struct nfs_rpc_ops {
|
|||
struct nfs_pathconf *);
|
||||
int (*set_capabilities)(struct nfs_server *, struct nfs_fh *);
|
||||
int (*decode_dirent)(struct xdr_stream *, struct nfs_entry *, int);
|
||||
int (*pgio_rpc_prepare)(struct rpc_task *, struct nfs_pgio_data *);
|
||||
void (*read_setup) (struct nfs_pgio_data *, struct rpc_message *);
|
||||
int (*read_done) (struct rpc_task *, struct nfs_pgio_data *);
|
||||
void (*write_setup) (struct nfs_pgio_data *, struct rpc_message *);
|
||||
int (*write_done) (struct rpc_task *, struct nfs_pgio_data *);
|
||||
int (*pgio_rpc_prepare)(struct rpc_task *,
|
||||
struct nfs_pgio_header *);
|
||||
void (*read_setup)(struct nfs_pgio_header *, struct rpc_message *);
|
||||
int (*read_done)(struct rpc_task *, struct nfs_pgio_header *);
|
||||
void (*write_setup)(struct nfs_pgio_header *, struct rpc_message *);
|
||||
int (*write_done)(struct rpc_task *, struct nfs_pgio_header *);
|
||||
void (*commit_setup) (struct nfs_commit_data *, struct rpc_message *);
|
||||
void (*commit_rpc_prepare)(struct rpc_task *, struct nfs_commit_data *);
|
||||
int (*commit_done) (struct rpc_task *, struct nfs_commit_data *);
|
||||
|
|
|
|||
|
|
@ -430,7 +430,15 @@ static inline int num_node_state(enum node_states state)
|
|||
for_each_node_mask((__node), node_states[__state])
|
||||
|
||||
#define first_online_node first_node(node_states[N_ONLINE])
|
||||
#define next_online_node(nid) next_node((nid), node_states[N_ONLINE])
|
||||
#define first_memory_node first_node(node_states[N_MEMORY])
|
||||
static inline int next_online_node(int nid)
|
||||
{
|
||||
return next_node(nid, node_states[N_ONLINE]);
|
||||
}
|
||||
static inline int next_memory_node(int nid)
|
||||
{
|
||||
return next_node(nid, node_states[N_MEMORY]);
|
||||
}
|
||||
|
||||
extern int nr_node_ids;
|
||||
extern int nr_online_nodes;
|
||||
|
|
@ -471,6 +479,7 @@ static inline int num_node_state(enum node_states state)
|
|||
for ( (node) = 0; (node) == 0; (node) = 1)
|
||||
|
||||
#define first_online_node 0
|
||||
#define first_memory_node 0
|
||||
#define next_online_node(nid) (MAX_NUMNODES)
|
||||
#define nr_node_ids 1
|
||||
#define nr_online_nodes 1
|
||||
|
|
|
|||
|
|
@ -40,32 +40,28 @@ extern struct nsproxy init_nsproxy;
|
|||
* the namespaces access rules are:
|
||||
*
|
||||
* 1. only current task is allowed to change tsk->nsproxy pointer or
|
||||
* any pointer on the nsproxy itself
|
||||
* any pointer on the nsproxy itself. Current must hold the task_lock
|
||||
* when changing tsk->nsproxy.
|
||||
*
|
||||
* 2. when accessing (i.e. reading) current task's namespaces - no
|
||||
* precautions should be taken - just dereference the pointers
|
||||
*
|
||||
* 3. the access to other task namespaces is performed like this
|
||||
* rcu_read_lock();
|
||||
* nsproxy = task_nsproxy(tsk);
|
||||
* task_lock(task);
|
||||
* nsproxy = task->nsproxy;
|
||||
* if (nsproxy != NULL) {
|
||||
* / *
|
||||
* * work with the namespaces here
|
||||
* * e.g. get the reference on one of them
|
||||
* * /
|
||||
* } / *
|
||||
* * NULL task_nsproxy() means that this task is
|
||||
* * NULL task->nsproxy means that this task is
|
||||
* * almost dead (zombie)
|
||||
* * /
|
||||
* rcu_read_unlock();
|
||||
* task_unlock(task);
|
||||
*
|
||||
*/
|
||||
|
||||
static inline struct nsproxy *task_nsproxy(struct task_struct *tsk)
|
||||
{
|
||||
return rcu_dereference(tsk->nsproxy);
|
||||
}
|
||||
|
||||
int copy_namespaces(unsigned long flags, struct task_struct *tsk);
|
||||
void exit_task_namespaces(struct task_struct *tsk);
|
||||
void switch_task_namespaces(struct task_struct *tsk, struct nsproxy *new);
|
||||
|
|
|
|||
|
|
@ -74,8 +74,6 @@ struct of_phandle_args {
|
|||
uint32_t args[MAX_PHANDLE_ARGS];
|
||||
};
|
||||
|
||||
extern int of_node_add(struct device_node *node);
|
||||
|
||||
/* initialize a node */
|
||||
extern struct kobj_type of_node_ktype;
|
||||
static inline void of_node_init(struct device_node *node)
|
||||
|
|
@ -113,6 +111,7 @@ static inline void of_node_put(struct device_node *node) { }
|
|||
extern struct device_node *of_allnodes;
|
||||
extern struct device_node *of_chosen;
|
||||
extern struct device_node *of_aliases;
|
||||
extern struct device_node *of_stdout;
|
||||
extern raw_spinlock_t devtree_lock;
|
||||
|
||||
static inline bool of_have_populated_dt(void)
|
||||
|
|
@ -204,6 +203,7 @@ static inline unsigned long of_read_ulong(const __be32 *cell, int size)
|
|||
#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */
|
||||
#define OF_DETACHED 2 /* node has been detached from the device tree */
|
||||
#define OF_POPULATED 3 /* device already created for the node */
|
||||
#define OF_POPULATED_BUS 4 /* of_platform_populate recursed to children of this node */
|
||||
|
||||
#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
|
||||
#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
|
||||
|
|
@ -322,6 +322,7 @@ extern int of_update_property(struct device_node *np, struct property *newprop);
|
|||
struct of_prop_reconfig {
|
||||
struct device_node *dn;
|
||||
struct property *prop;
|
||||
struct property *old_prop;
|
||||
};
|
||||
|
||||
extern int of_reconfig_notifier_register(struct notifier_block *);
|
||||
|
|
@ -352,7 +353,7 @@ const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur,
|
|||
*/
|
||||
const char *of_prop_next_string(struct property *prop, const char *cur);
|
||||
|
||||
int of_device_is_stdout_path(struct device_node *dn);
|
||||
bool of_console_check(struct device_node *dn, char *name, int index);
|
||||
|
||||
#else /* CONFIG_OF */
|
||||
|
||||
|
|
@ -564,9 +565,9 @@ static inline int of_machine_is_compatible(const char *compat)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static inline int of_device_is_stdout_path(struct device_node *dn)
|
||||
static inline bool of_console_check(const struct device_node *dn, const char *name, int index)
|
||||
{
|
||||
return 0;
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline const __be32 *of_prop_next_u32(struct property *prop,
|
||||
|
|
@ -786,4 +787,80 @@ typedef void (*of_init_fn_1)(struct device_node *);
|
|||
#define OF_DECLARE_2(table, name, compat, fn) \
|
||||
_OF_DECLARE(table, name, compat, fn, of_init_fn_2)
|
||||
|
||||
/**
|
||||
* struct of_changeset_entry - Holds a changeset entry
|
||||
*
|
||||
* @node: list_head for the log list
|
||||
* @action: notifier action
|
||||
* @np: pointer to the device node affected
|
||||
* @prop: pointer to the property affected
|
||||
* @old_prop: hold a pointer to the original property
|
||||
*
|
||||
* Every modification of the device tree during a changeset
|
||||
* is held in a list of of_changeset_entry structures.
|
||||
* That way we can recover from a partial application, or we can
|
||||
* revert the changeset
|
||||
*/
|
||||
struct of_changeset_entry {
|
||||
struct list_head node;
|
||||
unsigned long action;
|
||||
struct device_node *np;
|
||||
struct property *prop;
|
||||
struct property *old_prop;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct of_changeset - changeset tracker structure
|
||||
*
|
||||
* @entries: list_head for the changeset entries
|
||||
*
|
||||
* changesets are a convenient way to apply bulk changes to the
|
||||
* live tree. In case of an error, changes are rolled-back.
|
||||
* changesets live on after initial application, and if not
|
||||
* destroyed after use, they can be reverted in one single call.
|
||||
*/
|
||||
struct of_changeset {
|
||||
struct list_head entries;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OF_DYNAMIC
|
||||
extern void of_changeset_init(struct of_changeset *ocs);
|
||||
extern void of_changeset_destroy(struct of_changeset *ocs);
|
||||
extern int of_changeset_apply(struct of_changeset *ocs);
|
||||
extern int of_changeset_revert(struct of_changeset *ocs);
|
||||
extern int of_changeset_action(struct of_changeset *ocs,
|
||||
unsigned long action, struct device_node *np,
|
||||
struct property *prop);
|
||||
|
||||
static inline int of_changeset_attach_node(struct of_changeset *ocs,
|
||||
struct device_node *np)
|
||||
{
|
||||
return of_changeset_action(ocs, OF_RECONFIG_ATTACH_NODE, np, NULL);
|
||||
}
|
||||
|
||||
static inline int of_changeset_detach_node(struct of_changeset *ocs,
|
||||
struct device_node *np)
|
||||
{
|
||||
return of_changeset_action(ocs, OF_RECONFIG_DETACH_NODE, np, NULL);
|
||||
}
|
||||
|
||||
static inline int of_changeset_add_property(struct of_changeset *ocs,
|
||||
struct device_node *np, struct property *prop)
|
||||
{
|
||||
return of_changeset_action(ocs, OF_RECONFIG_ADD_PROPERTY, np, prop);
|
||||
}
|
||||
|
||||
static inline int of_changeset_remove_property(struct of_changeset *ocs,
|
||||
struct device_node *np, struct property *prop)
|
||||
{
|
||||
return of_changeset_action(ocs, OF_RECONFIG_REMOVE_PROPERTY, np, prop);
|
||||
}
|
||||
|
||||
static inline int of_changeset_update_property(struct of_changeset *ocs,
|
||||
struct device_node *np, struct property *prop)
|
||||
{
|
||||
return of_changeset_action(ocs, OF_RECONFIG_UPDATE_PROPERTY, np, prop);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _LINUX_OF_H */
|
||||
|
|
|
|||
|
|
@ -41,6 +41,8 @@ extern struct dma_chan *of_dma_request_slave_channel(struct device_node *np,
|
|||
const char *name);
|
||||
extern struct dma_chan *of_dma_simple_xlate(struct of_phandle_args *dma_spec,
|
||||
struct of_dma *ofdma);
|
||||
extern struct dma_chan *of_dma_xlate_by_chan_id(struct of_phandle_args *dma_spec,
|
||||
struct of_dma *ofdma);
|
||||
#else
|
||||
static inline int of_dma_controller_register(struct device_node *np,
|
||||
struct dma_chan *(*of_dma_xlate)
|
||||
|
|
@ -66,6 +68,8 @@ static inline struct dma_chan *of_dma_simple_xlate(struct of_phandle_args *dma_s
|
|||
return NULL;
|
||||
}
|
||||
|
||||
#define of_dma_xlate_by_chan_id NULL
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __LINUX_OF_DMA_H */
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Add a link
Reference in a new issue