A somewhat bigger ARM update, and the usual smattering
of x86 bug fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJcaQI4AAoJEL/70l94x66DOPwH/0d7JDl2Qr3+1B20hv2++35C RyG8bMayJq0AATRcjuaFXKiKikZ3NyMHHxaLRwhtcZggU+2FlykEwIKIHvv3L9bj Rs/YNtIRI21qDSFtOmKnAYnSm10QkngJw7sd5ExHnMTiuCoca3f8EjKnatFgMlzv UMdMTe9UaMGAl9IKveW56xneR1MDYFG8x69Uu9Si7LkIdMgEAstuJGcTQAt9TzO/ AvbckcN9MKfVCjwvnzsTMaKQMttSHHpOh50gaLlAzPubqfVaqTkSmCvN22+UAk/H t248x3bHOCO1u1HdHC/sxf8z6HIOFD692eBRmrm5LjBsUFdktUPj7q0U8r9MEK4= =oHHm -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM fixes from Paolo Bonzini: "A somewhat bigger ARM update, and the usual smattering of x86 bug fixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: kvm: vmx: Fix entry number check for add_atomic_switch_msr() KVM: x86: Recompute PID.ON when clearing PID.SN KVM: nVMX: Restore a preemption timer consistency check x86/kvm/nVMX: read from MSR_IA32_VMX_PROCBASED_CTLS2 only when it is available KVM: arm64: Forbid kprobing of the VHE world-switch code KVM: arm64: Relax the restriction on using stage2 PUD huge mapping arm: KVM: Add missing kvm_stage2_has_pmd() helper KVM: arm/arm64: vgic: Always initialize the group of private IRQs arm/arm64: KVM: Don't panic on failure to properly reset system registers arm/arm64: KVM: Allow a VCPU to fully reset itself KVM: arm/arm64: Reset the VCPU without preemption and vcpu state loaded arm64: KVM: Don't generate UNDEF when LORegion feature is present KVM: arm/arm64: vgic: Make vgic_cpu->ap_list_lock a raw_spinlock KVM: arm/arm64: vgic: Make vgic_dist->lpi_list_lock a raw_spinlock KVM: arm/arm64: vgic: Make vgic_irq->irq_lock a raw_spinlock
This commit is contained in:
commit
ed0a0ec98f
26 changed files with 332 additions and 194 deletions
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@ -100,7 +100,7 @@ enum vgic_irq_config {
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};
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struct vgic_irq {
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spinlock_t irq_lock; /* Protects the content of the struct */
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raw_spinlock_t irq_lock; /* Protects the content of the struct */
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struct list_head lpi_list; /* Used to link all LPIs together */
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struct list_head ap_list;
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@ -256,7 +256,7 @@ struct vgic_dist {
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u64 propbaser;
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/* Protects the lpi_list and the count value below. */
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spinlock_t lpi_list_lock;
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raw_spinlock_t lpi_list_lock;
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struct list_head lpi_list_head;
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int lpi_list_count;
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@ -307,7 +307,7 @@ struct vgic_cpu {
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unsigned int used_lrs;
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struct vgic_irq private_irqs[VGIC_NR_PRIVATE_IRQS];
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spinlock_t ap_list_lock; /* Protects the ap_list */
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raw_spinlock_t ap_list_lock; /* Protects the ap_list */
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/*
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* List of IRQs that this VCPU should consider because they are either
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