ARM: SoC-related driver updates
Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Olof Johansson:
"Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
memory: tegra: Consolidate registers definition into common header
memory: tegra: Ensure timing control debug features are disabled
memory: tegra: Introduce Tegra30 EMC driver
memory: tegra: Do not handle error from wait_for_completion_timeout()
memory: tegra: Increase handshake timeout on Tegra20
memory: tegra: Print a brief info message about EMC timings
memory: tegra: Pre-configure debug register on Tegra20
memory: tegra: Include io.h instead of iopoll.h
memory: tegra: Adapt for Tegra20 clock driver changes
memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
memory: tegra: Set DMA mask based on supported address bits
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
soc: mediatek: Refactor bus protection control
soc: mediatek: Refactor sram control
...
This commit is contained in:
commit
ec939e4c94
133 changed files with 7617 additions and 945 deletions
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@ -109,7 +109,7 @@ obj-$(CONFIG_HAS_IOMEM) += iomap_copy.o devres.o
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obj-$(CONFIG_CHECK_SIGNATURE) += check_signature.o
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obj-$(CONFIG_DEBUG_LOCKING_API_SELFTESTS) += locking-selftest.o
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obj-y += logic_pio.o
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lib-y += logic_pio.o
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obj-$(CONFIG_GENERIC_HWEIGHT) += hweight.o
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@ -3,6 +3,7 @@
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* Copyright (C) 2017 HiSilicon Limited, All Rights Reserved.
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* Author: Gabriele Paoloni <gabriele.paoloni@huawei.com>
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* Author: Zhichang Yuan <yuanzhichang@hisilicon.com>
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* Author: John Garry <john.garry@huawei.com>
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*/
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#define pr_fmt(fmt) "LOGIC PIO: " fmt
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@ -39,7 +40,8 @@ int logic_pio_register_range(struct logic_pio_hwaddr *new_range)
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resource_size_t iio_sz = MMIO_UPPER_LIMIT;
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int ret = 0;
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if (!new_range || !new_range->fwnode || !new_range->size)
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if (!new_range || !new_range->fwnode || !new_range->size ||
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(new_range->flags == LOGIC_PIO_INDIRECT && !new_range->ops))
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return -EINVAL;
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start = new_range->hw_start;
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@ -237,7 +239,7 @@ type logic_in##bw(unsigned long addr) \
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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if (entry) \
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ret = entry->ops->in(entry->hostdata, \
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addr, sizeof(type)); \
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else \
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@ -253,7 +255,7 @@ void logic_out##bw(type value, unsigned long addr) \
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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if (entry) \
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entry->ops->out(entry->hostdata, \
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addr, value, sizeof(type)); \
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else \
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@ -261,7 +263,7 @@ void logic_out##bw(type value, unsigned long addr) \
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} \
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} \
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\
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void logic_ins##bw(unsigned long addr, void *buffer, \
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void logic_ins##bw(unsigned long addr, void *buffer, \
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unsigned int count) \
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{ \
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if (addr < MMIO_UPPER_LIMIT) { \
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@ -269,7 +271,7 @@ void logic_ins##bw(unsigned long addr, void *buffer, \
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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if (entry) \
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entry->ops->ins(entry->hostdata, \
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addr, buffer, sizeof(type), count); \
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else \
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@ -286,7 +288,7 @@ void logic_outs##bw(unsigned long addr, const void *buffer, \
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} else if (addr >= MMIO_UPPER_LIMIT && addr < IO_SPACE_LIMIT) { \
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struct logic_pio_hwaddr *entry = find_io_range(addr); \
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\
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if (entry && entry->ops) \
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if (entry) \
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entry->ops->outs(entry->hostdata, \
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addr, buffer, sizeof(type), count); \
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else \
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