clk: new basic clk type for fractional divider
Fractional divider clocks are fairly common. This adds basic type for them. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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3 changed files with 167 additions and 0 deletions
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@ -413,6 +413,37 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned int mult, unsigned int div);
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/**
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* struct clk_fractional_divider - adjustable fractional divider clock
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*
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* @hw: handle between common and hardware-specific interfaces
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* @reg: register containing the divider
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* @mshift: shift to the numerator bit field
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* @mwidth: width of the numerator bit field
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* @nshift: shift to the denominator bit field
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* @nwidth: width of the denominator bit field
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* @lock: register lock
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*
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* Clock with adjustable fractional divider affecting its output frequency.
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*/
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struct clk_fractional_divider {
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struct clk_hw hw;
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void __iomem *reg;
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u8 mshift;
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u32 mmask;
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u8 nshift;
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u32 nmask;
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u8 flags;
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spinlock_t *lock;
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};
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extern const struct clk_ops clk_fractional_divider_ops;
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struct clk *clk_register_fractional_divider(struct device *dev,
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const char *name, const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
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u8 clk_divider_flags, spinlock_t *lock);
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/***
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* struct clk_composite - aggregate clock of mux, divider and gate clocks
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*
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