spi: Updates for v5.1
A fairly quiet release for SPI, the biggest thing is the conversion to
use GPIO descriptors which is now 90% done but still needs some
stragglers converting.
- Support for inter-word delays.
- Conversion of the core and most drivers to use GPIO descriptors for
GPIO controlled chip selects.
- New drivers for NXP FlexSPI and QuadSPI, SiFive and Spreadtrum.
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Merge tag 'spi-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A fairly quiet release for SPI, the biggest thing is the conversion to
use GPIO descriptors which is now 90% done but still needs some
stragglers converting.
Summary:
- Support for inter-word delays
- Conversion of the core and most drivers to use GPIO descriptors for
GPIO controlled chip selects
- New drivers for NXP FlexSPI and QuadSPI, SiFive and Spreadtrum"
* tag 'spi-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (104 commits)
spi: sh-msiof: Restrict bits per word to 8/16/24/32 on R-Car Gen2/3
spi: sifive: Remove redundant dev_err call in sifive_spi_probe()
spi: sifive: Remove spi_master_put in sifive_spi_remove()
spi: spi-gpio: fix SPI_CS_HIGH capability
spi: pxa2xx: Setup maximum supported DMA transfer length
spi: sifive: Add driver for the SiFive SPI controller
spi: sifive: Add DT documentation for SiFive SPI controller
spi: sprd: Add a prefix for SPI DMA channel macros
spi: sprd: spi: sprd: Add DMA mode support
dt-bindings: spi: Add the DMA properties for the SPI dma mode
spi: sprd: Add the SPI irq function for the SPI DMA mode
dt-bindings: spi: imx: Add an entry for the i.MX8QM compatible
spi: use gpio[d]_set_value_cansleep for setting chipselect GPIO
spi: gpio: Advertise support for SPI_CS_HIGH
spi: sh-msiof: Replace spi_master by spi_controller
spi: sh-hspi: Replace spi_master by spi_controller
spi: rspi: Replace spi_master by spi_controller
spi: atmel-quadspi: add support for sam9x60 qspi controller
dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60
spi: atmel-quadspi: add support for named peripheral clock
...
This commit is contained in:
commit
dcc75ddea1
72 changed files with 5093 additions and 2506 deletions
19
include/linux/platform_data/spi-ath79.h
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19
include/linux/platform_data/spi-ath79.h
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@ -0,0 +1,19 @@
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/*
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* Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller
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*
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* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef _ATH79_SPI_PLATFORM_H
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#define _ATH79_SPI_PLATFORM_H
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struct ath79_spi_platform_data {
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unsigned bus_num;
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unsigned num_chipselect;
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};
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#endif /* _ATH79_SPI_PLATFORM_H */
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@ -22,7 +22,7 @@
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struct dma_chan;
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/* device.platform_data for SSP controller devices */
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struct pxa2xx_spi_master {
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struct pxa2xx_spi_controller {
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u16 num_chipselect;
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u8 enable_dma;
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bool is_slave;
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@ -54,7 +54,7 @@ struct pxa2xx_spi_chip {
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#include <linux/clk.h>
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extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
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extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info);
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#endif
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#endif
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@ -330,6 +330,11 @@ ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
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u64 offs, size_t len, void *buf);
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ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
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u64 offs, size_t len, const void *buf);
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struct spi_mem_dirmap_desc *
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devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem,
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const struct spi_mem_dirmap_info *info);
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void devm_spi_mem_dirmap_destroy(struct device *dev,
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struct spi_mem_dirmap_desc *desc);
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int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv,
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struct module *owner);
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@ -12,6 +12,7 @@
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#include <linux/kthread.h>
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#include <linux/completion.h>
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#include <linux/scatterlist.h>
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#include <linux/gpio/consumer.h>
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struct dma_chan;
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struct property_entry;
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@ -116,8 +117,13 @@ void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
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* @modalias: Name of the driver to use with this device, or an alias
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* for that name. This appears in the sysfs "modalias" attribute
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* for driver coldplugging, and in uevents used for hotplugging
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* @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
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* @cs_gpio: LEGACY: gpio number of the chipselect line (optional, -ENOENT when
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* not using a GPIO line) use cs_gpiod in new drivers by opting in on
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* the spi_master.
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* @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when
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* not using a GPIO line)
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* @word_delay_usecs: microsecond delay to be inserted between consecutive
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* words of a transfer
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*
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* @statistics: statistics for the spi_device
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*
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@ -163,7 +169,9 @@ struct spi_device {
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void *controller_data;
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char modalias[SPI_NAME_SIZE];
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const char *driver_override;
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int cs_gpio; /* chip select gpio */
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int cs_gpio; /* LEGACY: chip select gpio */
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struct gpio_desc *cs_gpiod; /* chip select gpio desc */
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uint8_t word_delay_usecs; /* inter-word delay */
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/* the statistics */
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struct spi_statistics statistics;
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@ -376,9 +384,17 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
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* controller has native support for memory like operations.
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* @unprepare_message: undo any work done by prepare_message().
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* @slave_abort: abort the ongoing transfer request on an SPI slave controller
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* @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
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* number. Any individual value may be -ENOENT for CS lines that
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* @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
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* CS number. Any individual value may be -ENOENT for CS lines that
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* are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods
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* in new drivers.
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* @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS
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* number. Any individual value may be NULL for CS lines that
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* are not GPIOs (driven by the SPI controller itself).
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* @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
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* GPIO descriptors rather than using global GPIO numbers grabbed by the
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* driver. This will fill in @cs_gpiods and @cs_gpios should not be used,
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* and SPI devices will have the cs_gpiod assigned rather than cs_gpio.
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* @statistics: statistics for the spi_controller
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* @dma_tx: DMA transmit channel
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* @dma_rx: DMA receive channel
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@ -557,6 +573,8 @@ struct spi_controller {
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/* gpio chip select */
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int *cs_gpios;
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struct gpio_desc **cs_gpiods;
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bool use_gpio_descriptors;
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/* statistics */
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struct spi_statistics statistics;
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@ -706,6 +724,8 @@ extern void spi_res_release(struct spi_controller *ctlr,
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* @delay_usecs: microseconds to delay after this transfer before
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* (optionally) changing the chipselect status, then starting
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* the next transfer or completing this @spi_message.
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* @word_delay_usecs: microseconds to inter word delay after each word size
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* (set by bits_per_word) transmission.
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* @word_delay: clock cycles to inter word delay after each word size
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* (set by bits_per_word) transmission.
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* @transfer_list: transfers are sequenced through @spi_message.transfers
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@ -788,6 +808,7 @@ struct spi_transfer {
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#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
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#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
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u8 bits_per_word;
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u8 word_delay_usecs;
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u16 delay_usecs;
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u32 speed_hz;
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u16 word_delay;
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