mlx5-updates-2022-05-09
1) Gavin Li, adds exit route from waiting for FW init on device boot and
increases FW init timeout on health recovery flow
2) Support 4 ports HCAs LAG mode
Mark Bloch Says:
================
This series adds to mlx5 drivers support for 4 ports HCAs.
Starting with ConnectX-7 HCAs with 4 ports are possible.
As most driver parts aren't affected by such configuration most driver
code is unchanged.
Specially the only affected areas are:
- Lag
- Devcom
- Merged E-Switch
- Single FDB E-Switch
Lag was chosen to be converted first. Creating hardware LAG when all 4
ports are added to the same bond device.
Devom, merge E-Switch and single FDB E-Switch, are marked as supporting
only 2 ports HCAs and future patches will add support for 4 ports HCAs.
In order to activate the hardware lag a user can execute the:
ip link add bond0 type bond
ip link set bond0 type bond miimon 100 mode 2
ip link set eth2 master bond0
ip link set eth3 master bond0
ip link set eth4 master bond0
ip link set eth5 master bond0
Where eth2, eth3, eth4 and eth5 are the PFs of the same HCA.
================
-----BEGIN PGP SIGNATURE-----
iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAmJ5/fwACgkQSD+KveBX
+j5rBwgAtG+1peyKvVZWpAeXaHxSn+LFIrsRUhu3Gtw6u8hzcpa7ZKrz4vx8g3KN
0T92Cm0lXBvktFJu/mBEYveB5bOQPzyNOnxP4rnHmiFfNpRBZOxdC9YN8ycJVWYX
IdK3UId4puzJ+CbVbqXv7SrVtUPCKsgKr/K/f6QzkKVaMl2NUvtA9VWkWYs/knM0
C5im6Y9LoUus4dNTW9rKYJIEkFEs4KocY0T9uobfs17lS4bUqcbp+8M/oLquUF3c
UNQ4S5qpQk/qF4aZakVgDaZny/ZrAtlMtx53q3nFDvH5jDRQQpRh22aRR+rkPNOX
0mRX7/kGa5kDvmKSoNEhGfXbSFWECA==
=UEL6
-----END PGP SIGNATURE-----
Merge tag 'mlx5-updates-2022-05-09' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says:
====================
mlx5-updates-2022-05-09
1) Gavin Li, adds exit route from waiting for FW init on device boot and
increases FW init timeout on health recovery flow
2) Support 4 ports HCAs LAG mode
Mark Bloch Says:
================
This series adds to mlx5 drivers support for 4 ports HCAs.
Starting with ConnectX-7 HCAs with 4 ports are possible.
As most driver parts aren't affected by such configuration most driver
code is unchanged.
Specially the only affected areas are:
- Lag
- Devcom
- Merged E-Switch
- Single FDB E-Switch
Lag was chosen to be converted first. Creating hardware LAG when all 4
ports are added to the same bond device.
Devom, merge E-Switch and single FDB E-Switch, are marked as supporting
only 2 ports HCAs and future patches will add support for 4 ports HCAs.
In order to activate the hardware lag a user can execute the:
ip link add bond0 type bond
ip link set bond0 type bond miimon 100 mode 2
ip link set eth2 master bond0
ip link set eth3 master bond0
ip link set eth4 master bond0
ip link set eth5 master bond0
Where eth2, eth3, eth4 and eth5 are the PFs of the same HCA.
================
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
dc3a2001f6
22 changed files with 720 additions and 302 deletions
|
|
@ -84,7 +84,7 @@ enum mlx5_sqp_t {
|
|||
};
|
||||
|
||||
enum {
|
||||
MLX5_MAX_PORTS = 2,
|
||||
MLX5_MAX_PORTS = 4,
|
||||
};
|
||||
|
||||
enum {
|
||||
|
|
@ -558,6 +558,7 @@ struct mlx5_debugfs_entries {
|
|||
struct dentry *cq_debugfs;
|
||||
struct dentry *cmdif_debugfs;
|
||||
struct dentry *pages_debugfs;
|
||||
struct dentry *lag_debugfs;
|
||||
};
|
||||
|
||||
struct mlx5_ft_pool;
|
||||
|
|
@ -632,6 +633,7 @@ enum mlx5_device_state {
|
|||
|
||||
enum mlx5_interface_state {
|
||||
MLX5_INTERFACE_STATE_UP = BIT(0),
|
||||
MLX5_BREAK_FW_WAIT = BIT(1),
|
||||
};
|
||||
|
||||
enum mlx5_pci_status {
|
||||
|
|
@ -1141,6 +1143,7 @@ int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,
|
|||
int num_counters,
|
||||
size_t *offsets);
|
||||
struct mlx5_core_dev *mlx5_lag_get_peer_mdev(struct mlx5_core_dev *dev);
|
||||
u8 mlx5_lag_get_num_ports(struct mlx5_core_dev *dev);
|
||||
struct mlx5_uars_page *mlx5_get_uars_page(struct mlx5_core_dev *mdev);
|
||||
void mlx5_put_uars_page(struct mlx5_core_dev *mdev, struct mlx5_uars_page *up);
|
||||
int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue