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working everything and touch ok - but with iommu hack

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This commit is contained in:
AngeloGioacchino Del Regno 2021-08-09 15:19:16 +02:00 • committed by Jami Kettunen
parent bf0b7a1ffa
commit cd95ecae4a
6 changed files with 45 additions and 20 deletions
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9
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-maple.dts
View file

@ -101,3 +101,12 @@
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
};
&pmi8998_wled {
status = "okay";
qcom,num-strings = <3>;
qcom,enabled-strings = <0 1 2>;
};

14
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
View file

@ -21,7 +21,7 @@
qcom,board-id = <8 0>;
chosen {
bootargs = "clk_ignore_unused";
bootargs = "clk_ignore_unused root=/dev/mmcblk0p1";
};
clocks {
@ -342,6 +342,10 @@
vdds-supply = <&vreg_l1a_0p875>;
};
&gpucc {
status = "ok";
};
&ibb {
regulator-min-microamp = <800000>;
regulator-max-microamp = <800000>;
@ -379,6 +383,14 @@
status = "okay";
};
&mmcc {
status = "ok";
};
&mmss_smmu {
status = "ok";
};
&pm8005_lsid1 {
pm8005-regulators {
compatible = "qcom,pm8005-regulators";

3
arch/arm64/boot/dts/qcom/msm8998.dtsi
View file

@ -2190,7 +2190,6 @@
* SoC VDDMX RPM Power Domain in the Adreno driver.
*/
power-domains = <&gpucc GPU_GX_GDSC>;
status = "disabled";
};
gpucc: clock-controller@5065000 {
@ -3183,7 +3182,7 @@
};
mdss: mdss@c900000 {
compatible = "qcom,mdss-dpu1";
compatible = "qcom,sdm845-mdss";
reg = <0x0c900000 0x1000>;
reg-names = "mdss";

3
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
View file

@ -383,7 +383,8 @@ static bool qcom_smmu500_reset_cb_nodisable(struct arm_smmu_device *smmu,
{
struct qcom_smmu *qsmmu = to_qcom_smmu(smmu);
return test_bit(cbndx, qsmmu->reset_cb_nodisable_mask);
return true;
// return test_bit(cbndx, qsmmu->reset_cb_nodisable_mask);
}
static const struct arm_smmu_impl qcom_smmu_impl = {

2
drivers/iommu/arm/arm-smmu/arm-smmu.c
View file

@ -1608,7 +1608,7 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
{
int i;
u32 reg;
return;
/* clear global FSR */
reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR);
arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg);

34
drivers/regulator/qcom-labibb-regulator.c
View file

@ -260,7 +260,7 @@ static irqreturn_t qcom_labibb_ocp_isr(int irq, void *chip)
/* If the regulator is not enabled, this is a fake event */
if (!ops->is_enabled(vreg->rdev))
return 0;
return IRQ_HANDLED;
/* If we tried to recover for too many times it's not getting better */
if (vreg->ocp_irq_count > LABIBB_MAX_OCP_COUNT)
@ -279,12 +279,6 @@ static irqreturn_t qcom_labibb_ocp_isr(int irq, void *chip)
}
vreg->ocp_irq_count++;
/*
* Disable the interrupt temporarily, or it will fire continuously;
* we will re-enable it in the recovery worker function.
*/
disable_irq_nosync(irq);
/* Warn the user for overcurrent */
dev_warn(vreg->dev, "Over-Current interrupt fired!\n");
@ -304,6 +298,12 @@ end:
if (ret)
return IRQ_NONE;
/*
* Disable the interrupt temporarily, or it will fire continuously;
* we will re-enable it in the recovery worker function.
*/
disable_irq_nosync(irq);
return IRQ_HANDLED;
}
@ -316,8 +316,11 @@ static int qcom_labibb_set_ocp(struct regulator_dev *rdev, int lim,
int irq_trig_low, ret;
/*
* labibb supports only protection - and does not support setting
* limit. Furthermore, we don't support disabling protection.
* labibb does not support specifying a current limit that is
* special to over-current protection, but only a global one
* that will be used for both current limiting and protection;
* for this reason, we only support enabling the OCP here.
* Furthermore, we don't support disabling protection.
*/
if (lim || severity != REGULATOR_SEVERITY_PROT || !enable)
return -EINVAL;
@ -540,12 +543,6 @@ static irqreturn_t qcom_labibb_sc_isr(int irq, void *chip)
/* Warn the user for short circuit */
dev_warn(vreg->dev, "Short-Circuit interrupt fired!\n");
/*
* Disable the interrupt temporarily, or it will fire continuously;
* we will re-enable it in the recovery worker function.
*/
disable_irq_nosync(irq);
/* Signal out of regulation event to drivers */
regulator_notifier_call_chain(vreg->rdev,
REGULATOR_EVENT_REGULATION_OUT, NULL);
@ -553,6 +550,13 @@ static irqreturn_t qcom_labibb_sc_isr(int irq, void *chip)
/* Schedule the short-circuit handling as high-priority work */
mod_delayed_work(system_highpri_wq, &vreg->sc_recovery_work,
msecs_to_jiffies(SC_RECOVERY_INTERVAL_MS));
/*
* Disable the interrupt temporarily, or it will fire continuously;
* we will re-enable it in the recovery worker function.
*/
disable_irq_nosync(irq);
return IRQ_HANDLED;
}